ES2090095T3 - Control de frecuencias de reloj en una red de telecomunicaciones. - Google Patents

Control de frecuencias de reloj en una red de telecomunicaciones.

Info

Publication number
ES2090095T3
ES2090095T3 ES90304231T ES90304231T ES2090095T3 ES 2090095 T3 ES2090095 T3 ES 2090095T3 ES 90304231 T ES90304231 T ES 90304231T ES 90304231 T ES90304231 T ES 90304231T ES 2090095 T3 ES2090095 T3 ES 2090095T3
Authority
ES
Spain
Prior art keywords
frequency
receiving terminal
clock
clock frequency
frequency control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90304231T
Other languages
English (en)
Inventor
Hassan M Ahmed
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Codex Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Codex Corp filed Critical Codex Corp
Application granted granted Critical
Publication of ES2090095T3 publication Critical patent/ES2090095T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Selective Calling Equipment (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

LA FRECUENCIA DE UN RELOJ PARA UN TERMINAL DE RECEPCION SE CONTROLA BASADO EN UNA FRECUENCIA DE RELOJ PREDETERMINADA DE UN TERMINAL, QUE PRODUCE UN FLUJO DE DATOS CONTINUO A UNA FRECUENCIA PREDETERMINADA PARA TRANSMISION AL TERMINAL DE RECEPCION, SOBRE UNA RED DE TRANSMISIONES DE LA CLASE EN LA CUAL SE TRANSMITEN LOS DATOS ENTRE LOS TERMINALES EN PAQUETES DISCRETOS, O NO INTEGRADOS, QUE SE RETRASAN EN LA RED POR CANTIDADES POSIBLEMENTE DIFERENTES. LAS LLEGADAS DE PAQUETES QUE SE ENVIAN AL TERMINAL DE RECEPCION SE DETECTAN, LOS INTERVALOS DE TIEMPO ENTRE LAS LLEGADAS DE PAQUETES SUCESIVOS SE DETERMINAN, Y LOS INTERVALOS DE TIEMPO SE PROCESAN PARA GENERAR UN CALCULO QUE SE RELACIONA CON LA FRECUENCIA PREDETERMINADA. LA FRECUENCIA DEL RELOJ DEL TERMINAL DE RECEPCION SE CONTROLA EN RESPUESTA AL CALCULO.
ES90304231T 1989-04-21 1990-04-20 Control de frecuencias de reloj en una red de telecomunicaciones. Expired - Lifetime ES2090095T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/341,647 US5025457A (en) 1989-04-21 1989-04-21 Synchronizing continuous bit stream oriented terminals in a communications network

Publications (1)

Publication Number Publication Date
ES2090095T3 true ES2090095T3 (es) 1996-10-16

Family

ID=23338450

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90304231T Expired - Lifetime ES2090095T3 (es) 1989-04-21 1990-04-20 Control de frecuencias de reloj en una red de telecomunicaciones.

Country Status (9)

Country Link
US (1) US5025457A (es)
EP (1) EP0394051B1 (es)
JP (1) JP2612505B2 (es)
AT (1) ATE140350T1 (es)
AU (1) AU628504B2 (es)
CA (1) CA2014259C (es)
DE (1) DE69027701T2 (es)
ES (1) ES2090095T3 (es)
GR (1) GR3021238T3 (es)

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DE60138182D1 (de) 2001-07-26 2009-05-14 Bayerische Motoren Werke Ag Uhrensynchronisation in einem verteilten System
US7313635B1 (en) * 2002-03-21 2007-12-25 Cisco Technology Method and apparatus for simulating a load on an application server in a network
GB2391771A (en) * 2002-08-03 2004-02-11 Zarlink Semiconductor Ltd Method and apparatus for recovering a reference clock
US7372875B2 (en) * 2002-09-30 2008-05-13 Lucent Technologies Inc. Systems and methods for synchronization in asynchronous transport networks
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KR102519480B1 (ko) 2021-04-01 2023-04-10 에스케이하이닉스 주식회사 PCIe 장치 및 이를 포함하는 컴퓨팅 시스템
KR102518285B1 (ko) 2021-04-05 2023-04-06 에스케이하이닉스 주식회사 PCIe 인터페이스 및 인터페이스 시스템
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Also Published As

Publication number Publication date
JP2612505B2 (ja) 1997-05-21
CA2014259A1 (en) 1990-10-21
AU628504B2 (en) 1992-09-17
EP0394051A3 (en) 1992-05-20
EP0394051A2 (en) 1990-10-24
US5025457A (en) 1991-06-18
JPH02296434A (ja) 1990-12-07
EP0394051B1 (en) 1996-07-10
DE69027701T2 (de) 1997-02-06
AU5231990A (en) 1990-11-01
GR3021238T3 (en) 1997-01-31
CA2014259C (en) 1994-11-15
DE69027701D1 (de) 1996-08-14
ATE140350T1 (de) 1996-07-15

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