ES2085370T3 - Circuito para controlar el tiempo de retardo entre las señales de luminancia y crominancia. - Google Patents

Circuito para controlar el tiempo de retardo entre las señales de luminancia y crominancia.

Info

Publication number
ES2085370T3
ES2085370T3 ES91106118T ES91106118T ES2085370T3 ES 2085370 T3 ES2085370 T3 ES 2085370T3 ES 91106118 T ES91106118 T ES 91106118T ES 91106118 T ES91106118 T ES 91106118T ES 2085370 T3 ES2085370 T3 ES 2085370T3
Authority
ES
Spain
Prior art keywords
delay time
chrominance
circuit
luminance
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES91106118T
Other languages
English (en)
Inventor
Jeon Jin-Kyu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of ES2085370T3 publication Critical patent/ES2085370T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/77—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/87—Regeneration of colour television signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

SE DESCRIBE UN CIRCUITO PARA EL CONTROL AUTOMATICO DEL TIEMPO DE RETARDO ENTRE SEÑALES DE LUMINANCIA Y CROMINANCIA. EL CIRCUITO DE CONTROL DEL TIEMPO DE RETARDO DE LA PRESENTE INVENCION ESTA FORMADO POR UN GENERADOR DE IMPULSOS DE RELOJ 30 QUE PRODUCE UN CIERTO NUMERO DE IMPULSOS ENTRE EL BORDE POSITIVO DE LA SEÑAL DE SINCRONIZACION HORIZONTAL DESDE UN SEPARADOR DE SINCRONIZACION HORIZONTAL Y EL BORDE FRONTAL DE LA SEÑAL DE SINCRONIZACION CROMATICA DESDE UN SEPARADOR DE SEÑAL DE SINCRONIZACION CROMATICA 20, UN COMPARADOR 40 QUE COMPARA EL IMPULSO DE RELOJ RESULTANTE CON UNA SEÑAL DE REFERENCIA Y DECIDE QUE SEÑAL ES RETARDADA Y LA DURACION DEL TIEMPO DE RETARDO, UN CIRCUITO DE RETARDO DE LIMINANCIA 50 Y UN CIRCUITO DE RETARDO DE CROMINANCIA 60 QUE RETARDAN RESPECTIVAMENTE LAS SEÑALES DE LUMINANCIA Y DE CROMINANCIA SEGUN LAS SALIDAS DEL COMPARADOR 40 , Y UN MEZCLADOR DE LUZ Y COLOR 70 QUE MEZCLA LAS SEÑALES DE LIMINANCIA Y CROMINANCIA COMPENSADAS. ASI PUES, LA PRESENTE INVENCION MEJORA LA CALIDAD DE LA IMAGEN AJUSTANDO EL TIEMPO DE RETARDO ENTRE LAS SEÑALES DE LUMINANCIA Y CROMINANCIA QUE APARECEN EN DIFERENTES TIPOS DE VTR''S Y CINTAS DE VIDEO.
ES91106118T 1990-06-30 1991-04-17 Circuito para controlar el tiempo de retardo entre las señales de luminancia y crominancia. Expired - Lifetime ES2085370T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019900009525U KR970001901Y1 (ko) 1990-06-30 1990-06-30 휘도신호와 색신호의 딜레이타임 자동 조절회로

Publications (1)

Publication Number Publication Date
ES2085370T3 true ES2085370T3 (es) 1996-06-01

Family

ID=19300533

Family Applications (1)

Application Number Title Priority Date Filing Date
ES91106118T Expired - Lifetime ES2085370T3 (es) 1990-06-30 1991-04-17 Circuito para controlar el tiempo de retardo entre las señales de luminancia y crominancia.

Country Status (6)

Country Link
US (1) US5159439A (es)
EP (1) EP0469241B1 (es)
JP (1) JP2501088Y2 (es)
KR (1) KR970001901Y1 (es)
DE (1) DE69117610T2 (es)
ES (1) ES2085370T3 (es)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4344075A (en) * 1980-08-28 1982-08-10 Rca Corporation Timing circuit for the digital generation of composite luminance and chrominance video signal for non-interlaced television raster scan-line pattern
JPS5773582A (en) * 1980-10-24 1982-05-08 Toshiba Corp Phase synchronizing circuit
US4485395A (en) * 1982-09-21 1984-11-27 Rca Corporation Misregistration prevention in two channel VTRS
JPS60249496A (ja) * 1984-05-25 1985-12-10 Teac Co 再生映像信号のジツタ検出装置
JPH0681334B2 (ja) * 1985-03-04 1994-10-12 松下電器産業株式会社 同期信号分離装置
JPS62154893A (ja) * 1985-12-26 1987-07-09 Sony Corp Ｔｂｃ回路

Also Published As

Publication number Publication date
US5159439A (en) 1992-10-27
KR970001901Y1 (ko) 1997-03-17
JPH04105778U (ja) 1992-09-11
EP0469241B1 (en) 1996-03-06
KR920001688U (ko) 1992-01-28
DE69117610T2 (de) 1996-10-24
EP0469241A3 (en) 1992-03-18
EP0469241A2 (en) 1992-02-05
DE69117610D1 (de) 1996-04-11
JP2501088Y2 (ja) 1996-06-12

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