Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G4/00—Fixed capacitors; Processes of their manufacture
  • H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
  • H01G2/02—Mountings
  • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G4/00—Fixed capacitors; Processes of their manufacture
  • H01G4/40—Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/0213—Electrical arrangements not otherwise provided for
  • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
  • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
  • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/0213—Electrical arrangements not otherwise provided for
  • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
  • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
  • H05K1/0231—Capacitors or dielectric substances
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
  • H01G9/26—Structural combinations of electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices with each other
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
  • H05K2201/10007—Types of components
  • H05K2201/10015—Non-printed capacitor
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
  • H05K2201/10431—Details of mounted components
  • H05K2201/10507—Involving several components
  • H05K2201/10522—Adjacent components

Definitions

• Electronic component comprising at least two capacitors
• the present invention relates to an electronic component comprising at least two capacitors.
• Such an electronic component is for example used to produce a
• This voltage converter for example a DC / DC voltage converter, or an inverter / rectifier.
• This voltage converter can be integrated into a hybrid or electric vehicle, such as an automobile, and belong to the electrical circuit supplying an electric propulsion motor of this vehicle.
• Capacitors are frequently used across a DC voltage source upstream or downstream of a switch arm to filter high frequency harmonics generated by switches on the switch arm and prevent overvoltages. Each of these capacitors has its own inductance and the parallel connection of these capacitors generates a parasitic inductance. All these inductors reduce the bandwidth offered by these capacitors.
• the invention aims to meet this need and it achieves this, in one of its aspects, by means of an electronic component, comprising:
• first capacitor having a first terminal electrically connected to the first electrically conductive layer and a second terminal electrically connected to the second electrically conductive layer
• the first and the second capacitor being arranged so that, with respect to a plane orthogonal to at least one of the first and the second layer, with respect to which are defined a first and a second side, the first and the second capacitor have their respective first terminal disposed on the first side, and their respective second terminal disposed on the second side.
• the term “connected” refers to an electrical connection while the term “arranged” refers to a spatial arrangement.
• the first and the second capacitor are thus connected in parallel, since they are each connected between the first electrically conductive layer and the second electrically conductive layer, but they have different orientations since the terminal of the first capacitor which is connected to the first electrically conductive layer is not disposed on the same side as the terminal of the second capacitor connected to this first electrically conductive layer.
• the first and the second capacitor can thus be considered as connected in parallel, electrically speaking, although it can be considered as connected in an inverted manner, spatially speaking.
• Each electrically conductive layer can define planes, and the use of these planes reduces the parasitic inductance associated with the interconnection between these capacitors.
• Each electrically conductive layer may be in the form of a plate, this plate extending between two surfaces parallel to each other.
• the electronic component may comprise a portion of a printed circuit board, each capacitor being in particular mounted on the same end surface of this portion of the printed circuit board.
• At least one of the first and second electrically conductive layers may be disposed within the portion of the printed circuit board.
• One of the electrically conductive layers is for example a layer defining an outer surface of the portion of the printed circuit board, for example the upper surface or the lower surface while the other electrically conductive layer is a layer disposed inside of this portion of the printed circuit board.
• each of the electrically conductive layers is disposed within the portion of the printed circuit board.
• each of the electrically conductive layers is a layer defining an outer surface of the printed circuit board portion, one of these layers being the upper surface of this printed circuit board portion and the other of these layers. being the lower surface of this portion of the printed circuit board.
• the first and second capacitors may be carried by an outer surface of the printed circuit board portion.
• these two electrically conductive layers can define between them a high frequency capacitor, having in particular an intrinsic inductance of less than 1 nH, as disclosed in the application filed in France on April 1, 2019 under number 19 03457 by the Applicant.
• the first electrically conductive layer can include several sublayers connected in parallel.
• the second electrically conductive layer can include several sublayers connected in parallel.
• the electronic component may comprise an alternation of a sublayer of the first electrically conductive layer and of a sublayer of the second electrically conductive layer, these sublayers then being stacked.
• Only some of these sublayers of the first, respectively second, electrically conductive layer can be disposed within the printed circuit board portion.
• all of these sublayers of the first, respectively second, electrically conductive layer are disposed within the portion of the printed circuit board.
• All the sublayers forming the first electrically conductive layer are for example arranged inside the portion of the printed circuit board and / or all the sublayers forming the second electrically conductive layer are for example arranged inside the printed circuit board portion. the printed circuit board portion.
• the invention is not limited to a component comprising a portion of a printed circuit board.
• the component comprises for example two bus bars and each of these bus bars has the shape of a plate so as to define respectively the first and the second electrically conductive layer.
• the electrically conductive layers can be spatially parallel to each other. In this case, the direction with respect to which the first side and the second side are defined may be normal to each electrically conductive layer.
• the first and the second electrically conductive layer can be superimposed in whole or in part.
• one of the layers is superimposed with the entirety of the other of the layers.
• the electronic component may further comprise a third capacitor, this third capacitor having a first terminal electrically connected to the first electrically conductive layer and a second terminal electrically connected to the second electrically conductive layer, the first capacitor, the second capacitor and the third capacitor being arranged so that the second capacitor is disposed between the first and the third capacitor.
• the capacitors can be arranged in parallel spatially speaking, that is to say that, a line being defined for each capacitor between its first and its second terminal, these lines are parallel from one capacitor to l 'other.
• the first capacitor and the second capacitor can extend in parallel planes, and the minimum distance in each of these planes between these two capacitors can be between 0.1mm and 2cm. These capacitors can thus be arranged adjacent while reducing the aforementioned inductances.
• one or more vias may be provided to allow the electrical connection between a terminal d a capacitor and the corresponding electrically conductive layer.
• Each via is for example formed by a metallized hole or by a laser via.
• each of the capacitors may have a capacitance between 1 pF and 1000 F, in particular between 10 pF and 100 mF or between 1F and 1000F.
• the component may also include at least one switching arm connected in parallel between the first electrically conductive layer and the second electrically conductive layer, this switching arm being formed by the series connection of two electronic switches, at least one of which is controllable and which define between them a midpoint.
• the electronic component can define a voltage converter is for example a DC / DC voltage converter, for example between a DC voltage of 12V and a DC voltage of 48V, or between a DC voltage of 12V and a DC voltage of higher value at 300V.
• a voltage converter is for example a DC / DC voltage converter, for example between a DC voltage of 12V and a DC voltage of 48V, or between a DC voltage of 12V and a DC voltage of higher value at 300V.
• Such a converter can be integrated into the on-board network of an electric or hybrid vehicle.
• the first electrically conductive layer may be at a potential of 48V and the second electrically conductive layer may be grounded.
• the invention then applies to capacitors connected in parallel with the voltage input, the value of which is 48V
• the first electrically conductive layer may be at a potential of 12V and the second electrically conductive layer may be grounded.
• the invention then applies to capacitors connected in parallel with the voltage input whose value is 12V.
• the invention is then on the one hand applied to the capacitors connected in parallel with the voltage input whose value is 48V via the first electrically conductive layer at 48V and the second electrically conductive layer to ground, and also to the capacitors connected in parallel with the voltage input whose value is 12V via the first electrically conductive layer to 12V and the second electrically conductive layer to ground.
• the first electrically conductive layer may be at a potential greater than 300V and the second electrically conductive layer may be grounded.
• the invention then applies to capacitors connected in parallel with the voltage input whose value is greater than 300V.
• the first electrically conductive layer may be at a potential of 12V and the second electrically conductive layer may be at the bottom. mass.
• the invention then applies to capacitors connected in parallel with the voltage input whose value is 12V.
• the invention is then on the one hand applied to the capacitors connected in parallel with the voltage input whose value is greater than 300V via the first electrically conductive layer with a potential greater than 300V and the second electrically conductive layer to ground, and also to the capacitors connected in parallel with the voltage input whose value is 12V via the first electrically conductive layer at 12V and the second electrically conductive layer to ground.
• the electronic component can form an inverter / rectifier, in which case the direct voltage has for example a value of 12V or 48V or of a value greater than 300V.
• each electronic switch may be controllable.
• Each controllable switch can be a transistor using gallium nitride (GaN) or silicon carbide (SiC) or silicon.
• switching arms can be mounted in parallel, for example between one and six switching arms.
• each electrically conductive layer can be made of copper, being for example a copper plate.
• the invention applies to any type of capacitor, for example a through capacitor or a non-through capacitor, a ceramic capacitor, a chemical capacitor, a plastic capacitor.
• FIG. 1 schematically represents an electronic component defining a DC / DC voltage converter according to an exemplary implementation of the invention
• FIG. 2 shows a top view of part of the component of Figure 1, the latter comprising a portion of the printed circuit board,
• FIG. 5 is a top view similar to Figure 2 of a component according to a second example of implementation of the invention.
• FIG. 1 An electronic component 1 forming in the example considered a DC / DC voltage converter.
• this is a 12V / 48V voltage converter, but the invention is not limited to such an example.
• this converter 1 comprises a first DC voltage input 4, a second DC voltage input 5 and one or more switching arms 6 making it possible to convert the voltage value on the first DC voltage input 4 into another value. voltage available on the second DC voltage input 5, and vice versa.
• the switching arm 6 comprises in the example considered two switches
• controllable electronics 10 which are connected in series and which define between them a midpoint connected to the second voltage input 5.
• Each controllable switch 10 is here a MOSFET transistor, using for example galium nitride, silicon carbide or silicon.
• the electronic component 1 further comprises two capacitors 11 and 12, these two capacitors both being connected in parallel, and in parallel with the switching arm 6.
• These two capacitors 11 and 12 are for example of the same type, namely in particular chemical capacitors or ceramic capacitors. As can be seen in Figure 2, these capacitors 11 and 12 are mounted in the example considered on an outer surface 13 of a portion of printed circuit board 14 of electronic component 1.
• the two capacitors 11 and 12 each comprise two terminals, and it is possible, with respect to a plane (D) perpendicular to the outer surface 13 of the printed circuit board portion 14, define for each of the capacitors 11 and 12 a first terminal 15 arranged on a first side C1 of this plane (D) and a second terminal 16 disposed on a second side C2 of this plane (D).
• the distance measured between the first capacitor 11 and the second capacitor 12 is for example between 0.1 mm and 2 cm.
• the two capacitors 11 and 12 are arranged spatially in parallel on the outer surface 13. It is in fact observed that the line connecting the first terminal 15 and the second terminal 16 of one of the capacitors is substantially parallel to the line connecting the first terminal 15 and the second terminal 16 of the other capacitor.
• the printed circuit board portion 14 comprises two inner layers 17 and 18 which are electrically conductive. Each layer 17, 18 is here formed by a copper plate.
• first electrically conductive layer 17 is at the electric potential of the positive terminal of the first DC voltage input 4, which is here the potential of 48V, while the other of these layers, also called “second electrically conductive layer 18” is at the electric potential of the other terminal of this first direct voltage input 4, which is here ground.
• first electrically conductive layer 17 extends in planes which are parallel to the planes in which the second electrically conductive layer 18 extends. It is also noted in the example considered, that these planes are also parallel to the plane in which extends the outer surface 13 of the printed circuit board portion 14.
• first electrically conductive layer 17 and a single second electrically conductive layer 18 it is possible to replace them with a plurality of respective sub-layers, these sub-layers being able to define half-waves, similar to this which is shown in Figure 7 which shows another product.
• the sublayers replacing the first electrically conductive layer 17 are also referenced “17” in this FIG. 7 and the sublayers replacing the second electrically conductive layer 18 are also referenced “18” in FIG. 7.
• first sublayers 17 and all of the second sublayers 18 are necessarily disposed within the printed circuit board portion 14.
• each first sublayer 17 may be electrically in contact with the metallized wall of a first via 30 and each second sublayer 18 may be electrically in contact with the metallized wall of. a second via 30.
• the capacitors 11 and 12 although electrically connected in parallel can be considered to be arranged in reverse.
• first capacitor 11 has its first terminal 15 electrically connected to the first electrically conductive layer 17 while the other capacitor, hereinafter called “second capacitor 12 ”presents its first terminal 15 electrically connected to the second electrically conductive layer 18.
• second capacitor 12 presents its first terminal 15 electrically connected to the second electrically conductive layer 18.
• first capacitor 11 has its second terminal 16 electrically connected to the second electrically conductive layer 18 while the second capacitor 12 has its second terminal 16 electrically connected to the first electrically conductive layer 17.
• Each of these electrical connections from a capacitor terminal to the corresponding electrically conductive layer is made, for example, through a part of the printed circuit portion via of a via 19 being a metallized hole.
• the first terminals 15 are thus electrically connected inversely, as are the second terminals 16.
• Such an inverted assembly of the corresponding terminals of the first capacitor 11 to the second capacitor 12 makes it possible to reduce the specific inductance of each of these capacitors. Furthermore, the connection of these capacitors 11 and 12 to electrically conductive layers 17 and 18 which are planar makes it possible to reduce the parasitic inductance resulting from the connection of these two capacitors 11 and 12, as will be explained later with reference to figure 6.
• FIG. 5 represents another example of implementation of the invention.
• four capacitors 20 are connected in parallel, each of these capacitors 20 being connected in parallel with the first voltage input 4, electrically speaking. Similar to the example of Figures 2 to 4, the capacitors 20 are arranged in parallel, spatially speaking, on the end surface 13 of the printed circuit board portion 14. Similar to FIG. 2, it is possible to define, for each capacitor 20, a first terminal 21 disposed on a first side of a reference plane, and a second terminal 22 disposed on a second side of a reference plane. In the example of Figure 5, two adjacent capacitors, spatially speaking, have their corresponding terminals connected inverted, i.e. one of the capacitors 20 has its first terminal 21 electrically connected to the first layer electrically conductive 17 and its second terminal 22 electrically connected to the second electrically conductive layer 18.
• each branch being constituted by a capacitor 20 connected in series with an inductor.
• capacitors From branch to branch, capacitors have their first terminal electrically connected to the same electrical potential of 48V and their second terminal electrically connected to an inductor, the latter being for each branch connected to ground.
• Each of these capacitors here has a capacity of 2.2 pF and it is connected in series with an inductance of 3 nH

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• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Physics & Mathematics (AREA)
• Electromagnetism (AREA)
• Manufacturing & Machinery (AREA)
• Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
• Production Of Multi-Layered Print Wiring Board (AREA)
• Ceramic Capacitors (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=69157949

Family Applications (1)

Country Status (4)

Families Citing this family (1)

Family Cites Families (13)

• 2019
  • 2019-08-01 FR FR1908805A patent/FR3099632B1/fr active Active
• 2020
  • 2020-07-30 CN CN202080061390.7A patent/CN114365247B/zh active Active
  • 2020-07-30 WO PCT/EP2020/071536 patent/WO2021019028A1/fr unknown
  • 2020-07-30 EP EP20745239.2A patent/EP4008015A1/fr active Pending

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