Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/76—Making of isolation regions between components
  • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
  • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
  • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
  • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Definitions

• TITLE PROCESS FOR TRANSFERRING A USEFUL LAYER ON A
• This process can be used for the manufacture of silicon on insulator substrates (SOI - “Silicon on insulator”).
• the donor substrate 1 and the support substrate 4 are each formed from a silicon wafer, the standardized diameter of which is typically 200mm, 300mm, or even 450 mm for the next generations.
• One and / or the other of the donor substrate 1 and of the support substrate 4 are oxidized at the surface.
• SOI substrates must meet very precise specifications. This is particularly the case for the average thickness and the uniformity of thickness of the useful layer 3. Compliance with these specifications is required for the proper functioning of the semiconductor devices which will be formed in and on this useful layer 3. .
• the Applicant has observed that the useful layers 3 transferred according to the aforementioned method, resulting from bonded structures prepared under similar conditions and having undergone the same heat treatment of embrittlement, did not exhibit morphological surface properties (roughness, uniformity of thickness). reproducible from plate to plate.
• the non-reproducibility of the surface morphological properties of the useful layers after transfer can impact production yields as the finishing steps do not always succeed in bringing the roughness and uniformity of thickness of all useful layers back to the required level of specification. .
• document EP2933828 proposes to put in contact with the assembly to be fractured, an absorbing element to dissipate the acoustic vibrations emitted during initiation and the self-sustaining propagation of the fracture wave.
• the present invention relates to a method of transferring a useful layer onto a support substrate.
• the method proposes an alternative solution to those of the state of the art, aiming to obtain a low surface roughness and a good uniformity of thickness of the useful layers after transfer and to improve the plate-to-plate reproducibility of the surface morphological properties of the useful layers transferred.
• the invention relates to a method of transferring a useful layer onto a support substrate, comprising the following steps:
• a donor substrate comprising a buried fragile plane, the useful layer being delimited by a front face of the donor substrate and the buried fragile plane;
• the predetermined stress causes the initiation and self-sustaining propagation of the fracture wave along said buried brittle plane, leading to the transfer of the useful layer onto the support substrate.
• the time period is between 1 minute to 5 hours;
• the transfer process is applied to the collective treatment of a plurality of bonded structures, and the predetermined stress is applied to the buried fragile plane of each of the bonded structures, so as to initiate the fracture wave when the given level of embrittlement is achieved for each bonded structure;
• step d) the annealing of step d) is carried out in heat treatment equipment of horizontal or vertical configuration, suitable for the collective treatment of a plurality of bonded structures;
• the given level of embrittlement is defined by the surface occupied by microcavities in the buried fragile plane and is chosen between 1% and 90%, preferably between 5% and 40%; -
• the annealing of step d) reaches a maximum temperature between 300 ° C and 600 ° C;
• FIG. 1 shows a method of transferring a thin film according to the state of the art
• FIG. 3 shows an example of collective processing of a plurality of structures, in a transfer method according to the invention.
• the transfer method according to the invention first of all comprises a step a) of supplying a donor substrate 1, from which the useful layer 3 will be obtained.
• the donor substrate 1 comprises a buried fragile plane 2 (FIG. 2 - a). ).
• the latter is advantageously formed by ion implantation of light species in the donor substrate 1, at a defined depth.
• the light species are preferably chosen from hydrogen and helium, or a combination of hydrogen and helium, because these species are favorable to the formation of microcavities around the defined depth of implantation, giving rise to the fragile plane.
• the useful layer 3 is delimited by a front face 1a of the donor substrate 1 and the buried fragile plane 2.
• the donor substrate 1 can be formed by at least one material chosen from among silicon, germanium, silicon carbide, compound semiconductors IV-IV, III-V or II-VI, piezoelectric materials (for example, LiNb03 , LiTa03, ...), etc. It may also include one or more surface layers arranged on its front face 1a and / or on its rear face 1b, of all kinds, for example dielectric (s).
• the transfer process also comprises a step b) of providing a support substrate 4 (FIG. 2 - b)).
• the transfer method then comprises a step c) of assembling, according to a bonding interface 7, of the donor substrate 1 at its front face 1a, and of the support substrate 4, to form a bonded structure 5 (FIG. 2 - c )).
• the assembly can be carried out by any known method, in particular by direct bonding by molecular adhesion, or by thermocompression, or even by electrostatic bonding. These techniques, which are well known from the state of the art, will not be described in detail here. It is nevertheless recalled that, previously on assembly, the donor 1 and support 4 substrates will have undergone cleaning and / or surface activation sequences, so as to guarantee the quality of the bonding interface 7 in terms of defectivity and bonding energy .
• the annealing of step d) reaches a maximum temperature typically between 200 ° C and 600 ° C, advantageously between 300 and 500 ° C, and even more preferably between 350 ° C and 450 ° C.
• Annealing may include a temperature rise ramp (typically between 200 ° C. and the maximum temperature) and a plateau at the maximum temperature. In general, such an annealing will have a duration of between a few tens of minutes and several hours, depending on the maximum temperature of the annealing.
• the time / temperature pair determines the thermal budget applied to the bonded structure 5 during annealing.
• the level of embrittlement of the buried brittle plane 2 is defined by the surface occupied by the microcavities present in the buried brittle plane 2. In the case of a donor substrate 1 made of silicon, the characterization of this surface occupied by the microcavities can be perform by infrared microscopy.
• the level of embrittlement can increase from a low level ( ⁇ 1%, below the detection threshold of the characterization instruments) to more than 80%, depending on the thermal budget applied to the bonded structure 5 during annealing.
• the thermal embrittlement budget is of course always maintained below the thermal fracture budget, for which the spontaneous initiation of the fracture wave is obtained in the buried fragile plane 2, during annealing.
• the bonded structure 5 is removed after the annealing step, while the buried fragile plane 2 has a certain level. weakening.
• An energy pulse is then applied to the buried fragile plane 2, to cause the initiation of the fracture wave: by propagating, the fracture wave generates the transfer of the useful layer 3 onto the support substrate 4.
• the Applicant has identified problems of reproducibility of the surface morphological properties of the useful layers 3 after transfer, even though the process steps were carried out under identical conditions.
• the period of time during which the predetermined stress is applied to the buried brittle plane 2 is typically greater than 1 min. In particular, it is between 1 minute and 5 hours. In other words, the time period is a fraction of the annealing time between 1% and 100%.
• the predetermined stress then causes the initiation and self-sustaining propagation of the fracture wave along the buried brittle plane 2, leading to the transfer of the layer useful 3 on the support substrate 4 (figure 2 - e)).
• the initiation of the fracture wave in the buried fragile plane 2 is not concomitant with the application of the predetermined stress to said plane 2.
• the mechanical stress n ' is not suitable for causing the initiation and propagation of the fracture wave at the time of its application, regardless of the level of weakening of the buried fragile plane 2.
• the predetermined mechanical stress according to the invention does not allow initiation and the propagation of the fracture wave at the time of its application; the initiation of the fracture wave is only caused by the predetermined stress when the buried brittle plane reaches the given level of embrittlement, after a period of time following the application of the constraint.
• the predetermined stress is chosen as a function of the level of embrittlement for which it is desired that the fracture wave propagates.
• a high stress will make it possible to initiate the fracture wave for a low level of embrittlement of the buried fragile plane 2; a lower stress will initiate the fracture wave for a greater level of embrittlement of the buried brittle plane 2.
• the given level of brittleness is defined by the area occupied by microcavities in the buried brittle plane 2 and can be chosen between 1% and 90%, preferably between 5% and 40%.
• Relatively low levels of embrittlement, for example less than 25%, are favorable to a reduced surface roughness after transfer and to a good uniformity of thickness of the useful layers 3 transferred.
• the transfer method according to the invention allows the choice of the level of embrittlement at which the fracture wave will propagate and ensures initiation of said wave at a constant level of embrittlement for all the bonded structures 5: this makes it possible to obtain properties favorable surface morphologies (low roughness, good uniformity and reproducibility from plate to plate) for the useful layers 3 transferred.
• the predetermined stress is applied to the fragile buried plane 2 locally, by exerting a point mechanical stress on the bonded structure 5, by means of a bevel 10.
• the bevel 10 is positioned opposite. -vis the bonding interface 7 and exerts a pressing force against chamfered edges of the donor substrates 1 and support 4 of the bonded structure 5. This has the effect of generating a tensile stress in the buried fragile plane 2.
• the support force has a predetermined and constant amplitude.
• the support force can be between 0.5 N and 50 N.
• the transfer method according to the invention can be used for the manufacture of SOI substrates in which the useful layer 3 is very thin, in particular between a few nanometers and 50 nm.
• the buried fragile plane 2 is located at a depth of approximately 290 nm, from the surface of the donor substrate 1. It delimits, with the oxide layer 6, a useful layer 3 of approximately 240 nm.
• This mechanical stress exerted by the bevel system 10 (with or without the additional device 11) on the bonded structures 5 generates a predetermined stress, local and in tension at the level of the buried fragile plane 2.
• the mechanical stress can be exerted from the start. annealing or after a fixed period. This determined duration is always much less than the duration necessary to reach the given level of embrittlement for which the predetermined stress will induce the initiation of the fracture wave.
• the finishing steps applied to the transferred sets 5a include chemical cleanings and at least one high temperature smoothing heat treatment.
• the SOI substrates comprise a useful layer 3 with a thickness of 50 nm, the non-uniformity of which is less than 2% and having a surface roughness less than 0.3 nm RMS.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Recrystallisation Techniques (AREA)
• Pressure Welding/Diffusion-Bonding (AREA)
• Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
• Laminated Bodies (AREA)

Applications Claiming Priority (2)

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• 2019
  • 2019-03-15 FR FR1902668A patent/FR3093858B1/fr active Active
• 2020
  • 2020-02-24 TW TW109105909A patent/TWI811528B/zh active
  • 2020-02-26 US US17/436,532 patent/US20220172983A1/en active Pending
  • 2020-02-26 CN CN202080016649.6A patent/CN113574654A/zh active Pending
  • 2020-02-26 SG SG11202109798U patent/SG11202109798UA/en unknown
  • 2020-02-26 WO PCT/FR2020/050367 patent/WO2020188167A1/fr active Application Filing
  • 2020-02-26 KR KR1020217032705A patent/KR20210138051A/ko unknown
  • 2020-02-26 EP EP20713728.2A patent/EP3939076A1/de active Pending
  • 2020-02-26 JP JP2021555272A patent/JP2022526250A/ja active Pending

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