Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
  • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector

Definitions

• LEDs light emitting diodes
• RCLEDs resonant cavity light emitting diodes
• VCSELs vertical cavity laser diodes
• edge emitting lasers are among the most efficient light sources currently available.
• Materials systems currently of interest in the manufacture of high-brightness light emitting devices capable of operation across the visible spectrum include Group lll-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as Ill-nitride materials.
• Ill-nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, Ill-nitride, or other suitable substrate by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques.
• MOCVD metal-organic chemical vapor deposition
• MBE molecular beam epitaxy
• the stack often includes one or more n-type layers doped with, for example, silicon, formed over the substrate, one or more light emitting layers in an active region formed over the n-type layer or layers, and one or more p- type layers doped with, for example, magnesium, formed over the active region. Electrical contacts are formed on the n- and p-type regions.
• a reflective layer for use in lighting devices and methods of forming the reflective layer may include a dielectric layer including one or more insulating materials.
• An intermediate layer with robust adhesive properties to the dielectric layer and a subsequent metal layer may be formed on the dielectric layer.
• the intermediate layer may include one or more materials having a higher enthalpy of reaction than the one or more insulating materials. Because of the higher enthalpy of reaction, atoms of the one or more materials in the intermediate layer may form bonds with atoms of the one or more insulating materials.
• a metal layer may be formed on the intermediate layer to reflect light emitted from an active region of a light emitting diode (LED).
• LED light emitting diode
• FIG. 1 is a cross-section view illustrating an example Ill-nitride light emitting diode
• FIG. 2 is a cross-section view illustrating forming a dielectric layer on an emission layer
• FIG. 3 is a cross section view illustrating forming an intermediate layer on the dielectric layer
• FIG. 4 is a cross section view illustrating forming a metal layer on the intermediate layer to form a reflective layer
• FIGs. 5A-5B are transmission electron microscope (TEM) micrographs illustrating a cross section of an exemplary reflective layer
• FIG. 6 is a flow chart illustrating a method of forming the reflective layer
• FIG. 7 is a flow chart illustrating another method of forming the reflective layer
• FIG. 8 is a flow chart illustrating another method of forming the reflective layer.
• FIG. 9 is a flow chart illustrating another method of forming the reflective layer.
• LED light emitting diode
• LEDs Semiconductor light-emitting diodes
• Materials used in the manufacture of LEDs capable of operation across the visible spectrum include Group lll-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, which may be referred to as Ill-nitride materials.
• Ill-nitride devices are epitaxially grown on sapphire, silicon carbide, or Ill-nitride substrates by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Some of these substrates are insulating or poorly conducting.
• MOCVD metal-organic chemical vapor deposition
• MBE molecular beam epitaxy
• Devices fabricated from semiconductor crystals grown on such substrates may have both the positive and the negative polarity electrical contacts to the epitaxially-grown semiconductor on the same side of the device.
• semiconductor devices grown on conducting substrates may be fabricated such that one electrical contact is formed on the epitaxially grown material and the other electrical contact is formed on the substrate.
• devices fabricated on conducting substrates may also be designed to have both contacts on the same side of the device on which the epitaxial material is grown in a flip-chip geometry so as to improve light extraction from LED chip, to improve the current- carrying capacity of the chip, or to improve the heat-sinking of the LED die.
• the contacts may be electrically isolated from each other such that electrical carriers of the appropriate polarity are injected into the p-type and n-type sides of the semiconductor junction, where they recombine to produce light.
• FIG. 1 a cross-section view illustrating an example Ill-nitride LED device 100 is shown.
• One or more semiconductor layers including, for example, an n-layer 102, an active region 104, and a p-layer 106 may be epitaxially grown on a substrate 108.
• a p-contact 110 and an n-contact 112 may be formed on the same side of the device as described above. Electrical isolation between the p-contact 110 and the n-contact 112 may be achieved by etching a mesa structure 114 into the device extending from the topmost layer down into the underlying n-layer 102 and forming a separate defined p-contact 110 and n-contact 112.
• the LED may be mounted to a submount assembly 116, which may include a submount on which the LED is mounted with solder bumps.
• the solder bumps may create a gap between the submount and the LED.
• the connected LED and submount assembly may then be encapsulated in a high index of refraction gel or epoxy.
• the high index gel or epoxy may be selected to match an index of refraction of the substrate 108 as closely as possible, since the light produced in the device may be extracted through the substrate 108.
• the difference in index of refraction determines how much light is reflected at that interface, and how much light is transmitted through it. The larger the difference in index of refraction, the more light is reflected.
• the small difference between the index of refraction of the sapphire substrate and the high index gel or epoxy encapsulating the device may ensure that most of the light generated in the device that reaches the emitting surfaces of the substrate 108 is extracted from the device.
• Photons may be generated within the active region 104. Extracting the photons from the semiconductor active region 104 into the LED package and outside may difficult due, in part, to the high indices of refraction of the semiconductor layers. Photons generated within the epitaxial semiconductor layer may be incident upon either the interface between the semiconductor layers and the substrate 108, the interface of a wall 122 of the mesa 114 and the high index gel or epoxy in the submount assembly 116, or the interface between the semiconductor layers and the metal contacts. Photons incident on any of the three interfaces face a step in material refractive index.
• Such a step in refractive index may cause a ray 118 incident on such an interface to be split into a transmitted portion 118a and a reflected portion 118b.
• Light transmitted out from the wall 122 of the mesa 114 i.e. portion 118a
• portion 118a may not be directed out of the device in a useful direction.
• light lost through transmission at the wall 122 of the mesa 114 may contribute to a low light extraction efficiency of the Ill-nitride LED device 100.
• the high index gel or epoxy encapsulating the device may result in a small difference in refractive index at the interface at the wall 122 of the mesa 114 between the semiconductor layers between the contacts and the submount assembly 116. As a result, much of the light incident on this area may be transmitted in the direction of the submount assembly, which may cause significant optical loss. As described above, light extracted in the area towards the submount assembly 116 may not be usefully extracted from the Ill-nitride LED device 100.
• Attenuation can occur at all places within the semiconductor, but is likely to be largest at the interfaces, for example between the n-layer 102 and the substrate 108; between the semiconductor layers and the contacts; in the active region 104; and in any nucleation layer present between the n-layer 102 and the substrate 108.
• Light rays travelling through the semiconductor layer with a large angle b, the angle of propagation relative to the substrate 108 may require a longer path length to travel a given distance in the semiconductor resolved parallel to the substrate 108 compared with light rays with a small angle b.
• a ray propagating at angle b may propagate at an angle -b upon reflection.
• Large angle b rays may pass a greater number of times through the active region 104 and may be reflected off the various interfaces a greater number of times.
• Such rays may therefore be subject to greater attenuation per unit distance of propagation in the x-direction than rays travelling at shallower angles b.
• most of the flux (optical power) incident on the wall 122 of the mesa 114 is incident at shallow angles b.
• 70% or more of the total flux incident on the wall 122 of the mesa 114 may be incident at an angle of in the range of approximately -10 degrees ⁇ b ⁇ 30 degrees.
• 70% or more of the total flux incident on the wall 122 of the mesa 114 may be incident at an angle of in the range of approximately -10 degrees ⁇ b ⁇ 30 degrees.
• the proportion of flux incident on the wall 122 of the mesa 114 within this same angular range may fall to about 60%.
• a reflective layer 120 may be used to reflect light emitted from the active region
• the reflective layer 120 may compose one or more of dielectric layers, metal stacks, composite mirrors, or distributed Bragg reflectors (DBR).
• the reflective layer 120 may be formed on the wall 122 of the mesa 114 to maximize the reflection of light incident on the wall 122 of the mesa 114.
• the reflective layer 120 may include a transparent conducting layer, a dielectric layer, and a metal mirror.
• a composite mirror may require the metal mirror to be formed directly on the dielectric layer.
• the metal mirror may compose a noble metal, such as, for example silver (Ag) or gold (Au).
• the dielectric layer may compose any insulating material, such as, for example, an oxide or nitride of silicon or magnesium fluoride.
• a noble metal such as Ag
• a dielectric material such as silicon oxide.
• the poor adhesion may introduce problems during fabrication processes and may reduce the reflectivity of the reflective layers.
• An upper surface of the dielectric layer may be roughened prior to deposition of the metal mirror to increase adhesion.
• the development of surface features and increased surface area of the roughened surface may promote adhesion between the noble metal and dielectric material, Flowever, this may not be enough to ensure proper and/or sufficient adhesion.
• An adhesion layer may be introduced between the dielectric layer and the metal mirror to increase the adhesion between the two. Flowever, most adhesives layers are optically absorptive and may negatively affect the reflectivity of the reflective layer.
• FIG. 2 a cross-section view illustrating forming a dielectric layer
• the emission layer 202 may contain a first semiconductor layer 206, an active region 208, and a second semiconductor layer 210.
• the emission layer 202 may be formed on a substrate 212.
• the substrate 212 may compose silicon or a crystalline material, such as aluminum oxide, and may be a commercial sapphire wafer.
• the first semiconductor layer 206 may compose any Group lll-V semiconductors, including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as Ill-nitride materials.
• the first semiconductor layer 402 may compose lll-V semiconductors including but not limited to AIN, AIP, AIAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, InSb, ll-VI semiconductors including but not limited to ZnS, ZnSe, CdSe, CdTe, group IV semiconductors including but not limited to Ge, Si, SiC, and mixtures or alloys thereof.
• These semiconductors may have indices of refraction ranging from about 2.4 to about 4.1 at the typical emission wavelengths of LEDs in which they are present.
• Ill-nitride semiconductors such as GaN
• Ill-phosphide semiconductors such as InGaP
• the first semiconductor layer 402 may compose GaN.
• the first semiconductor layer 206 may be formed using conventional deposition techniques, such as MOCVD, MBE, or other epitaxial techniques.
• the first semiconductor layer 206 may be doped with n-type dopants.
• the second semiconductor layer 210 and the active region 208 may compose any
• Group lll-V semiconductors including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as Ill-nitride materials.
• the second semiconductor layer 210 and the active region 210 may compose lll-V semiconductors including but not limited to AIN, AIP, AIAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, InSb, ll-VI semiconductors including but not limited to ZnS, ZnSe, CdSe, CdTe, group IV semiconductors including but not limited to Ge, Si, SiC, and mixtures or alloys thereof.
• These semiconductors may have indices of refraction ranging from about 2.4 to about 4.1 at the typical emission wavelengths of LEDs in which they are present.
• Ill-nitride semiconductors such as GaN
• Ill-phosphide semiconductors such as InGaP
• the second semiconductor layer 210 and the active region 208 may compose GaN.
• the second semiconductor layer 210 and the active region 208 may be formed using conventional deposition techniques, such as MOCVD, MBE, or other epitaxial techniques.
• the active region 208 and the second semiconductor layer 210 may be formed along with the first semiconductor layer 206 or may be formed separately.
• the active region 208 and the second semiconductor layer 210 may compose a similar semiconductor material as the first semiconductor layer 206 or their composition may vary.
• the second semiconductor layer 210 may be doped with p-type dopants.
• the active region 208 may be a p-n diode junction associated with the interface of the first semiconductor layer 206 and the second semiconductor layer 210.
• the active region 208 may include one or more semiconductor layers that are doped n-type, doped p-type, or are undoped.
• the active region 208 may emit light upon application of a suitable voltage through the first semiconductor layer 206 and the second semiconductor layer 210.
• the conductivity types of the first semiconductor layer 206 and the second semiconductor layer 210 may be reversed. That is, the first semiconductor layer 206 may be a p- type layer and the second semiconductor layer 210 may be an n-type layer.
• the emission layer 202 may take any shape.
• the emission layer 202 may be shaped like a mesa as described above with reference to FIG. 1.
• the emission layer 202 may be segmented from other semiconductor layers and may be separated from another emission layer by a trench or an isolation region.
• the dielectric layer 204 may be formed on an upper surface 214 of the emission layer 202.
• the dielectric layer 204 may compose one or more dielectric materials, such as, an oxide, a nitride, or an oxynitride.
• the dielectric layer 204 may compose silicon oxide.
• the dielectric layer 204 may compose a metal fluoride such as magnesium fluoride.
• the dielectric layer 204 may be formed using a conventional deposition technique, such as, for example, CVD, plasma enhanced chemical vapor deposition (PECVD), MOCVD, atomic layer deposition (ALD), evaporation, reactive sputtering, chemical solution deposition, spin-on deposition, or other like processes.
• the dielectric layer 204 may have a thickness T 204 ranging from approximately 100 nm to approximately 1000 nm.
• the dielectric layer 204 may be patterned and etched using conventional techniques.
• the dielectric layer 204 may be formed on any surface depending on the configuration of the emission layer 202.
• the dielectric layer 204 may be in contact with the first semiconductor layer 206, the active region 208, and the second semiconductor layer 210 as seen above with reference to FIG. 1.
• the dielectric layer 204 may be formed on a lower surface 216 of the substrate 212.
• the dielectric layer 204 may be formed on a phosphor region (not shown) formed on the emission layer 202 to wavelength convert emitted light.
• FIG. 3 a cross section view illustrating forming an intermediate layer 302 on the dielectric layer 204 is shown.
• the intermediate layer 302 may compose a material with a higher enthalpy of reaction than the material of the dielectric layer 204.
• the intermediate layer 302 may compose one or more materials having a higher enthalpy of oxidation than the material of the dielectric layer 204.
• the intermediate layer 302 may compose one or more materials having a higher enthalpy of fluoridation than the material of the dielectric layer 204.
• the intermediate layer 302 may compose atoms of one or more metallic materials, such as for example, Mg, Al, Ge, Ti, Si, Ta, Mn, W, Co, Ni, Cu, Ru, Pd, Pt, and Ag.
• the intermediate layer may compose Al, which may have a negative heat of oxide formation of approximately 550 kJ/mol per bond formed to approximately 600 kJ/mol per bond formed. This may be greater than the negative heat of oxide formation of silicon dioxide, which may be approximately 400 kJ/mol per bond formed to approximately 500 kJ/mol per bond formed.
• the intermediate layer 302 may adhere well to the dielectric layer 204.
• the intermediate layer 302 may be formed using a conventional deposition technique, such as, for example, CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other like processes.
• the intermediate layer 302 may have a thickness T 302 ranging from approximately 1 angstrom to approximately 50 angstroms. In an example, the intermediate layer 302 may have a thickness T30 2 ranging from approximately 5 angstroms to approximately 20 angstroms.
• the metal layer 402 may compose one or more metallic materials that reflect light.
• the metal layer 402 may compose a noble metal, such as Ru, Rh, Pd, Ag, Os, Ir, Pd, and Au.
• the metal layer 402 may compose stacks of one or more of the metals described above.
• the metal layer 402 may be formed using a conventional deposition technique, such as, for example, CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other like processes.
• the metal layer 402 may have a thickness T 402 ranging from approximately 50 nm to approximately 1000 nm.
• the intermediate layer 302 may adhere well to the metal layer 402.
• atoms in the intermediate layer 302 may partially react with atoms from the underlying dielectric layer 204 and the intermediate layer 302 may become optically transparent. Because the intermediate layer 302 may have a higher enthalpy of reaction than the underlying dielectric layer 204, the atoms that form the adhesive layer may break bonds between one another and form bonds with atoms in the dielectric layer 204 For example, if Al is used to form the intermediate layer 302 and silicon oxide is used to form the dielectric layer 204, the Al atoms may break the existing Si-0 bond in the dielectric layer 204 and form a single AI-0 bond. Where the dielectric layer 204 may have had Si-O-Si bonds, it may now contain Si-O-AI bonds with a dangling bond on the Si that may terminate with an Al atom.
• the enthalpy of reaction serves as a guide to predict which bonds between the intermediate layer 302 and the dielectric layer 204.
• breaking a Si-0 bond and forming an AI-0 bond is energetically favorable due to the intermediate layer 302 having a higher enthalpy of oxidation, thereby enabling the adhesion.
• the thickness T30 2 of the intermediate layer 302 may be sufficient to improve the adhesive force between the dielectric layer 204 and the metal layer 402, but not too thick such that most of the material in the intermediate layer 302 does not react with the underlying dielectric layer 204.
• the resulting bonds may produce oxides with a large band gap. This may allow protons emitted from the active region 208 to pass through the dielectric layer 204 and the intermediate layer 302 with little to no resistance and reflect off of the metal layer 402. In other words, because of the large band gap, the dielectric layer 204 and the intermediate layer 302 may be substantially transparent to light emitted from the active region 208.
• FIGs. 5A-5B transmission electron microscope (TEM) micrographs illustrating a cross section of an exemplary reflective layer 404 is shown.
• FIG. 5A shows the emission layer 202, the dielectric layer 204, the intermediate layer 302, and the metal layer 402.
• FIG. 5B is a magnification of the reflective layer 404 showing the dielectric layer 204, the intermediate layer 302, and the metal layer 402.
• atoms of the intermediate layer 302 may have reacted with atoms of the dielectric layer 204 to form an adhesive bond.
• the reflective layer 404 may be used in all optically sensitive interfaces that require good adhesion between a dielectric layer and noble metal.
• the reflective layer 404 may be formed on any surface of a substrate on which one or more semiconductor layers are formed.
• the reflective layer 404 may be formed on a phosphor region used to wavelength convert light emitted from an active region.
• a vacuum may be formed.
• the dielectric layer 204 may be formed using one or more of the methods described above without breaking the vacuum.
• the intermediate layer 302 may be formed using one or more methods described above without breaking the vacuum.
• the metal layer 402 may be formed using one or more of the methods described above without breaking the vacuum.
• the vacuum may be broken.
• a vacuum may be formed.
• the dielectric layer 204 may be formed using one or more of the methods described above without breaking the vacuum.
• the intermediate layer 302 may be formed using one or more methods described above without breaking the vacuum.
• the vacuum may be broken.
• the metal layer 402 may be formed using one or more of the methods described above.
• a second vacuum may be formed prior to performing step 710.
• a vacuum may be formed.
• the dielectric layer 204 may be formed using one or more of the methods described above without breaking the vacuum.
• the vacuum may be broken.
• the intermediate layer 302 may be formed using one or more methods described above.
• the metal layer 402 may be formed using one or more of the methods described above.
• a second vacuum may be formed prior to performing step 808 or step 810.
• a flow chart illustrating another method of forming the reflective layer 404 is shown.
• a vacuum may be formed.
• the dielectric layer 204 may be formed using one or more of the methods described above without breaking the vacuum.
• the intermediate layer 302 may be formed using one or more methods described above without breaking the vacuum.
• the vacuum may be broken.
• a native oxide may form on an upper surface of the intermediate layer 302.
• the native oxide may interfere with adhesion between the intermediate layer 302 and the dielectric layer 204 and/or the metal layer 402.
• the upper surface of the intermediate layer 302 may be cleaned and prepared to remove the layer of the native oxide.
• the cleaning and preparation may include any conventional washing, etching, or planarization process.
• the metal layer 402 may be formed after the native oxide is removed using one or more of the methods described above.
• a second vacuum may be formed prior to performing step 910 or step 912.
• Examples of computer-readable media include electronic signals (transmitted over wired or wireless connections) and computer-readable storage media.
• Examples of computer-readable storage media include, but are not limited to, a read only memory (ROM), a random access memory (RAM), a register, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs).

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• 2019
  • 2019-01-28 EP EP19703229.5A patent/EP3743949A1/de active Pending
  • 2019-01-28 TW TW108103146A patent/TWI703740B/zh active
  • 2019-01-28 KR KR1020207024642A patent/KR20200121815A/ko not_active Application Discontinuation
  • 2019-01-28 CN CN201980022360.2A patent/CN111971806A/zh active Pending
  • 2019-01-28 WO PCT/US2019/015329 patent/WO2019148064A1/en unknown

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