EP3595203A4 - Verfahren zur geschichteten decodierung für ldpc-code und vorrichtung dafür - Google Patents

Verfahren zur geschichteten decodierung für ldpc-code und vorrichtung dafür Download PDF

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Publication number
EP3595203A4
EP3595203A4 EP17899375.4A EP17899375A EP3595203A4 EP 3595203 A4 EP3595203 A4 EP 3595203A4 EP 17899375 A EP17899375 A EP 17899375A EP 3595203 A4 EP3595203 A4 EP 3595203A4
Authority
EP
European Patent Office
Prior art keywords
stratified
decoding
ldpc code
ldpc
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP17899375.4A
Other languages
English (en)
French (fr)
Other versions
EP3595203B1 (de
EP3595203A1 (de
Inventor
Kwangseok Noh
Dongkyu Kim
Myeongjin Kim
Sangrim LEE
Hojae Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
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LG Electronics Inc
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Publication date
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Publication of EP3595203A1 publication Critical patent/EP3595203A1/de
Publication of EP3595203A4 publication Critical patent/EP3595203A4/de
Application granted granted Critical
Publication of EP3595203B1 publication Critical patent/EP3595203B1/de
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Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/114—Shuffled, staggered, layered or turbo decoding schedules
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6575—Implementations based on combinatorial logic, e.g. Boolean circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
EP17899375.4A 2017-03-09 2017-03-09 Verfahren zur geschichteten decodierung für ldpc-code und vorrichtung dafür Active EP3595203B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/KR2017/002546 WO2018164297A1 (ko) 2017-03-09 2017-03-09 Ldpc 코드의 계층적 복호화 방법 및 이를 위한 장치

Publications (3)

Publication Number Publication Date
EP3595203A1 EP3595203A1 (de) 2020-01-15
EP3595203A4 true EP3595203A4 (de) 2020-12-02
EP3595203B1 EP3595203B1 (de) 2021-11-10

Family

ID=63447922

Family Applications (1)

Application Number Title Priority Date Filing Date
EP17899375.4A Active EP3595203B1 (de) 2017-03-09 2017-03-09 Verfahren zur geschichteten decodierung für ldpc-code und vorrichtung dafür

Country Status (5)

Country Link
US (1) US11206042B2 (de)
EP (1) EP3595203B1 (de)
JP (1) JP6821825B2 (de)
CN (1) CN110383727B (de)
WO (1) WO2018164297A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102525414B1 (ko) * 2020-07-29 2023-04-25 한국전자통신연구원 LDPC(low-density parity-check) 부호의 복호화 방법 및 장치
CN114415817B (zh) * 2020-10-28 2024-05-07 北京小米移动软件有限公司 显示控制方法、电子设备及存储介质
EP4329202A4 (de) 2021-05-25 2024-10-16 Samsung Electronics Co., Ltd. Auf neuronalem netzwerk basierender selbstkorrigierender min-sum-decodierer und elektronische vorrichtung damit
US11817952B2 (en) * 2022-01-31 2023-11-14 Dialog Semiconductor (Uk) Limited Systems and methods for providing end-to-end data protection
CN118484152B (zh) * 2024-07-16 2024-09-24 济南浪潮数据技术有限公司 数据的调用方法及装置、存储介质及电子设备

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US8984376B1 (en) * 2013-03-14 2015-03-17 Pmc-Sierra Us, Inc. System and method for avoiding error mechanisms in layered iterative decoding
US9136877B1 (en) * 2013-03-15 2015-09-15 Sandisk Enterprise Ip Llc Syndrome layered decoding for LDPC codes

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JP2005045735A (ja) 2003-07-25 2005-02-17 Sony Corp 符号検出装置及び方法、復号装置及び方法、並びに情報処理装置及び方法
KR101147768B1 (ko) 2005-12-27 2012-05-25 엘지전자 주식회사 채널 코드를 이용한 복호화 방법 및 장치
JP2009100222A (ja) 2007-10-16 2009-05-07 Toshiba Corp 低密度パリティ検査符号の復号装置およびその方法
JP5493602B2 (ja) * 2009-08-31 2014-05-14 富士通株式会社 復号化装置及び復号化方法
JP5790029B2 (ja) * 2011-03-01 2015-10-07 ソニー株式会社 復号装置、復号方法、およびプログラム
US8826096B2 (en) 2011-12-29 2014-09-02 Korea Advanced Institute Of Science And Technology Method of decoding LDPC code for producing several different decoders using parity-check matrix of LDPC code and LDPC code system including the same
KR101968746B1 (ko) * 2011-12-30 2019-04-15 삼성전자주식회사 저장 장치로부터 데이터를 읽는 읽기 방법, 에러 정정 장치, 그리고 에러 정정 코드 디코더를 포함하는 저장 시스템
US9141467B2 (en) * 2012-03-23 2015-09-22 Samsung Electronics Co., Ltd. Semiconductor memory system including Reed-Solomon low density parity check decoder and read method thereof
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US8984376B1 (en) * 2013-03-14 2015-03-17 Pmc-Sierra Us, Inc. System and method for avoiding error mechanisms in layered iterative decoding
US9136877B1 (en) * 2013-03-15 2015-09-15 Sandisk Enterprise Ip Llc Syndrome layered decoding for LDPC codes

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See also references of WO2018164297A1 *

Also Published As

Publication number Publication date
CN110383727A (zh) 2019-10-25
EP3595203B1 (de) 2021-11-10
US20210218418A1 (en) 2021-07-15
EP3595203A1 (de) 2020-01-15
JP6821825B2 (ja) 2021-01-27
WO2018164297A1 (ko) 2018-09-13
US11206042B2 (en) 2021-12-21
JP2020511079A (ja) 2020-04-09
CN110383727B (zh) 2022-01-11

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