EP3500818A1 - Système d'exploseur-détonateur électronique - Google Patents

Système d'exploseur-détonateur électronique

Info

Publication number
EP3500818A1
EP3500818A1 EP17768867.8A EP17768867A EP3500818A1 EP 3500818 A1 EP3500818 A1 EP 3500818A1 EP 17768867 A EP17768867 A EP 17768867A EP 3500818 A1 EP3500818 A1 EP 3500818A1
Authority
EP
European Patent Office
Prior art keywords
iccu
edm
detonator
control circuit
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP17768867.8A
Other languages
German (de)
English (en)
Other versions
EP3500818B1 (fr
Inventor
Ravi Theja PAVULURI
Rama Lakshmana Rao PAVULURI
Bharath PAVULURI
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of EP3500818A1 publication Critical patent/EP3500818A1/fr
Application granted granted Critical
Publication of EP3500818B1 publication Critical patent/EP3500818B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F42AMMUNITION; BLASTING
    • F42DBLASTING
    • F42D1/00Blasting methods or apparatus, e.g. loading or tamping
    • F42D1/04Arrangements for ignition
    • F42D1/045Arrangements for electric ignition
    • F42D1/05Electric circuits for blasting
    • F42D1/055Electric circuits for blasting specially adapted for firing multiple charges with a time delay

Definitions

  • the present invention relates to a novel electronic detonator-exploder system having a novel delay setting technique for each detonator units of said system.
  • the present invention is particularly useful in setting and executing precise delays in explosives used in mining and construction. Background of the invention:
  • a detonator is a device used to initiate an explosive process in an explosive device.
  • Detonators can be chemically, mechanically, or electrically initiated.
  • Commercial explosives use electrical detonators or the capped fuse which is a length of safety fuse to which an ordinary detonator is been crimped.
  • IED instantaneous electrical detonators
  • SPD short period delay detonators
  • LPD long period delay detonators
  • Electronic detonators In mining, electronic detonators have a better precision for delays. Electronic detonators are designed to provide the precise control necessary to produce accurate and consistent blasting results in a variety of blasting applications in mining, quarrying, and construction industries. Electronic detonators may be programmed in 1 -millisecond increments from 1 millisecond to many seconds using the dedicated programing device. There are a variety of electronic detonators offering features like verification of the connections, wide delay range, high precision etc. However, there exists a gap in terms of a robust two-way communication between the control unit and the field detonator apart from diagnostic facilities to ensure high reliability. This invention proposes to overcome some of the limitations of known devices while offering many new features.
  • US patent document US8176848 discloses a system and a method for conducting a firing sequence including a master device and a plurality of electronic pyrotechnic devices.
  • the disadvantage of the technique disclosed in US8176848 is that two different control units are required for executing the detonation process which further demands two different supply voltages. Further the communication from detonator's ASIC chip to logger is by current modulation and this mode of communication is prone to errors.
  • the invention disclosed in EP0434883 relates to an exploder detonator unit capable of electronically sequencing a blast.
  • the disadvantage associated with EP0434883 is that identification system for each individual detonator follows a complex model based on 'delay loaded' and 'directive of each detonator'.
  • Another disadvantage of the invention disclosed in EP0434883 is the mode of communication technique. The communication messages are sent and received by superimposing voltages on the supply lines. Two-pass channel is used to differentiate communication signals and supply voltage. In such communication mechanism, as suggested in EP0434883, there is every possibility of errors due to noise or other external disturbances.
  • known detonator-exploder system have error rate of up to 20% in the delay set for individual detonators using fuse mechanism
  • none of the known detonator-exploder systems is able to check the electrical connectivity of the connected detonators before giving the 'FIRE' command, none of the known detonator-exploder systems are able to read delays of individual detonators while and after placing them on the field,
  • the inventors felt the need to develop a novel detonator-exploder system having precise timing for individual detonators that will eventually result in the most efficient explosion.
  • the present invention proposes a system in which the final result would be closer to their theoretical calculations. Increased precision in the delay, as proposed in the present invention, will help to achieve a better result in all applications.
  • the present invention provides a novel electronic detonator-exploder system comprising one exploder unit and plurality of detonator connected to said exploder unit,
  • said exploder unit is electrically powered by a power source and is provided with an integrated command and control unit for setting predefined delay in each of said detonator units, said integrated command and control unit comprises:
  • a power source control circuit for monitoring the voltage level of said power source
  • an input device for:
  • an ICCU pulse-generator and pulse-detector circuit for sending commands to said detonator units in the form of PRE-FIRE command and FIRE command and receiving messages to and from said detonator units , and
  • an ICCU control circuit linked with said input device for receiving commands from said input device, and for sending and receiving communication messages to and from said detonator units,
  • each of said detonator units is provided an electronic delay module (EDM) unit for counting down said set predefined delay to initiate the process of explosion
  • said electronic delay module (EDM) unit comprises: - an EDM rectifier circuit connected to a power supply line and fed with voltage of predefined value
  • an inrush current limiter connected in series with said power supply line, for rendering a detonator unit inoperative if voltage applied at input terminals of any said detonator units exceeds a predefined value
  • an EDM pulse-generator and pulse-detector circuit for reading PRE-FIRE and FIRE commands generated from said exploder unit and for generating and receiving communication message transmitted to and from said exploder unit
  • Another object of the invention is to provide a novel exploder unit for an electronic detonator- exploder system wherein said exploder unit is electrically powered by a power source and is provided with an integrated command and control unit for setting predefined delay in detonator units, said integrated command and control unit comprises:
  • a power source control circuit for monitoring the voltage level of said power source
  • an input device for:
  • an ICCU pulse-generator and pulse-detector circuit for sending commands to said detonator units in the form of PRE-FIRE command and FIRE command and receiving messages to and from said detonator units , and
  • an ICCU control circuit linked with said input device for receiving commands from said input device, and for sending and receiving communication messages to and from said detonator units.
  • Yet another object of the invention is to provide a novel detonator unit for an electronic detonator-exploder system wherein said detonator unit is provided with an electronic delay module (EDM) unit comprising :
  • EDM electronic delay module
  • an inrush current limiter connected in series with said power supply line, for rendering a detonator unit inoperative if voltage applied at input terminals of any said detonator units exceeds a predefined value
  • an EDM pulse-generator and pulse-detector circuit for reading PRE-FIRE and FIRE commands generated from said exploder unit and for generating and receiving communication message transmitted to and from said exploder unit
  • an energy transfer means for detonation process an EDM control circuit for:
  • said EDM is provided with a timing circuit with an oscillator to produce the required clock for the operation of the EDM control circuit and for deciding the operating frequency of the EDM control circuit which in turn decides the precision and accuracy of the system's operation, and a backup voltage supply means for providing backup voltage to the EDM control circuit.
  • said power source is an AC power source connected to said power source control circuit.
  • said power source is an AC power source connected to said power source control circuit and wherein said integrated command and control unit is provided with an auxiliary power source and wherein said power source control circuit protects said auxiliary power source from overcharging.
  • said power source is in the form of an electric energy storage device connected to said power source control circuit.
  • said integrated command and control unit is provided with a rectifier block to provide protection to said integrated command and control if power supply cables are connected with opposite polarity to terminals of said integrated command and control unit.
  • said integrated command and control unit is provided with status indicators to indicate the availability of input power and power level of said power source.
  • said integrated command and control unit is provided with display means to display status information and/or attendance of said detonator units.
  • the input device may be adapted for inputting detonator access code.
  • said electronic delay module (EDM) unit is provided with an EDM rectifier circuit for rectifying input AC voltage to DC voltage.
  • said energy transfer means is in the form of a fuse.
  • said energy source is in the form of a firing capacitor and wherein said EDM control circuit is configured to check the capacitance of said charging capacitor.
  • said electronic delay module (EDM) is fed with voltage output from said integrated command and control unit.
  • said communication messages are generated from said electronic delay module (EDM) unit by reducing the voltage in said electronic delay module's (EDM) supply line to zero volts, by means of said EDM control circuit , and thereupon checking the duration for which said supply line's voltage is maintained at zero. The voltage in said supply line may be reduced to zero volts by shorting said supply line to ground.
  • said integrated command and control unit is configured to detect the change in voltage in said supply line and thereby decode said communication messages.
  • said power source control circuit is provided with a feedback line for sending the voltage level across the power source to said ICCU control circuit and a control line through which said ICCU control switches OFF/ON said power source control circuits based on feedback received via said feedback line.
  • said power source control circuit comprises two semiconductor switches, a first semiconductor switch and a second semiconductor switch , which are interconnected to drive said power source control circuit such that when both the semiconductor switches are in OFF position, current will not flow through either of said semiconductor switches and when the gate of said first conductor switch is driven , the gate of said second conductor switch conducts for charging said auxiliary power source.
  • said ICCU pulse-generator and pulse- detector circuit comprises of three semiconductor switches, namely
  • a third semiconductor switch controlled by said ICCU control circuit through a first control line, said third semiconductor switch remains OFF when said integrated command and control is not in communication mode
  • a fourth semiconductor switch controlled by said third semiconductor switch through a second control line, to switch ON/OFF the communication mode of said integrated command and control unit
  • a fifth semiconductor switch controlled by said by said ICCU control circuit, said fifth semiconductor switch is switched ON to maintain voltage level in said ICCU pulse-generator and pulse-detector circuit is zero when said integrated command and control unit is not in communication mode
  • said ICCU pulse-generator and pulse-detector circuit is provided with two feedback lines, a first feedback line, and a second feedback line, connected to said ICCU control circuit and wherein said ICCU control circuit determines short circuit at the voltage output of said ICCU pulse-generator and pulse-detector circuit from the difference in voltage detected by said first feedback line and said second feedback line.
  • said EDM pulse-generator and pulse-detector circuit comprises a transistor for sending communication messages from the EDM unit to the integrated command and control unit, and wherein said transistor is controlled by said EDM control circuit so that when transistor is switched ON input voltage of said EDM pulse-generator and pulse-detector circuit's is reduced to zero for a predefined duration and wherein said EDM pulse-generator and pulse-detector circuit is provided with a feedback line connected to said EDM control circuit to detect the voltage change in said EDM pulse-generator and pulse-detector circuit.
  • said electronic delay module is provided with a back-up voltage supply means for providing requisite voltage to said EDM control circuit in absence of voltage in said supply line.
  • said input device is provided with a defuse key which when actuated initiates discharging of said firing capacitor of said electronic delay module (EDM) unit.
  • said integrated command and control unit is password protected and said password is set and entered by means of said input device.
  • said integrated command and control unit is configured to read serial numbers of said electronic delay module (EDM) units.
  • said energy source may be in the form of a firing capacitor and said EDM control circuit is configured to check the capacitance of said firing capacitor.
  • the invented system proposes to offer high precision and is more advanced than known techniques and mechanisms of setting delay to individual detonators.
  • the invented electronic detonator-exploder system comprises of an exploder unit and plurality of detonator units connected to said exploder unit.
  • the invented system two types of messages are sent by the ICCU, namely individual messages and broadcast messages.
  • Individual messages are received and replied by detonator units based on time division multiplexing concept. Since each detonator is given a serial number the communication decoding and response to and from the detonator follows the serial number slot corresponding to the detonator. Detonator units with other serial numbers ignore the messages and not reply when the time slot is not directed to those serial numbers. This ensures a two-way communication which is immune to electromagnetic radiation and radio noise. Broadcast messages are from the ICCU to the detonator units only.
  • the switching element that connects the firing capacitor to the fuse can also be checked by the control unit. This feature offers avoiding a misfire.
  • the following verification is performed by the system after the 'pre-fire' command is issued:
  • Figure 1 is a block diagram of a preferred embodiment of invented detonator-exploder system.
  • Figure 2A is a block diagram of one embodiment of the integrated command and control unit (ICCU-1,) as proposed in the present invention.
  • Figure 2B is a block diagram of another embodiment of the integrated command and control unit (ICCU-2) as proposed in the present invention.
  • FIG. 2C is a block diagram of yet another embodiment of the integrated command and control unit (ICCU-3) as proposed in the present invention.
  • Figure 3 A is a circuit diagram of the ICCU rectifier block of the embodiment of the ICCU-1 illustrated in figure 2A.
  • Figure 3B is a circuit diagram of the ICCU rectifier block of the embodiment of the ICCU-2 illustrated in figure 2B.
  • Figure 4A is a circuit diagram of the power source control circuit of the ICCU- 1 illustrated in figure 2A.
  • Figure 4B is a circuit diagram of the power source control circuit of the ICCU-2 illustrated in figure 2B.
  • Figure 4C is a circuit diagram of the power source control circuit of the ICCU-3 illustrated in figure 2C.
  • Figure 5 A is a circuit diagram of the voltage regulation block of the ICCU-1 illustrated in figure 2A.
  • Figure 5B is a circuit diagram of the voltage regulation block of the ICCU-2 illustrated in figure 2B.
  • Figure 5C is a circuit diagram of the voltage regulation block of the ICCU-3 illustrated in figure 2C.
  • Figure 6A is a circuit diagram of the ICCU pulse-generator and pulse-detector circuit of the ICCU-1 illustrated in figure 2A.
  • Figure 6B is a circuit diagram of the ICCU pulse-generator and pulse-detector circuit of the ICCU-2 illustrated in figure 2B.
  • Figure 6C is a circuit diagram of the ICCU pulse-generator and pulse-detector circuit of the ICCU-3 illustrated in figure 2C.
  • Figure 7A is a block diagram of the input device of the ICCU- 1 illustrated in figure 2A.
  • Figure 7B is a block diagram of the input device of the ICCU-2 illustrated in figure 2B.
  • Figure 7C is a block diagram of the input device of the ICCU-3 illustrated in figure 2C.
  • FIG 8 is a block diagram of a preferred embodiment of the electronic delay module (EDM) unit as proposed in the present invention.
  • EDM electronic delay module
  • Figure 9 is a circuit diagram of the EDM rectifier circuit of the EDM unit according to a preferred embodiment of the invention.
  • Figure 10 is the pulse-generator and pulse-detector circuit of the EDM unit according to a preferred embodiment of the invention.
  • Figure 11 is a circuit diagram of the backup voltage supply means of the EDM unit according to a preferred embodiment of the invention.
  • Figure 12 is a circuit diagram of the energy source and the energy transfer means of the EDM unit according to a preferred embodiment of the invention.
  • Figure 13 is the timing circuit of the EDM unit according to a preferred embodiment of the invention.
  • the invented electronic detonator-exploder system (100) comprises of an exploder unit (102) and plurality of detonator units (104-1, 104-2,... ,104-n) connected to said exploder unit (102), as seen in figure 1.
  • the exploder unit (102) is provided with an integrated command and control unit (ICCU-1) for setting predefined delay in each of said detonator units (104-1, 104- 2,... ,104-n) and each of said detonator units (104-1, 104-2, ...104-n) is provided with an electronic delay module (EDM) unit for counting down said set delay to initiate the process of explosion.
  • EDM electronic delay module
  • the integrated command and control unit (ICCU-1), according to one embodiment of the invention, is electrically powered by the power source (P-1).
  • the ICCU-1 comprises, a ICCU rectifier block (106), a power source control circuit (108), an input device (110), an ICCU pulse-generator and pulse-detector circuit (112), a display means (114), an ICCU control circuit (116) , a voltage regulation block (118) , and status indicators (136).
  • the ICCU control circuit (116) is linked with:
  • the ICCU rectifier block (106) takes input from the power source (P-l) and gives stable DC supply as output.
  • This ICCU rectifier block (106) is configured to provide protection to the ICCU-1 even if supply cables are connected to the terminals (Ti-1, T 2 -l) with opposite polarity. This has high practical need in the actual field conditions. There could be situations when the positive and negative cables cannot be identified at a distance from the power supply.
  • the circuit of the ICCU rectifier block (106) prevents misfire and unintended firing in such events.
  • the ICCU rectifier block (106) has a bridge rectifier formed by diodes D 1; D 2 , D 3 and D 4 , as seen in figure 3A.
  • the integrated command and control unit is electrically powered by the power source (P-2) and comprises a ICCU rectifier block (206), a power source control circuit (208), an input device (210), an ICCU pulse-generator and pulse-detector circuit (212), a display means (214), an ICCU control circuit (216), a voltage regulation block (218), and status indicators (236).
  • the ICCU control circuit (216) is linked with:
  • the ICCU rectifier block (206) takes input from power source (P-2) and gives stable DC supply as output.
  • BTl is an auxiliary power source.
  • the power source control circuit (208) determines the optimum charging cycle of the auxiliary power source (BTl) and also protects the auxiliary power source (BTl) from overcharging and thus preventing it from damage.
  • the auxiliary power source (BTl) may be in the form of a battery which acts as a backup power source and supplies electric power to the ICCU-2 in case of power failure from the main power source (P-2).
  • This ICCU rectifier block (206) is configured to provide protection to the ICCU-2 even if supply cables are connected to the terminals (Tl-2, T2-2) with opposite polarity.
  • the circuit of the ICCU rectifier block (206) prevents misfire and unintended firing in such events.
  • the ICCU rectifier block (206) has a bridge rectifier formed by diodes D 1; D 2 , D 3 and D 4 , as seen in figure 3B.
  • the power source P-2 is an AC power source. It is also possible to replace the AC power source with a DC power source, such a battery, which will charge the auxiliary power source (BT1).
  • the integrated command and control unit comprises a battery (BT2) which is the power source, a power source control circuit (308), an input device (310), an ICCU pulse-generator and pulse- detector circuit (312), a display means (314), an ICCU control circuit (316) and a voltage regulation block (318).
  • the ICCU control circuit (316) is linked with:
  • the power source control circuit (108) has a feedback line.
  • the resistors Ri and R 2 form a divider bridge. This divider bridge lets the ICCU control circuit (116) to know if main power is available or not.
  • This power source control circuit (108) can also be constructed using a combination of active and passive devices.
  • the power source control circuits 208 and 308 have identical construction.
  • the power source control circuit (208) has a feedback line (shown as feedback A) and a control line.
  • the feedback is received by the ICCU control circuit (216) thus enabling it to switch OFF/ON the power source control circuit (208) via the control line.
  • the feedback line sends the voltage level across the ICCU power source control circuit (208) having the auxiliary power source (BT1).
  • the resistors Ri and R 2 form a divider bridge to step down the voltage suitable for operation of electronic switching devices and provide feedback about the status of VIN to the ICCU control circuit (216).
  • the resistors R 3 , R 4 and R5 limit current flowing through the switching elements.
  • the resistors R 6 , R form a divider bridge to create a reference value for the feedback signal of ICCU control circuit (216).
  • the first semiconductor switch Qi and the second semiconductor switch (Q 2 ) are MOSFETS and are interconnected to drive the power source control circuit (208). When both the semiconductor switches Qi and Q 2 are in OFF position, current will not flow through either Qi or Q 2 .
  • the control line is connected to the ICCU control circuit (216) which in turn controls the switching element Qi.
  • Qi in turn controls Q2 that breaks or makes the current path from V M to the auxiliary power source (BTl).
  • This power source control circuit can also be constructed using standard battery charging ICs or a current and voltage controlling devices, or a combination of active and passive devices.
  • the capacitor Ci is provided to stabilize feedback.
  • the power source control circuit (308) has a feedback line and a control line.
  • the feedback is received by the ICCU control circuit (316) thus enabling it to switch OFF/ON the power source control circuit (308) via the control line.
  • the feedback line A sends the voltage level across the battery (BT2).
  • the resistors Ri and R 2 form a divider bridge to step down the voltage suitable for operation of electronic switching devices.
  • the resistors R 3 , R4 and R5 limit current flowing through the switching elements.
  • the resistors R 6 , R form a divider bridge to create a reference value for the feedback signal of ICCU control circuit (316).
  • the semiconductor switches (MOSFETs) Qi and Q 2 are interconnected to drive the power source control circuit (308).
  • each of the ICCU-1, ICCU-2 and ICCU-3 is provided with a respective voltage regulation block 118, 218, 318.
  • the voltage regulation block (118), as shown in figure 5 A, maintains the voltage coming from the ICCU rectifier block (106) at a constant value.
  • voltage regulation block (218), as shown in figure 5B maintains the voltage coming from the ICCU rectifier block (206) at a constant value; and voltage regulation block (318), as shown in figure 5C, maintains the voltage coming from the battery (BT2).
  • each of the voltage regulation block 118, 218, 318 maintains the output voltage from the respective ICCU rectifier blocks (106, 206) and said battery (BT2) at a constant predefined value.
  • Capacitors C 2 and C 3 act as decoupling capacitors to help stabilize the output (V OUT )- These capacitors (C 2 and C 3 ) remove sudden spikes and dips in the voltage output (V OUT ) and make it smoother.
  • FIG. 6A A preferred embodiment of the ICCU pulse-generator and pulse-detector circuit (112) of ICCU-1 has been shown in figure 6A.
  • This circuit (112) generates the required pulses for communication messages and commands such as FIRE and PRE-FIRE commands.
  • This circuit (112) also detects and decodes incoming messages from the connected EDM units of the respective detonator units (104-1, 104-2,.., 104-n).
  • the communication messages are in the form of pulses.
  • communication messages are sent from the ICCU-1 to the detonator units (104-1, 104-2, ..104-n) by cutting off the supply voltage, in effect making it zero.
  • the detonator units (104- 1, 104-2,...., 104-n) while communicating with the ICCU-1, short the supply line with ground in effect making it zero again.
  • Each individual message follows a defined pattern of active low duration juxtaposed with high.
  • the messages are encoded and decoded based solely on the duty cycle. In other words, the messages are encoded and decoded based on the duration the pulse remains at zero voltage.
  • the ICCU pulse-generator and pulse-detector circuit (112) has two control lines (viz. control line-1 and control line-2), and two feedback lines, namely a first feedback line and a second feedback line, shown as feedback line-1 and feedback line-2 in figure 6A respectively.
  • the ICCU control circuit (116) controls the switching element (a third semiconductor switch) Q 3 through the control line-1 which in turn controls the communication mode of the ICCU-1.
  • the switching element Q 3 in turn controls the fourth semiconductor switch (Q 4 ), Q 4 lets V_IN pass through D6, Rio to the connected EDM units.
  • the feedback line-1 helps the ICCU control circuit (116) to determine if there is any short circuit at V_OUT.
  • Feedback line-2 is also used for communication.
  • the change in voltage while receiving messages from EDM units is determined by detecting the voltage level between Rn and Ri 2 .
  • the fifth semiconductor switch (Q 5 ) is to ensure the voltage level reaches zero when the ICCU-1 is not in communication mode. When there is no communication happening, Q 3 is OFF.
  • Q5 is switched ON via control line 2 to make sure that the lines are connected to ground and the voltage remains at zero voltage.
  • Resistors R 6 , R 7 , and Ri 3 limit the current flowing through electronic switching elements. This is required to make sure the electronic devices do not get damaged.
  • the resistors R$, R9 and Rn, R12 form divider bridges. They help create reference values so the ICCU control circuit (116) can use them as reference points for further processing. Resistor Rio limits the current flowing out of the ICCU-1 to connected EDMs. Capacitors C 4 and C 5 act as decoupling capacitors which help stabilize the output voltage so it is smooth for ICCU control circuit (116) processing.
  • the components of the ICCU pulse-generator and pulse- detector circuits 212 and 312 function in the same way as the components of the ICCU pulse- generator and pulse-detector circuit 112, as explained above with reference to figure 6A.
  • Each of these sub-systems (112,212 and 312) can be constructed using a different combination of semiconductor devices or pulse generator or timer IC or bi-stable oscillator or any such similar devices.
  • the communication can also be achieved by wireless communication including but not limited to RF, Bluetooth, IR, Wi-fi.
  • each of the display means (114, 214, 314) interacts with the respective ICCU control circuit (116,216,316) in order to display concerned information.
  • the display means (114,214,314) is a LCD screen.
  • the display means can also be in the form of LED screen.
  • the display means (114,214,314) may also be external and not integrated with the ICCU.
  • FIG. 7A schematically shows how the pins of the input device (110) are connected to the ICCU control circuit (116). Few connections are provided to capacitors C6 to Cii in order to eliminate noise. While sending commands through the input mechanism, physical components are expected to generate noise. The capacitors C 6 to Cn help eliminate this noise.
  • the construction and functionality of the input devices 210,310 are identical with that of the input device 110.
  • the resistors Ri 4 , R15, Ri 6 , Ri 7 , Ri 8 and R19 are provided to pull down the voltage used to detect the switch state.
  • each EDM unit comprises an EDM rectifier circuit (120) fed with voltage of predefined value, an inrush current limiter (122) connected in series with said power supply line, an EDM pulse-generator and pulse-detector circuit (124), an energy source (126) with an energy transfer means (128) for detonation process, an EDM control circuit (130), a timing circuit (132) and a backup voltage supply means (134).
  • the EDM rectifier circuit (120) includes a full wave rectifier circuit comprising of the diodes D9, D10, Dl 1 and D12.
  • the EDM rectifier circuit (120) together with the inrush current limiter (122) protects the EDM unit from high input voltages and spikes.
  • the EDM rectifier circuit (120) ensures stable DC voltage supply to the EDM unit. Even if opposite terminals are connected at the EDM unit's input, this sub-system provides dedicated positive and negative DC voltage.
  • the inrush current limiter (122) renders said detonator unit (104) inoperative if voltage applied at input terminals of said detonator unit exceeds a predefined value.
  • the EDM pulse-generator and pulse-detector circuit (124) reads PRE-FIRE and FIRE commands generated from said exploder unit (102) and is configured for generating and receiving communication message transmitted to and from said exploder unit (102). In other words, said EDM pulse-generator and pulse-detector circuit (124) handles the messages being sent and received by each EDM units.
  • the feedback line-4 detects the voltage change in V M , which is the voltage received from said inrush current limiter (122). Since communication messages are modulation of the supply voltage, the changes are accurately measured by the EDM control circuit (130).
  • the diode D13 protects the EDM control circuit (130) from overvoltage by limiting the voltage on that path.
  • Transistor Q 6 which is a switching element, is used to send communication messages from the EDM unit to the ICCU.
  • switching element Q 6 is controlled by the control circuit (130).
  • the control circuit (130) By switching ON Q 6 , the voltage at V M is pulled to ground thus making the voltage zero for a predefined duration.
  • the EDM control circuit (130) operates Q 6 accordingly.
  • the messages are unique based on the duration the voltage is reduced to zero. Communication is achieved this way rather than superimposing voltage on the supply lines. This minimizes the possibility of communication errors.
  • Q 6 can also be a semiconductor switch of any type including a thyristor or a relay.
  • the resistors R 22 and R 23 ensure there is no floating voltage present on the Q 6 's control line.
  • the resistors R 2 o and R 2 i are provided to ensure limiting the power dissipation at Di 3 .
  • a backup voltage supply means (134) provides backup voltage to the EDM control circuit (130).
  • the input voltage of the EDM unit is stored in a second energy storage device, C 12 .
  • the diode D14 limits the voltage to protect the components from damage.
  • the diode D15 restricts the movement of current in a single direction.
  • This second energy storage device, C 12 provides backup energy to the EDM control circuit (130) in the absence of main power.
  • the circuit of backup voltage supply means (134) is configured to provide backup energy for the maximum delay time possible so the operation is ensured even without power supply.
  • a battery or any device capable of storing and discharging energy can also be used as a backup voltage supply means (134).
  • the EDM control circuit (130) consists of the microcontroller/IC that gathers input, processes it and produces required output.
  • the EDM control circuit can also be in the form of ASIC.
  • FIG 12 is the circuit diagram of the energy source (126) and the energy transfer means (128). This circuit handles the charging and discharging process of the energy source (126) that is used to initiate the explosion process.
  • the energy source (126) is in the form of a capacitor C 13 which can be charged, via R 26 , with signal received from said EDM control circuit ( 130) through the control line-4 .
  • the signal received through control line-5 is used to drive the switching element Q7.
  • the energy is discharged through Q7 in order to initiate the firing sequence.
  • the resistors R 24 and R 25 eliminate any floating charge present on Q7 by connecting to ground. Alternatively, a mechanical switching device or any electronic or electrical device that can close the circuit when activated can be used to implement this sub- system.
  • the resistor R 27 is meant to ensure the discharge of C 13 in the event system is left unattended.
  • the timing circuit (132) contains the oscillator (Yl) which produces the required clock for the operation of the EDM control circuit (130). This clock decides the operating frequency of the EDM control circuit (130) which ultimately decides the precision and accuracy of the system's (100) operation.
  • the capacitors CM and C 15 add the required capacitive load to the oscillator (Yl).
  • any timing/clock source can be used for this purpose. Even an internal source can be used to generate the clock cycles, but the accuracy and precision may not be achieved with that process.
  • the status indicators (136, 236, 336) are connected to the respective ICCU control circuit (116,216,316). These indicators (136, 236, 336) let the user know battery (BT1) status, battery (BT1) charging status, main power availability. In addition, certain indicators have been provided to indicate the status of operation of certain functions such as pre-fire, fire, attendance check among others. These indicators (136, 236,336) help user know the real-time status of these functions visually without having to press any key or perform any process.
  • Each of the ICCU control circuits (116,216,316) has the ability to read the serial number loaded into each EDM. While performing functions like read delay, attendance check, and load delay, the ICCU control circuit (116,216,316) reads the serial number of the EDM of respective detonator units (104-1, 104-2,...104n) and displays it via the display means (114, 214,314). While performing the function of read delay, each of the ICCUs (i.e. ICCU-1,ICCU- 2JCCU-3) displays the delay time and serial number of the respective EDM. Similarly, the ICCU (i.e. ICCU-1, ICCU-2, ICCU-3) displays the serial numbers of the present and missing EDMs when performing the attendance check. The provision of displaying the serial number ensures added security to the field user.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Air Bags (AREA)

Abstract

La présente invention concerne un nouveau système d'exploseur-détonateur électronique (100) comprenant un ensemble exploseur (102) et une pluralité d'ensembles détonateurs (104-1, 104-2, …, 104-n) raccordés audit ensemble exploseur (102). La présente invention est utile pour régler et exécuter des délais précis dans des explosifs pour l'exploitation minière et la construction. L'ensemble exploseur (102) est pourvu d'une unité de régulation et de commande intégrée (ICCU-1) pour régler un délai prédéfini dans chacun desdits ensembles détonateurs (104-1, 104-2, …, 104 -n), et chacun desdits ensembles détonateurs (104-1, 104-2, … 104-n) est pourvu d'un ensemble module de délai électronique (EDM) pour compter ledit délai réglé pour lancer le processus d'explosion.
EP17768867.8A 2016-08-19 2017-08-18 Système d'exploseur-détonateur électronique Active EP3500818B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN201641028312 2016-08-19
PCT/IB2017/055008 WO2018033881A1 (fr) 2016-08-19 2017-08-18 Système d'exploseur-détonateur électronique

Publications (2)

Publication Number Publication Date
EP3500818A1 true EP3500818A1 (fr) 2019-06-26
EP3500818B1 EP3500818B1 (fr) 2020-08-12

Family

ID=59901557

Family Applications (1)

Application Number Title Priority Date Filing Date
EP17768867.8A Active EP3500818B1 (fr) 2016-08-19 2017-08-18 Système d'exploseur-détonateur électronique

Country Status (2)

Country Link
EP (1) EP3500818B1 (fr)
WO (1) WO2018033881A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110768334A (zh) * 2019-11-05 2020-02-07 深圳市中安利业科技技术有限公司 一种电子雷管起爆电容充放电电路
CN110986710A (zh) * 2019-12-24 2020-04-10 西安迈瑞智联信息技术有限公司 一种智能选发开关及起爆系统
CN114646243B (zh) * 2022-05-07 2023-06-23 浙江航芯科技有限公司 一种提高安全性的数码雷管起爆控制方法及系统
CN115371505B (zh) * 2022-07-29 2023-12-29 上海芯飏科技有限公司 适用浅孔爆破的电子雷管通信速率自适应调整方法及系统
CN115493464B (zh) * 2022-09-26 2023-10-17 上海芯跳科技有限公司 提高电子雷管通信组网能力的方法和系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE434883T1 (de) 1989-12-29 1992-04-09 Union Espanola De Explosivos S.A., Madrid Elektronische einrichtung mit hoher zuverlaessigkeit fuer aufeinanderfolgende detonationen.
US5460093A (en) * 1993-08-02 1995-10-24 Thiokol Corporation Programmable electronic time delay initiator
NO309690B1 (no) * 1995-01-23 2001-03-12 Western Atlas Int Inc Detonasjonsanordning av type eksploderende brotråd for bruk med et perforeringsverktöy i en brönn
SE515809C2 (sv) * 2000-03-10 2001-10-15 Dyno Nobel Sweden Ab Förfarande vid avfyring av elektroniksprängkapslar i ett detonatorsystem samt ett detonatorsystem innefattande elektroniksprängkapslarna
CA2441471C (fr) * 2001-06-06 2006-08-08 Senex Explosives, Inc. Systeme permettant l'amorcage de serie de detonateurs a retardement individuel
US7577756B2 (en) 2003-07-15 2009-08-18 Special Devices, Inc. Dynamically-and continuously-variable rate, asynchronous data transfer
US8646387B2 (en) * 2009-09-09 2014-02-11 Detnet South Africa (Pty) Ltd Detonator connector and detonator system

Also Published As

Publication number Publication date
EP3500818B1 (fr) 2020-08-12
WO2018033881A1 (fr) 2018-02-22

Similar Documents

Publication Publication Date Title
EP3500818B1 (fr) Système d'exploseur-détonateur électronique
US5014622A (en) Blasting system and components therefor
US4324182A (en) Apparatus and method for selectively activating plural electrical loads at predetermined relative times
EP1644693B1 (fr) Diagnostic de l'etat de preparation a la mise a feu dans un dispositif pyrotechnique tel qu'un detonateur electronique
RU2077699C1 (ru) Устройство для инициирования электрических нагрузок, способ инициирования электрических нагрузок по истечении предварительно установленных временных задержек и дистанционное электрическое устройство задержки для инициирования электрической нагрузки
US4445435A (en) Electronic delay blasting circuit
US7301750B2 (en) Electronic switching system for a detonation device, method of operation and explosive device including the same
AU2004256313B2 (en) Detonator utilizing selection of logger mode or blaster mode based on sensed voltages
US6477457B1 (en) Method for transmitting power and data in a bus system provided for occupant protection devices
KR101016538B1 (ko) 마이크로컨트롤러에서 기준시간 설정방법 및 그 방법을 이용한 전자식 뇌관
US4893564A (en) Electric detonator of delay type
US5571985A (en) Sequential blasting system
KR20110092796A (ko) 전자식 지연 뇌관 장치 및 전자식 뇌관 발파 시스템
KR101394453B1 (ko) 전자식 뇌관 장치 및 전자식 뇌관 발파 시스템
EP1644687B1 (fr) Detonateur electronique a charge regulee a courant constant a la tension d'alimentation
EP0434883A1 (fr) Dispositif électronique à haute fiabilité pour dÀ©tonations successives
JP3312740B2 (ja) 電気雷管導通チェッカ
EP1644691B1 (fr) Compte a rebours de pre-mise a feu dans un detonateur electronique, et systeme de sautage electronique
CN105486185B (zh) 一种基于单片机的微秒级延时发爆装置
KR20040013242A (ko) 전기 발파기의 전자 지연 방법 및 장치
KR20220155417A (ko) Mcu로 제어되는 비전기 뇌관용 기폭장치, 이를 이용한 비전기 뇌관 기폭방법 및 기폭시스템
EA038822B1 (ru) Беспроводной электронный детонатор
CN101819013A (zh) 一种雷管系统
TW406184B (en) Electronic type delay detonator
CN217275840U (zh) 煤矿许用数码电子雷管起爆器

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: UNKNOWN

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20190220

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAV Request for validation of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20200317

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602017021617

Country of ref document: DE

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1301978

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200915

REG Reference to a national code

Ref country code: NL

Ref legal event code: FP

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20201112

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20201113

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20201112

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1301978

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200812

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20201212

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20200831

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20200831

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20200818

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602017021617

Country of ref document: DE

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20200831

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

26N No opposition filed

Effective date: 20210514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20200818

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20200831

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20210930

Year of fee payment: 5

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200812

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 602017021617

Country of ref document: DE

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 20230220

Year of fee payment: 6

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20230215

Year of fee payment: 6

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20230206

Year of fee payment: 6

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20230301

REG Reference to a national code

Ref country code: NL

Ref legal event code: MM

Effective date: 20230901

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20230818

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20230901

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20230901