EP3375261A1 - Multi-layer printed circuit board having a printed coil and method for the production thereof - Google Patents

Multi-layer printed circuit board having a printed coil and method for the production thereof

Info

Publication number
EP3375261A1
EP3375261A1 EP16810237.4A EP16810237A EP3375261A1 EP 3375261 A1 EP3375261 A1 EP 3375261A1 EP 16810237 A EP16810237 A EP 16810237A EP 3375261 A1 EP3375261 A1 EP 3375261A1
Authority
EP
European Patent Office
Prior art keywords
coil
multilayer board
flat
solenoid coil
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP16810237.4A
Other languages
German (de)
French (fr)
Inventor
Jörg KEGELER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Schaeffler Technologies AG and Co KG
Original Assignee
Schaeffler Technologies AG and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schaeffler Technologies AG and Co KG filed Critical Schaeffler Technologies AG and Co KG
Publication of EP3375261A1 publication Critical patent/EP3375261A1/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/28Coils; Windings; Conductive connections
    • H01F27/2804Printed windings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/28Coils; Windings; Conductive connections
    • H01F27/2876Cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041Printed circuit coils
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02KDYNAMO-ELECTRIC MACHINES
    • H02K33/00Motors with reciprocating, oscillating or vibrating magnet, armature or coil system
    • H02K33/18Motors with reciprocating, oscillating or vibrating magnet, armature or coil system with coil systems moving upon intermittent or reversed energisation thereof by interaction with a fixed field system, e.g. permanent magnets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0207Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/28Coils; Windings; Conductive connections
    • H01F27/2804Printed windings
    • H01F2027/2809Printed windings on stacked layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06Thermal details
    • H05K2201/066Heatsink mounted on the surface of the PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09227Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672Superposed layout, i.e. in different planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709Staggered pads, lands or terminals; Parallel conductors in different planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components

Definitions

  • the invention relates to a multilayer board with a solenoid coil formed from superimposed flat coils and a method for their preparation.
  • the arranged on the different levels interconnects can be electrically connected to each other via so-called VIAs.
  • VIAs also called electrical feedthroughs, are usually realized by a vertical bore, which is metallized at its inner diameter.
  • FIG. 1 shows, in a cross section 8, perpendicular to the surface of a multilayer board, an arrangement of flat coils 1-6 known from the prior art for forming a solenoid coil.
  • each level of the multilayer board is here, for example, a flat coil 1 - 6, each with three turns, which extend spirally either from the inside out or from outside to inside.
  • a first flat coil 1 is wound from outside to inside and electrically connected to an underlying second flat coil 2 via an electrical VIA.
  • the second flat coil 2 in turn is spirally wound from the inside to the outside and in turn via a further not shown here further electrical VIA with a third flat coil 3 connected in the third level of the multilayer board.
  • a solenoid is created, which extends over six levels of
  • Multilayer board extends.
  • the multilayer board technology is also particularly suitable for realizing applications with high electrical power in a compact and lightweight design.
  • An example of this is already mentioned primary part of the linear motor from DE 10 2008 062 575 A1, which is realized as a multilayer printed circuit board.
  • cooling is a particular challenge.
  • the heat generated in internal conductor tracks must be conducted laterally to the outer edge of the board, where it can then be dissipated to the surface of the board.
  • an isolation distance must be provided which may be of the order of a few hundred micrometers.
  • the electrical insulation is ensured for example by prepreg layers whose thermal conductivity is low. Accordingly, it is a particular challenge to dissipate the heat from the central region of such a multilayer board.
  • the invention has for its object to improve the cooling of coils that are realized in the form of a multilayer board.
  • This object is achieved by a multilayer board with the features according to claim 1. Furthermore, the object is achieved by a method for producing a solenoid coil on a multilayer board according to claim 10.
  • the multilayer board according to the invention comprises a plurality of vertically stacked flat coils.
  • the flat coils are first applied, for example, on a plurality of individual boards, wherein the individual boards are preferably stacked to form the multilayer board.
  • each individual board arranged both on the top and on the underside of each a flat coil.
  • two stacked individual boards form a stack of four flat coils, wherein the stacked individual boards are preferably separated from each other by an insulating layer, for example a prepreg layer.
  • the vertically superimposed flat coils according to the invention are electrically connected in series. This can preferably be implemented with electrical vias, also called VIAs.
  • the electrically connected in series flat coils form the first solenoid coil according to the invention.
  • Each individual pancake coil is preferably spirally wound in its respective plane. For example, runs a first flat coil, for example, in the top layer of
  • Multilayer board is located in the plane of the multilayer board spiraling from the inside out.
  • the second flat coil arranged below the first flat coil runs spirally from outside to inside.
  • a spiral course of the winding is to be understood as meaning any type of winding in which the individual windings of the flat coil are formed by a single planar conductor track and enclose in one plane.
  • the conductor track can be characterized by rounding, but also square.
  • the invention is now based on the knowledge that the thermal conductivity of the multilayer board - especially in the lateral direction - can be significantly improved if two vertically adjacent flat coils are laterally offset from each other so that in a cross section perpendicular to the surface of the multilayer board Track sections of a flat coil are arranged vertically in partial overlap with two conductor track sections of the other flat coil. In this way, the heat generated in an inner turn of a flat coil can be transferred very easily to a turn of a vertically and laterally adjacent flat coil which, viewed in the lateral direction, is closer to the edge of the circuit board.
  • the isolation distance between the conductor track sections, the are located vertically in partial coverage can be realized much lower process reasons, as the isolation distance between two windings, which are arranged in the same plane of the printed circuit board.
  • the distance between two turns in a plane between the involved track sections can not be chosen arbitrarily small for technical process reasons.
  • the individual boards of the multilayer board can be electrically insulated from one another by a comparatively thin prepreg layer.
  • This prepreg layer can be reduced, for example, to the range of only 40 ⁇ m in order to ensure sufficient electrical insulation, while the interconnect distance between the individual windings can not be selected to be less than 200 ⁇ m for reasons of process engineering.
  • the lateral offset of the stacked flat coils according to the invention has the consequence that the cross section is interspersed over its entire lateral extent with conductor track sections.
  • the heat transfer between two conductor track sections takes place mainly in the vertical direction, where due to the small isolation distance, a relatively small thermal resistance prevails. This has the consequence that the lateral heat conduction within the multilayer board is ensured almost like a continuous metal layer through the entire circuit board.
  • a particularly low thermal resistance can be realized between two vertically adjacent flat coils whose windings are electrically connected in parallel.
  • the said turns of the two vertically adjacent flat coils must be separated only by a very thin prepreg layer, for example with a thickness between 20 and 40 ⁇ . Due to the inventive lateral offset of these adjacent flat coils can be in the small thickness the insulating layer used between the adjacent flat coils an excellent heat transfer between the interconnected conductor sections, which are arranged in partial overlap to each other realize.
  • the multilayer board according to the invention already significantly improves the heat dissipation of only a single solenoid coil, which is arranged on the board.
  • an advantageous embodiment of the invention is characterized in that the multilayer board has at least one second solenoid coil arranged laterally offset from the first solenoid coil, wherein outer conductor sections of flat coils of the second solenoid coil in a comb-like manner into outer conductor sections of the flat coils of the first solenoid coil engage, so that in the said cross section in each case an outer conductor section of the second solenoid coil is arranged with at least one outer conductor section of the first solenoid coil vertically in partial overlap.
  • a shingled arrangement of the conductor track sections in the said cross-section is continued beyond the coil boundaries.
  • An outer trace portion of the first solenoid coil is in partial overlap with an outer trace portion of the second solenoid coil, possibly with two such outer trace portions of the second solenoid coil. The heat that enters the outer trace section of the first
  • Solenoid coil is introduced, can thus be transmitted in the vertical direction over a relatively small insulation distance to the outer trace portion and the outer trace portions of the second solenoid coil.
  • the heat transfer in the lateral direction from the central inner region of the multilayer board can be excellently transmitted even beyond coil boundaries into the outer edge region of the multilayer board, as would be the case with a solid metal plate.
  • the heat generated in the solenoid coil (s) of the multilayer board can advantageously be routed to one or both surfaces of the multilayer board if the multilayer board has a passive printed conductor structure which is galvanically isolated from all current-carrying tracks of the multilayer board is arranged laterally offset from the first solenoid coil and comb-like engages in the outer conductor tracks of the pancake of the first solenoid coil.
  • a kind of shingle-like covering of conductor track sections is provided in order to facilitate the lateral heat transport. In this case, it is provided to transfer the heat from the first solenoid coil to the passive, non-current-conducting strip conductor structure.
  • This passive track structure now makes it possible to dissipate the heat to the surface or surfaces of the multilayer board.
  • This heat transfer to the one or more surfaces of the multilayer board is facilitated by the fact that the passive circuit pattern does not have to be isolated to the extent that the conductor tracks of the solenoid coil or the
  • Solenoid coils would require.
  • the heat transport from the passive printed conductor structure to one or both surfaces can be facilitated by virtue of the multilayer printed circuit board having thermally conductive VIAs which penetrate the passive printed conductor structure vertically.
  • thermally conductive VIAs have the task of transposing previously essentially laterally through the multilayer board. ported heat in the vertical direction, for example, to transport to a arranged on the surface of the multilayer board heat sink.
  • a cooling body it is possible for a cooling body to be arranged on only one surface of the multilayer board. Alternatively, however, both surfaces of the
  • Multilayer board for cooling to be provided with a heat sink.
  • a particularly good heat transfer from the thermally conductive VIAs to the one or more heat sinks can be achieved in a particularly advantageous embodiment of the invention in that the thermally conductive VIAs are in contact with a heat sink disposed on a surface of the multilayer board. This is especially the case when arranged on the multilayer board
  • Solenoid coils can only be operated with moderate voltages.
  • a moderate voltage in this sense is given, for example, if the potential differences within the board are not more than 150 V. In this case, it is not necessary to further isolate the thermally conductive VIAs in front of the heat sink.
  • Heat dissipation should be provided with a heat sink.
  • the thermally conductive VIAs be in contact with both heat sinks.
  • an embodiment of the invention is advantageous in which the multilayer board has an insulating cover layer which covers at least one near-surface flat coil and the thermal VIAs. If necessary, such an insulating cover layer must be provided on both surfaces of the multilayer board in order to ensure protection against inadmissibly high contact voltages.
  • a high voltage in this sense is given, for example, when potential differences within the multilayer board can be more than 500 V.
  • potential differences within the multilayer board can be more than 500 V.
  • the height of the Multilayer board designed no larger than necessary.
  • a particularly thin insulating layer between two vertically adjacent flat coils can be ensured in an advantageous embodiment of the invention in that layers of the multilayer board are mechanically connected to one another by a backcoat layer lying between said adjacent flat coils. This is advantageously on a prepreg layer for separating the vertically stacked individual boards, at the top and bottom of each at least one flat coil is applied dispensed.
  • an embodiment of the invention is advantageous in which the first solenoid coil is penetrated perpendicular to the surface of the multilayer board by an iron core. If further solenoid coils are provided next to the first solenoid coil, it is advantageous to also pass through the other solenoid coils with iron cores.
  • FIG. 1 shows a cross section through a multilayer board with a solenoid coil according to the prior art
  • Figure 2 is a cross-section through an embodiment of the invention
  • Multi-layer board in which a first solenoid coil can be seen
  • FIG. 3 shows a cross section through a further embodiment of the multilayer board according to the invention with two solenoid coils
  • FIG. 4 shows a cross section through a further embodiment of the multilayer board according to the invention with a first solenoid coil and a passive printed conductor structure
  • FIG. 5 shows a cross section through a further embodiment of the multilayer board with the first solenoid coil according to FIG. 4 and the passive printed conductor structure
  • FIG. Figure 6 is a plan view of an embodiment of the invention
  • Multilayer board with six laterally adjacent solenoid coils and
  • Figure 7 is a schematic representation of a linear motor whose primary part in
  • FIG. 1 shows a solenoid coil known from the prior art, referred to as
  • the multilayer board is formed.
  • the multilayer board is made up of three stacked individual boards. Each of these three boards has both on the top of the board and on the underside of the single board a spiral flat coil 1 - 6.
  • the top single board of the stack carries on its top a first flat coil 1, of which in the cross section 8 three turns can be seen , which are arranged laterally side by side.
  • the individual boards are first manufactured with their associated flat coils 1-6. Subsequently, insulating, not shown here prepreg layers are arranged between the various individual boards, are electrically isolated by the respective lower flat coils of a single board 2, 4 of the underlying upper flat coils 3, 5 of each arranged below individual board.
  • the traces of the various pancake coils are typically copper and are located on a PCB substrate, such as FR4, which forms the respective single layer or single board.
  • the flat coils 1 - 6 still have to be electrically contacted with each other. This is usually done by electrical via, so-called VIAs, which are not shown in Figure 1.
  • FIG. 1 shows, by way of example, the heat flow of the innermost turn of the third flat coil 3.
  • the cross section of each conductor track is to be chosen large in order to be able to conduct as high a current as possible, this results in a spacing of the conductor tracks in the lateral direction alone of the order of a few hundred microns.
  • this electrical isolation distance represents an obstacle to the cooling of the multilayer board.
  • Figure 2 shows a cross section 8 through an embodiment of the multilayer board according to the invention.
  • the multilayer board forms a solenoid coil, which is formed by electrical interconnection of a total of six flat coils 1 - 6, which are arranged in vertically superimposed planes.
  • a first single layer carries on its upper side the first flat coil 1 and on the underside of the second flat coil 2.
  • Both flat coils 1, 2 were applied to a PCB substrate before the formation of the multilayer stack.
  • the fifth flat coil 5 was applied to the top of a third single-layer board and the sixth flat coil 6 on the underside of this single board.
  • each conductor track section 26 of the second flat coil 2 is arranged vertically in partial overlap with two conductor track sections 7 of the first flat coil.
  • the conductor track portion of the third flat coil 3 which represents the mean turn, arranged by two vertically above-lying conductor track portions of the second flat coil 2 in partial coverage.
  • FIG. 2 this is shown in FIG. 2 for the heat transport of the second and third flat coils 2, 3. Due to the sectional coverage area between two conductor track sections, which are adjacent in the vertical direction, only a significantly smaller distance has to be bridged by electrically and thus also heat-insulating material.
  • the distance between the second flat coil 2 and the third flat coil 3 in the vertical direction is smaller than the distance between the first flat coil 1 and the second flat coil 2.
  • the distance between the fourth flat coil 4 and the fifth flat coil 5 is significantly smaller than the distance between the fifth flat coil 5 and the sixth flat coil 6. This is due to the underlying connection technology between the above-mentioned single layers. If only a very thin prepreg material or alternatively a pure baked enamel layer is used to connect the individual boards, the insulating connecting layer between the stacked individual boards can be selected to be smaller than the thickness of the substrate on which the Flat coils of each individual board are arranged. In this way, as far as the required electrical isolation distance permits, the heat conduction from the central inner portion of the solenoid coil to the outer portion of the solenoid coil can be further enhanced.
  • Figure 3 shows a cross section 8 of an embodiment of a multilayer board according to the present invention, in which on the multilayer board two
  • Solenoid coils are arranged laterally adjacent to each other. The first
  • Solenoid coil which is arranged on the left in the cross section 8, comprises three vertically superimposed flat coils 1-6, which are each arranged laterally offset from one another in the manner already described in connection with FIG. Viewed laterally, the pancakes 1-6 of the first solenoid coil engage in a comb-like manner in a directly laterally adjacent second solenoid coil with pancakes 9-14. The engagement occurs in the area of the respective outer conductor sections 27, 15. As can be seen, the comb-like engagement ensures that in each case an outer conductor section 15 of the second solenoid coil with at least one outer conductor section 27 of the first solenoid coil is arranged vertically in partial overlap. This overlap enables heat transfer between the two solenoid coils involved in a particularly effective manner.
  • FIG. 4 shows a further embodiment of a multilayer board according to the present invention in a cross section 8.
  • six vertically stacked flat coils 1-6 of a first solenoid coil can be seen.
  • the arrangement of the flat coils 1 - 6 essentially corresponds to the arrangement already in use. Samnnenhang was explained with Figure 2.
  • a passive printed conductor structure 16 can be seen, which comb-like engages in the outer conductor track sections 27 of the first solenoid coil.
  • This passive conductor track structure 16 excludes current flow, that is, it is galvanically isolated from all current-carrying elements of the multilayer board.
  • the passive interconnect structure 16 has the task of transporting in the manner already described in the lateral direction through the multilayer board heat in a very effective manner vertically to one or both surfaces of the multilayer board.
  • a heat sink 18 is arranged by way of example, via which the heat is finally released to the environment.
  • a heat sink 18 may additionally be on the bottom of the illustrated multilayer board.
  • the passive printed conductor sections 16 are penetrated by thermally conductive VIAs 17. These may be, for example, bores which are subsequently filled with a thermally highly conductive metal. Since the interconnect structure 16 is not electrically effective, the short circuit caused by the thermally conductive VIAs of the individual interconnects of the passive interconnect structure 16 is harmless.
  • the illustrated thermally conductive VIA 17 is in direct contact with the heat sink 18. This results in a nearly ideal heat conduction behavior between the passive printed conductor structure 16 and the heat sink 18.
  • the solenoid coil be at a higher voltage can be acted upon, it may be that the insulation distance between the outer conductor portions 27 of the solenoid coil and the passive interconnect structure 16 is not sufficient to ensure sufficient contact protection.
  • Figure 5 a further advantageous embodiment of the invention, which is shown in Figure 5 is recommended. As an example, it is called an application in a converter with direct voltage intermediate circuit and an intermediate circuit voltage of 750 V.
  • the structure corresponds essentially to the cross-section 8 already shown in Figure 4, but now an insulating prepreg layer 19 has been applied between the heat sink 18, the conductor tracks of the uppermost first flat coil 1 and the thermal VIA 17. Likewise, such an insulating layer 19 is located on the underside of the board, to which optionally also another, not shown here, heat sink can be located.
  • the prepreg layer is selected to be thin enough so as not to obstruct the heat transfer from the thermally conductive VIA 17 to the heat sink 18. At the same time, however, it is so thick that sufficient contact protection for the multilayer board is ensured.
  • Multilayer board results in a perfectly smooth surface of the board.
  • FIG. 6 shows an embodiment of the multilayer board according to the invention in a plan view.
  • the multilayer board serves as the primary part 22 of a linear motor.
  • a first solenoid coil 20 and a second solenoid coil 21 four further identical solenoid coils are located laterally next to the already mentioned coils.
  • Each individual solenoid coil is constructed such that it has the lateral offset of the adjacent flat coils according to the invention viewed in the vertical direction. Furthermore, the outermost trace portions of each grip
  • FIG. 7 shows schematically a linear motor with a primary part 22, which may be constructed as shown in Figure 6 as a multilayer board.
  • a primary part 22 is very compact and lightweight, so that it is particularly well suited for highly dynamic applications.
  • This primary part 22 is in an electromagnetic interaction with a secondary part 23.
  • the secondary part comprises permanent magnets 24 which are embedded in a soft iron bed.
  • Primary part 22 and secondary part 23 are spaced apart by an air gap 25.

Abstract

The invention relates to a multi-layer printed circuit board, comprising vertically superimposed flat coils (1-6) which are electrically connected in series or in parallel to form a first solenoid coil (20). In order to improve the heat dissipation of the multi-layer printed circuit board, it is proposed that in each case two vertically adjacent flat coils (1,2) are arranged laterally offset relative to each other in such a manner that conductor track sections (26) of one flat coil (2) are arranged vertically in a partial overlap with two conductor track sections (7) of the other flat coil (1) in a cross section (8) perpendicular to the surface of the multi-layer printed circuit board.

Description

MULTI LAYER-PLATINE MIT GEDRUCKTER SPULE UND VERFAHREN ZU DEREN HERSTELLUNG  MULTI LAYER PLATINUM WITH PRINTED COIL AND METHOD FOR THE PRODUCTION THEREOF
Die Erfindung betrifft eine Multilayer-Platine mit einer aus übereinanderliegenden Flachspulen gebildeten Solenoidspule sowie ein Verfahren zu deren Herstellung. The invention relates to a multilayer board with a solenoid coil formed from superimposed flat coils and a method for their preparation.
Unter einer Multilayer-Platine oder Mehrlagenplatine ist eine Leiterplatte zu verstehen, die mehrere vertikal übereinanderliegende Ebenen aufweist, die jeweils mit Leiterbahnen bestückt sind. Die auf den verschiedenen Ebenen angeordneten Leiterbahnen können über sogenannte VIAs elektrisch miteinander verbunden werden. Diese VIAs, auch elektrischen Durchkontaktierungen genannte, werden in der Regel durch eine vertikale Bohrung realisiert, die an ihrem Innendurchmesser metallisiert wird. Under a multilayer board or multilayer board is to be understood a circuit board having a plurality of vertically superimposed planes, which are each equipped with tracks. The arranged on the different levels interconnects can be electrically connected to each other via so-called VIAs. These VIAs, also called electrical feedthroughs, are usually realized by a vertical bore, which is metallized at its inner diameter.
Beispielsweise aus der DE 10 2008 062 575 A1 ist eine Multilayer-Platine gemäß Oberbegriff des Patentanspruchs 1 bekannt. Hier wird ein Linearmotor offenbart, dessen Primärteil als Multilayer-Platine ausgebildet ist. Die verschiedenen Layer dieser Multilayer-Platine sind größtenteils mit bestrombaren Windungen ausgefüllt. Überei- nanderliegende Windungen bilden jeweils eine Spule einer Phase des Linearmotors. Auf diese Art und Weise lässt sich ein besonders leichtes und kompaktes Primärteil für einen Linearmotor realisieren, das sich in besonderem Maße als Läufer für hochdynamische Anwendungen eignet. Figur 1 zeigt in einem Querschnitt 8 lotrecht zur Oberfläche einer Multilayer-Platine eine aus dem Stand der Technik bekannte Anordnung von Flachspulen 1 - 6 zur Ausbildung einer Solenoidspule. In jeder Ebenen der Multilayer-Platine befindet sich hier beispielhaft eine Flachspule 1 - 6 mit jeweils drei Windungen, die spiralförmig entweder von innen nach außen oder von außen nach innen verlaufen. Beispielsweise ist eine erste Flachspule 1 von außen nach innen gewickelt und über einen elektrisches VIA mit einer darunterliegenden, zweiten Flachspule 2 elektrisch verbunden. Die zweite Flachspule 2 wiederum ist von innen nach außen spiralförmig gewickelt und ihrerseits wiederum über ein hier nicht dargestelltes weiteres elektrischen VIA mit einer dritten Flachspule 3 in der dritten Ebene der Multilayer-Platine verbunden. Auf diese Art und Weise wird ein Solenoid geschaffen, der sich über sechs Ebenen der For example, from DE 10 2008 062 575 A1 discloses a multilayer board according to the preamble of claim 1 is known. Here, a linear motor is disclosed, the primary part is designed as a multilayer board. The various layers of this multilayer board are mostly filled with currentable windings. Opposite turns each form a coil of a phase of the linear motor. In this way, a particularly lightweight and compact primary part for a linear motor can be realized, which is particularly suitable as a rotor for highly dynamic applications. FIG. 1 shows, in a cross section 8, perpendicular to the surface of a multilayer board, an arrangement of flat coils 1-6 known from the prior art for forming a solenoid coil. In each level of the multilayer board is here, for example, a flat coil 1 - 6, each with three turns, which extend spirally either from the inside out or from outside to inside. For example, a first flat coil 1 is wound from outside to inside and electrically connected to an underlying second flat coil 2 via an electrical VIA. The second flat coil 2 in turn is spirally wound from the inside to the outside and in turn via a further not shown here further electrical VIA with a third flat coil 3 connected in the third level of the multilayer board. In this way, a solenoid is created, which extends over six levels of
Multilayer-Platine erstreckt. Die Multilayer-Platinen-Technologie eignet sich in besonderem Maße auch dazu, Anwendungen mit hoher elektrischer Leistung in kompakter und leichter Bauform zu realisieren. Ein Beispiel hierfür ist bereits erwähnte Primärteil des Linearmotors aus DE 10 2008 062 575 A1 , das als mehrschichtige Leiterplatte realisiert ist. Aufgrund der hohen Ströme in derartigen Anwendungen ist hierbei die Entwärmung eine be- sondere Herausforderung. So muss beispielsweise - wie in Figur 1 dargestellt ist - die in inneren Leiterbahnen entstehende Wärme lateral zum äußeren Platinenrand geführt werden, wo sie anschließend zur Oberfläche der Platine abgeführt werden kann. Zwischen den einzelnen Leiterbahnen einer Windung jeder Flachspule ist ein Isolationsabstand vorzusehen, der in der Größenordnung von einigen Hundert Mikrometern lie- gen kann. Die elektrische Isolation wird beispielsweise durch Prepreg-Schichten sichergestellt, deren thermischer Leitwert jedoch gering ist. Dementsprechend stellt es eine besondere Herausforderung dar, die Wärme aus dem Zentralbereich einer derartigen Multilayer-Platine abzuführen. Der Erfindung liegt die Aufgabe zugrunde, die Entwärmung von Spulen, die in Form einer Multilayer-Platine realisiert sind, zu verbessern. Multilayer board extends. The multilayer board technology is also particularly suitable for realizing applications with high electrical power in a compact and lightweight design. An example of this is already mentioned primary part of the linear motor from DE 10 2008 062 575 A1, which is realized as a multilayer printed circuit board. Due to the high currents in such applications, cooling is a particular challenge. For example, as shown in FIG. 1, the heat generated in internal conductor tracks must be conducted laterally to the outer edge of the board, where it can then be dissipated to the surface of the board. Between the individual tracks of one turn of each flat coil, an isolation distance must be provided which may be of the order of a few hundred micrometers. The electrical insulation is ensured for example by prepreg layers whose thermal conductivity is low. Accordingly, it is a particular challenge to dissipate the heat from the central region of such a multilayer board. The invention has for its object to improve the cooling of coils that are realized in the form of a multilayer board.
Diese Aufgabe wird durch eine Multilayer-Platine mit den Merkmalen gemäß Patentanspruch 1 gelöst. Ferner wird die Aufgabe durch ein Verfahren zur Herstellung einer Solenoidspule auf einer Multilayer-Platine gemäß Patentanspruch 10 gelöst. This object is achieved by a multilayer board with the features according to claim 1. Furthermore, the object is achieved by a method for producing a solenoid coil on a multilayer board according to claim 10.
Vorteilhafte Ausführungen der Erfindung sind den abhängigen Patentansprüchen zu entnehmen. Advantageous embodiments of the invention can be found in the dependent claims.
Die erfindungsgemäße Multilayer-Platine umfasst mehrere vertikal übereinanderliegende Flachspulen. Die Flachspulen werden beispielsweise zunächst auf mehreren Einzelplatinen aufgebracht, wobei die Einzelplatinen vorzugsweise zur Bildung der Multilayer-Platine übereinandergestapelt werden. Vorzugsweise ist auf jeder Einzel- platine sowohl auf der Oberseite als auch auf deren Unterseite jeweils eine Flachspule angeordnet. Auf diese Art und Weise bilden zwei aufeinandergestapelte Einzelplatinen ein Stack von insgesamt vier Flachspulen, wobei die aufeinandergestapelten Einzelplatinen vorzugsweise durch eine Isolierschicht, beispielsweise eine Prepreg-Schicht, voneinander getrennt werden. The multilayer board according to the invention comprises a plurality of vertically stacked flat coils. The flat coils are first applied, for example, on a plurality of individual boards, wherein the individual boards are preferably stacked to form the multilayer board. Preferably, each individual board arranged both on the top and on the underside of each a flat coil. In this way, two stacked individual boards form a stack of four flat coils, wherein the stacked individual boards are preferably separated from each other by an insulating layer, for example a prepreg layer.
Die vertikal übereinanderliegenden Flachspulen werden erfindungsgemäß elektrisch in Reihe geschaltet. Dies kann vorzugsweise mit elektrischen Durchkontaktierungen, auch VIAs genannt, umgesetzt werden. Die elektrisch in Reihe geschalteten Flach- spulen bilden die erfindungsgemäße erste Solenoidspule aus. Jede einzelne Flachspule ist vorzugsweise spiralförmig in ihrer jeweiligen Ebene gewickelt. So verläuft beispielsweise eine erste Flachspule, die sich beispielsweise im Toplayer der The vertically superimposed flat coils according to the invention are electrically connected in series. This can preferably be implemented with electrical vias, also called VIAs. The electrically connected in series flat coils form the first solenoid coil according to the invention. Each individual pancake coil is preferably spirally wound in its respective plane. For example, runs a first flat coil, for example, in the top layer of
Multilayer-Platine befindet, in der Ebene der Multilayer-Platine spiralförmig von innen nach außen. Hingegen verläuft eine in vertikaler Richtung der Platine betrachtet unter der ersten Flachspule angeordnete zweite Flachspule spiralförmig von außen nach innen. Multilayer board is located in the plane of the multilayer board spiraling from the inside out. On the other hand, when viewed in the vertical direction of the board, the second flat coil arranged below the first flat coil runs spirally from outside to inside.
Unter einem spiralförmigen Verlauf der Windung ist in diesem Zusammenhang jede Art der Wicklung zu verstehen, bei der die einzelnen Windungen der Flachspule durch eine einzige planare Leiterbahn gebildet werden und sich in einer Ebene umschließen. Die Leiterbahnführung kann hierbei durch Rundungen gekennzeichnet sein, aber auch eckig verlaufen. In this context, a spiral course of the winding is to be understood as meaning any type of winding in which the individual windings of the flat coil are formed by a single planar conductor track and enclose in one plane. The conductor track can be characterized by rounding, but also square.
Der Erfindung liegt nunmehr die Kenntnis zugrunde, dass der Wärmeleitwert der Multilayer-Platine - insbesondere in lateraler Richtung - deutlich verbessert werden kann, wenn jeweils zwei vertikal benachbarte Flachspulen derart lateral versetzt zueinander angeordnet sind, dass in einem Querschnitt lotrecht zur Oberfläche der Multilayer-Platine Leiterbahnabschnitte der einen Flachspule vertikal in teilweiser Überdeckung mit zwei Leiterbahnabschnitten der anderen Flachspule angeordnet sind. Auf diese Art und Weise kann die in einer inneren Windung einer Flachspule entstehende Wärme sehr leicht auf eine Windung einer vertikal und lateral benachbarten Flachspule übertragen werden, die in lateraler Richtung betrachtet, dem Rand der Platine näher ist. Denn der Isolationsabstand zwischen den Leiterbahnabschnitten, die sich vertikal in teilweiser Überdeckung befinden, kann aus prozesstechnischen Gründen deutlich geringer realisiert werde,, als der Isolationsabstand zwischen zwei Windungen, die in derselben Ebene der Leiterbahnplatine angeordnet sind. Der Abstand zwischen zwei Windungen in einer Ebene zwischen den beteiligten Leiterbahnabschnitten kann aus prozesstechnischen Gründen nicht beliebig klein gewählt werden. Hingegen können die Einzelplatinen der Multilayer-Platine durch eine vergleichsweise dünne Prepreg-Schicht voneinander elektrisch isoliert werden. Diese Prepreg-Schicht kann beispielsweise auf den Bereich von nur 40 μηη reduziert wer- den, um eine ausreichende elektrische Isolation zu gewährleisten, während der Leiterbahnabstand zwischen den einzelnen Windungen aus prozesstechnischen Gründen nicht kleiner als 200 μηη gewählt werden kann. The invention is now based on the knowledge that the thermal conductivity of the multilayer board - especially in the lateral direction - can be significantly improved if two vertically adjacent flat coils are laterally offset from each other so that in a cross section perpendicular to the surface of the multilayer board Track sections of a flat coil are arranged vertically in partial overlap with two conductor track sections of the other flat coil. In this way, the heat generated in an inner turn of a flat coil can be transferred very easily to a turn of a vertically and laterally adjacent flat coil which, viewed in the lateral direction, is closer to the edge of the circuit board. Because the isolation distance between the conductor track sections, the are located vertically in partial coverage, can be realized much lower process reasons, as the isolation distance between two windings, which are arranged in the same plane of the printed circuit board. The distance between two turns in a plane between the involved track sections can not be chosen arbitrarily small for technical process reasons. By contrast, the individual boards of the multilayer board can be electrically insulated from one another by a comparatively thin prepreg layer. This prepreg layer can be reduced, for example, to the range of only 40 μm in order to ensure sufficient electrical insulation, while the interconnect distance between the individual windings can not be selected to be less than 200 μm for reasons of process engineering.
Dementsprechend gelingt die Wärmeübertragung zwischen Leiterbahnabschnitten vertikal benachbarter Flachspulen, die sich in teilweiser vertikaler Überdeckung befinden, deutlich besser als zwischen zwei in derselben Ebene angeordneten Leiterbahnabschnitten verschiedener Windungen der Flachspule. Accordingly, the heat transfer between conductor sections of vertically adjacent flat coils, which are located in partial vertical coverage, much better than between two arranged in the same plane trace sections of different turns of the flat coil succeeds.
Der erfindungsgemäße laterale Versatz der übereinanderliegenden Flachspulen hat zur Folge, dass der Querschnitt über seine gesamte laterale Ausdehnung mit Leiterbahnabschnitten durchsetzt ist. Der Wärmeübergang zwischen zwei Leiterbahnabschnitten findet hauptsächlich in vertikaler Richtung statt, wo aufgrund des geringen Isolationsabstandes ein verhältnismäßig kleiner Wärmewiderstand herrscht. Dies hat zur Folge, dass die laterale Wärmeleitung innerhalb der Multilayer-Platine fast wie bei einer ununterbrochenen Metallschicht durch die gesamte Leiterplatte gewährleistet wird. The lateral offset of the stacked flat coils according to the invention has the consequence that the cross section is interspersed over its entire lateral extent with conductor track sections. The heat transfer between two conductor track sections takes place mainly in the vertical direction, where due to the small isolation distance, a relatively small thermal resistance prevails. This has the consequence that the lateral heat conduction within the multilayer board is ensured almost like a continuous metal layer through the entire circuit board.
Ein besonders geringer Wärmewiderstand lässt sich zwischen zwei vertikal benachbarten Flachspulen verwirklichen, deren Windungen elektrisch parallel geschaltet sind In diesem Fall müssen die besagten Windungen der zwei vertikal benachbarten Flachspulen lediglich durch eine sehr dünne Prepreg-Schicht getrennt werden, beispielsweise mit einer Dicke zwischen 20 und 40 μιτι. Durch den erfindungsgemäßen lateralen Versatz dieser benachbarten Flachspulen lässt sich bei der geringen Dicke der verwendeten Isolationsschicht zwischen den benachbarten Flachspulen ein hervorragender Wärmeübergang zwischen den beteiligten Leiterbahnabschnitten, die in teilweiser Überdeckung zueinander angeordnet sind, realisieren. Besonders vorteilhaft ist eine Ausbildung der Erfindung, bei der die auf Einzellayern angeordneten Flachspulen, von denen sich jeweils eine an der Ober- und eine an der Unterseite des Einzellayers befinden, elektrisch in Reihe geschaltet werden, während zwei vertikal benachbarte Flachspulen, die zwei unterschiedlichen Leiterbahnträgern zugeordnet sind, elektrisch parallel geschaltet werden. Auf diese Art und Weise lässt sich sehr einfach ein geringer Isolationsabstand durch Wahl einer entsprechend dünnen Prepreg-Schicht zwischen den beiden vertikal benachbarten Flachspulen realisieren, die getrennten Einzelleiterplatten zugeordnet sind. A particularly low thermal resistance can be realized between two vertically adjacent flat coils whose windings are electrically connected in parallel. In this case, the said turns of the two vertically adjacent flat coils must be separated only by a very thin prepreg layer, for example with a thickness between 20 and 40 μιτι. Due to the inventive lateral offset of these adjacent flat coils can be in the small thickness the insulating layer used between the adjacent flat coils an excellent heat transfer between the interconnected conductor sections, which are arranged in partial overlap to each other realize. Particularly advantageous is an embodiment of the invention, in which the individual coils arranged on flat coils, one of which is located at the top and one on the underside of the Einzellayers are electrically connected in series, while two vertically adjacent flat coils, the two different conductor carriers are assigned to be electrically connected in parallel. In this way it is very easy to realize a small insulation distance by selecting a correspondingly thin prepreg layer between the two vertically adjacent flat coils, which are assigned to separate individual conductor plates.
Die erfindungsgemäße Multilayer-Platine verbessert schon deutlich die Entwärmung nur einer einzigen Solenoidspule, die auf der Platine angeordnet ist. In vielen Anwendungen ist es jedoch zweckmäßig, mehrere Solenoidspulen auf der Multilayer-Platine anzuordnen. Dies ist beispielsweise bei einem Linearmotor der Fall, der ein Primärteil aufweist, das als Multilayer-Platine nach einem der hier beschriebenen Ausführungsformen ausgebildet ist, und ein Sekundärteil, der Permanentmagneten aufweist und über einen Luftspalt vom Primärteil beabstandet ist. The multilayer board according to the invention already significantly improves the heat dissipation of only a single solenoid coil, which is arranged on the board. However, in many applications it is convenient to arrange multiple solenoid coils on the multilayer board. This is the case, for example, in the case of a linear motor which has a primary part which is designed as a multilayer printed circuit board according to one of the embodiments described here, and a secondary part which has permanent magnets and is spaced from the primary part via an air gap.
Somit kennzeichnet sich eine vorteilhafte Ausführungsform der Erfindung dadurch, dass die Multilayer-Platine mindestens eine zweite Solenoidspule aufweist, die lateral versetzt zu der ersten Solenoidspule angeordnet ist, wobei äußere Leiterbahnab- schnitte von Flachspulen der zweiten Solenoidspule kammartig in äußere Leiterbahnabschnitte der Flachspulen der ersten Solenoidspule eingreifen, sodass in dem besagten Querschnitt jeweils ein äußerer Leiterbahnabschnitt der zweiten Solenoidspule mit mindestens einem äußeren Leiterbahnabschnitt der ersten Solenoidspule vertikal in teilweiser Überdeckung angeordnet ist. Somit wird eine schindelartige Anordnung der Leiterbahnabschnitte in dem besagten Querschnitt auch über die Spulengrenzen hinaus fortgesetzt. Ein äußerer Leiterbahnabschnitt der ersten Solenoidspule befindet sich in teilweiser Überdeckung mit einem äußeren Leiterbahnabschnitt der zweiten Solenoidspule, gegebenenfalls auch mit zwei derartigen äußeren Leiterbahnabschnitten der zweiten Solenoidspule. Die Wärme, die in den äußeren Leiterbahnabschnitt der ersten Thus, an advantageous embodiment of the invention is characterized in that the multilayer board has at least one second solenoid coil arranged laterally offset from the first solenoid coil, wherein outer conductor sections of flat coils of the second solenoid coil in a comb-like manner into outer conductor sections of the flat coils of the first solenoid coil engage, so that in the said cross section in each case an outer conductor section of the second solenoid coil is arranged with at least one outer conductor section of the first solenoid coil vertically in partial overlap. Thus, a shingled arrangement of the conductor track sections in the said cross-section is continued beyond the coil boundaries. An outer trace portion of the first solenoid coil is in partial overlap with an outer trace portion of the second solenoid coil, possibly with two such outer trace portions of the second solenoid coil. The heat that enters the outer trace section of the first
Solenoidspule eingebracht wird, kann somit in vertikaler Richtung über einen vergleichsweise geringen Isolationsabstand auf den äußeren Leiterbahnabschnitt bzw. die äußeren Leiterbahnabschnitte der zweiten Solenoidspule übertragen werden. Auf diese Art und Weise kann der Wärmetransport in lateraler Richtung vom zentralen inneren Bereich der Multilayer-Platine hervorragend auch über Spulengrenzen hinaus in den äußeren Randbereich der Multilayer-Platine übertragen werden, ähnlich wie es bei einer massiven Metallplatte der Fall wäre. Solenoid coil is introduced, can thus be transmitted in the vertical direction over a relatively small insulation distance to the outer trace portion and the outer trace portions of the second solenoid coil. In this way, the heat transfer in the lateral direction from the central inner region of the multilayer board can be excellently transmitted even beyond coil boundaries into the outer edge region of the multilayer board, as would be the case with a solid metal plate.
Die in der oder den Solenoidspulen der Multilayer-Platine entstehende Wärme kann in vorteilhafter Weise zu einer oder beiden Oberflächen der Multilayer-Platine geführt werden, wenn die Multilayer-Platine eine passive Leiterbahnstruktur aufweist, die von allen stromführenden Leiterbahnen der Multilayer-Platine galvanisch getrennt ist, lateral versetzt zu der ersten Solenoidspule angeordnet ist und kammartig in die äußeren Leiterbahnstrukturen der Flachspulen der ersten Solenoidspule eingreift. Somit ist auch bei dieser Ausführungsform eine Art schindelartige Überdeckung von Leiter- bahnabschnitten vorgesehen, um den lateralen Wärmetransport zu erleichtern. In diesem Fall ist vorgesehen, die Wärme von der ersten Solenoidspule auf die passive, nicht stromführende Leiterbahnstruktur zu übertragen. Diese passive Leiterbahnstruktur ermöglicht es nun, die Wärme zu der oder den Oberflächen der Multilayer-Platine abzuführen. Dieser Wärmetransport zu der oder den Oberflächen der Multilayer- Platine wird dadurch erleichtert, dass die passive Leiterbahnstruktur nicht in dem Maße isoliert werden muss, wie es die Leiterbahnen der Solenoidspule bzw. der The heat generated in the solenoid coil (s) of the multilayer board can advantageously be routed to one or both surfaces of the multilayer board if the multilayer board has a passive printed conductor structure which is galvanically isolated from all current-carrying tracks of the multilayer board is arranged laterally offset from the first solenoid coil and comb-like engages in the outer conductor tracks of the pancake of the first solenoid coil. Thus, in this embodiment as well, a kind of shingle-like covering of conductor track sections is provided in order to facilitate the lateral heat transport. In this case, it is provided to transfer the heat from the first solenoid coil to the passive, non-current-conducting strip conductor structure. This passive track structure now makes it possible to dissipate the heat to the surface or surfaces of the multilayer board. This heat transfer to the one or more surfaces of the multilayer board is facilitated by the fact that the passive circuit pattern does not have to be isolated to the extent that the conductor tracks of the solenoid coil or the
Solenoidspulen erfordern würden. Solenoid coils would require.
Der Wärmetransport von der passiven Leiterbahnstruktur zu einer oder beiden Ober- flächen kann in besonders vorteilhafter Ausgestaltung der Erfindung dadurch erleichtert werden, dass die Multilayer-Platine thermisch leitfähige VIAs aufweist, die die passive Leiterbahnstruktur vertikal durchdringen. Diese thermisch leitfähigen VIAs haben die Aufgabe, die zuvor im Wesentlichen lateral durch die Multilayer-Platine trans- portierte Wärme in vertikaler Richtung beispielsweise zu einem auf der Oberfläche der Multilayer-Platine angeordneten Kühlkörper zu transportieren. In a particularly advantageous embodiment of the invention, the heat transport from the passive printed conductor structure to one or both surfaces can be facilitated by virtue of the multilayer printed circuit board having thermally conductive VIAs which penetrate the passive printed conductor structure vertically. These thermally conductive VIAs have the task of transposing previously essentially laterally through the multilayer board. ported heat in the vertical direction, for example, to transport to a arranged on the surface of the multilayer board heat sink.
Hierbei ist es möglich, dass auf nur einer Oberfläche der Multilayer-Platine ein Kühl- körper angeordnet ist. Alternativ können jedoch auch beide Oberflächen der In this case, it is possible for a cooling body to be arranged on only one surface of the multilayer board. Alternatively, however, both surfaces of the
Multilayer-Platine zur Entwärmung mit einem Kühlkörper versehen werden. Multilayer board for cooling to be provided with a heat sink.
Ein besonders guter Wärmeübergang von der thermisch leitfähigen VIAs zu dem oder den Kühlkörpern kann in besonders vorteilhafter Ausgestaltung der Erfindung dadurch erreicht werden, dass die thermisch leitfähigen VIAs mit einem auf einer Oberfläche der Multilayer-Platine angeordneten Kühlkörper in Berührung stehen. Dies ist insbesondere dann der Fall, wenn die auf der Multilayer-Platine angeordneten A particularly good heat transfer from the thermally conductive VIAs to the one or more heat sinks can be achieved in a particularly advantageous embodiment of the invention in that the thermally conductive VIAs are in contact with a heat sink disposed on a surface of the multilayer board. This is especially the case when arranged on the multilayer board
Solenoidspulen nur mit moderaten Spannungen betrieben werden. Eine moderate Spannung in diesem Sinne ist beispielsweise dann gegeben, wenn die Potentialunter- schiede innerhalb der Platine nicht mehr als 150 V betragen. In diesem Fall ist es nicht notwendig, die thermisch leitfähigen VIAs vor dem Kühlkörper noch stärker zu isolieren. Hierbei können auch beide Oberflächen der Multilayer-Platine zur Solenoid coils can only be operated with moderate voltages. A moderate voltage in this sense is given, for example, if the potential differences within the board are not more than 150 V. In this case, it is not necessary to further isolate the thermally conductive VIAs in front of the heat sink. Here, both surfaces of the multilayer board for
Entwärmung mit einem Kühlkörper versehen sein. In diesem Fall ist es zweckmäßig, dass die thermisch leitfähigen VIAs mit beiden Kühlkörpern in Berührung zu stehen. Heat dissipation should be provided with a heat sink. In this case it is expedient that the thermally conductive VIAs be in contact with both heat sinks.
Wird jedoch mit sehr hohen Spannungen innerhalb der Multilayer-Platine gearbeitet, ist eine Ausführungsform der Erfindung vorteilhaft, bei der die Multilayer-Platine eine isolierende Deckschicht aufweist, die zumindest eine oberflächennahe Flachspule und die thermischen VIAs abdeckt. Gegebenenfalls muss eine solche isolierende Deck- schicht auf beiden Oberflächen der Multilayer-Platine vorgesehen werden, um einen Schutz vor unzulässig hohen Berührungsspannungen zu gewährleisten. Eine hohe Spannung in diesem Sinne ist beispielsweise dann gegeben, wenn Potenzialunterschiede innerhalb der Mulilayer-Platine mehr als 500 V betragen können. Insbesondere zwischen zwei benachbarten Flachspulen, die elektrisch parallel zueinander geschaltet werden, ist es wünschenswert, den Isolationsabstand so gering wie möglich zu halten. Hierdurch ergibt sich zum einen ein optimaler Wärmetransport bei der Verwirklichung der erfindungsgemäßen Lehre. Zum anderen wird die Bauhöhe der Multilayer-Platine nicht größer als notwendig ausgelegt. Eine besonders dünne Isolationsschicht zwischen zwei vertikal benachbarten Flachspulen lässt sich in vorteilhafter Ausgestaltung der Erfindung dadurch gewährleisten, dass Ebenen der Multilayer- Platine durch eine zwischen besagten benachbarten Flachspulen liegende Backlack- schicht mechanisch miteinander verbunden sind. Hierbei wird vorteilhafterweise auf eine Prepreg-Schicht zur Trennung der vertikal übereinandergeschichteten Einzelplatinen, an deren Ober- und Unterseite jeweils mindestens eine Flachspule aufgebracht ist, verzichtet. Insbesondere dann, wenn die erfindungsgemäße Multilayer-Platine als Primärteil eines Linearmotors eingesetzt werden soll, ist eine Ausgestaltung der Erfindung vorteilhaft, bei der die erste Solenoidspule lotrecht zur Oberfläche der Multilayer-Platine von einem Eisenkern durchsetzt ist. Sind noch weitere Solenoidspulen neben der ersten Solenoidspule vorgesehen, ist es vorteilhaft, auch die weiteren Solenoidspulen mit Ei- senkernen zu durchsetzen. However, when working with very high voltages within the multilayer board, an embodiment of the invention is advantageous in which the multilayer board has an insulating cover layer which covers at least one near-surface flat coil and the thermal VIAs. If necessary, such an insulating cover layer must be provided on both surfaces of the multilayer board in order to ensure protection against inadmissibly high contact voltages. A high voltage in this sense is given, for example, when potential differences within the multilayer board can be more than 500 V. In particular, between two adjacent flat coils, which are electrically connected in parallel, it is desirable to keep the isolation distance as low as possible. This results, on the one hand, in optimum heat transport when implementing the teaching according to the invention. On the other hand, the height of the Multilayer board designed no larger than necessary. A particularly thin insulating layer between two vertically adjacent flat coils can be ensured in an advantageous embodiment of the invention in that layers of the multilayer board are mechanically connected to one another by a backcoat layer lying between said adjacent flat coils. This is advantageously on a prepreg layer for separating the vertically stacked individual boards, at the top and bottom of each at least one flat coil is applied dispensed. In particular, when the multilayer board according to the invention is to be used as a primary part of a linear motor, an embodiment of the invention is advantageous in which the first solenoid coil is penetrated perpendicular to the surface of the multilayer board by an iron core. If further solenoid coils are provided next to the first solenoid coil, it is advantageous to also pass through the other solenoid coils with iron cores.
Im Folgenden wird die Erfindung anhand der in den Figuren dargestellten Ausführungsbeispiele näher erläutert. Es zeigen: In the following, the invention will be explained in more detail with reference to the embodiments illustrated in the figures. Show it:
Figur 1 ein Querschnitt durch eine Multilayer-Platine mit einer Solenoidspule gemäß dem Stand der Technik, 1 shows a cross section through a multilayer board with a solenoid coil according to the prior art,
Figur 2 ein Querschnitt durch eine Ausführungsform der erfindungsgemäßen  Figure 2 is a cross-section through an embodiment of the invention
Multilayer-Platine, in der eine erste Solenoidspule zu erkennen ist, Multi-layer board, in which a first solenoid coil can be seen,
Figur 3 ein Querschnitt durch eine weitere Ausführungsform der erfindungsgemäßen Multilayer-Platine mit zwei Solenoidspulen, 3 shows a cross section through a further embodiment of the multilayer board according to the invention with two solenoid coils,
Figur 4 ein Querschnitt durch eine weitere Ausführungsform der erfindungsgemäßen Multilayer-Platine mit einer ersten Solenoidspule und einer passiven Leiterbahnstruktur,  FIG. 4 shows a cross section through a further embodiment of the multilayer board according to the invention with a first solenoid coil and a passive printed conductor structure,
Figur 5 ein Querschnitt durch eine weitere Ausführungsform der Multilayer-Platine mit der ersten Solenoidspule gemäß Figur 4 und der passiven Leiterbahnstruktur, Figur 6 eine Aufsicht auf einer Ausführungsform der erfindungsgemäßen 5 shows a cross section through a further embodiment of the multilayer board with the first solenoid coil according to FIG. 4 and the passive printed conductor structure, FIG. Figure 6 is a plan view of an embodiment of the invention
Multilayer-Platine mit sechs lateral benachbarten Solenoidspulen und Multilayer board with six laterally adjacent solenoid coils and
Figur 7 eine schematische Darstellung eines Linearmotors, dessen Primärteil in Figure 7 is a schematic representation of a linear motor whose primary part in
Form einer Ausführungsform der erfindungsgemäßen Multilayer-Platine realisiert ist.  Form of an embodiment of the multilayer board according to the invention is realized.
Figur 1 zeigt eine aus dem Stand der Technik bekannte Solenoidspule, die als FIG. 1 shows a solenoid coil known from the prior art, referred to as
Multilayer-Platine ausgebildet ist. Die Multilayer-Platine ist aufgebaut aus drei übereinander geschichteten Einzelplatinen. Jede dieser drei Platinen hat sowohl auf der Oberseite der Platine als auch auf der Unterseite der Einzelplatine eine spiralförmige Flachspule 1 - 6. So trägt die oberste Einzelplatine des Stacks auf ihrer Oberseite eine erste Flachspule 1 , von der in dem Querschnitt 8 drei Windungen erkennbar sind, die lateral nebeneinander angeordnet sind. An der Unterseite dieser Einzelplatine, die die oberste Ebene des Stacks bildet, befindet sich eine zweite Flachspule 2, deren Wick- lungssinn dem der ersten Flachspule 1 entspricht. Multilayer board is formed. The multilayer board is made up of three stacked individual boards. Each of these three boards has both on the top of the board and on the underside of the single board a spiral flat coil 1 - 6. Thus, the top single board of the stack carries on its top a first flat coil 1, of which in the cross section 8 three turns can be seen , which are arranged laterally side by side. On the underside of this single board, which forms the uppermost level of the stack, there is a second flat coil 2 whose winding sense corresponds to that of the first flat coil 1.
Unterhalb dieser ersten Ebene, die durch die erste Einzelplatine mit der ersten Flachspule 1 und der zweiten Flachspule 2 gebildet wird, befindet sich eine zweite Einzelplatine, auf deren Oberseite eine dritte Flachspule 3 aufgebracht ist und an deren Un- terseite eine vierte Flachspule 4 angeordnet ist. Auch diese Flachspulen 3, 4 entsprechen in ihrer Wicklungsform den Flachspulen 1 , 2 der ersten Ebene. Schließlich befindet sich auf der untersten Ebene der Multilayer-Platine eine weitere Einzelplatine, auf deren Oberseite eine fünfte Flachspule 5 angeordnet ist und auf deren Unterseite eine sechste Flachspule 6 angeordnet ist. In der Gestalt der Wicklung entsprechen die fünfte und sechste Flachspule 5, 6 den darüber angeordneten Flachspulen 1 , 2, 3, 4. Below this first plane, which is formed by the first individual board with the first flat coil 1 and the second flat coil 2, there is a second single board, on the upper side of a third flat coil 3 is applied and on the underside a fourth flat coil 4 is arranged , These flat coils 3, 4 correspond in their winding form the flat coils 1, 2 of the first level. Finally, located on the lowest level of the multilayer board another single board, on top of which a fifth flat coil 5 is arranged and on the underside of a sixth flat coil 6 is arranged. In the form of the winding, the fifth and sixth flat coils 5, 6 correspond to the flat coils 1, 2, 3, 4 arranged above them.
Während des Fertigungsprozesses werden zunächst die Einzelplatinen mit ihren zugehörigen Flachspulen 1 - 6 gefertigt. Anschließend werden zwischen die verschiedenen Einzelplatinen isolierende, hier nicht dargestellte Prepreg-Schichten angeordnet, durch die jeweils untere Flachspulen einer Einzelplatine 2, 4 von den darunterliegenden oberen Flachspulen 3, 5 der jeweils darunter angeordneten Einzelplatine elektrisch isoliert werden. Die Leiterbahnen der verschiedenen Flachspulen sind in der Regel aus Kupfer und befinden sich auf einem PCB-Substrat, wie beispielsweise FR4, welches die jeweiligen Einzellayer oder Einzelplatine bildet. Nachdem die verschiedenen Substrate jeweils getrennt durch ein oder zwei Blätter Prepreg-Material aufeinandergestapelt wur- den, wird der so entstandene Gesamtstapel laminiert, um eine mechanische Verbindung zwischen den Substraten herzustellen. During the manufacturing process, the individual boards are first manufactured with their associated flat coils 1-6. Subsequently, insulating, not shown here prepreg layers are arranged between the various individual boards, are electrically isolated by the respective lower flat coils of a single board 2, 4 of the underlying upper flat coils 3, 5 of each arranged below individual board. The traces of the various pancake coils are typically copper and are located on a PCB substrate, such as FR4, which forms the respective single layer or single board. After the various substrates have been stacked separately by one or two sheets of prepreg material, the resulting stack is laminated to provide a mechanical bond between the substrates.
Um eine Solenoidspule aus den verschiedenen Flachspulen 1 - 6 zu formen, müssen die Flachspulen 1 - 6 noch elektrisch miteinander kontaktiert werden. Dies geschieht in der Regel durch elektrische Durchkontaktierung, sogenannte VIAs, die in Figur 1 nicht dargestellt sind. In order to form a solenoid coil from the different flat coils 1 - 6, the flat coils 1 - 6 still have to be electrically contacted with each other. This is usually done by electrical via, so-called VIAs, which are not shown in Figure 1.
Die Leiterbahnabschnitte der verschiedenen Windungen einer jeden Flachspule 1 - 6 müssen in lateraler Richtung genügend weit voneinander beabstandet sein, um die elektrische Isolation zwischen den einzelnen Windungen zu gewährleisten. Diese elektrische Isolationsstrecke muss jedoch auch bei der Abfuhr von Wärme überwunden werden, die in den inneren Windungen jeder Flachspule 1 - 6 entsteht und am Rand der Multilayer-Platine in Richtung Oberfläche abgeführt werden kann. Figur 1 zeigt beispielhaft den Wärmefluss der innersten dargestellten Windung der dritten Flachspule 3. Insbesondere dann, wenn der Querschnitt einer jeden Leiterbahn groß gewählt werden soll, um einen möglichst hohen Strom führen zu können, ergibt sich allein fertigungsbedingt ein Abstand der Leiterbahnen in lateraler Richtung in der Größenordnung von einigen Hundert Mikrometern. Somit ist ersichtlich, dass dieser elektrische Isolationsabstand ein Hemmnis für die Entwärmung der Multilayer-Platine dar- stellt. The conductor track sections of the various turns of each flat coil 1 - 6 must be sufficiently far apart in the lateral direction to ensure electrical insulation between the individual turns. However, this electrical insulation gap must be overcome even in the removal of heat that arises in the inner turns of each flat coil 1 - 6 and can be dissipated at the edge of the multilayer board toward the surface. FIG. 1 shows, by way of example, the heat flow of the innermost turn of the third flat coil 3. In particular, if the cross section of each conductor track is to be chosen large in order to be able to conduct as high a current as possible, this results in a spacing of the conductor tracks in the lateral direction alone of the order of a few hundred microns. Thus, it can be seen that this electrical isolation distance represents an obstacle to the cooling of the multilayer board.
Figur 2 zeigt einen Querschnitt 8 durch eine Ausführungsform der erfindungsgemäßen Multilayer-Platine. Auch hier bildet die Multilayer-Platine eine Solenoidspule, die durch elektrische Verschaltung von insgesamt sechs Flachspulen 1 - 6 gebildet wird, die in vertikal übereinanderliegenden Ebenen angeordnet sind. Auch hier trägt ein erster Einzellayer an seiner Oberseite die erste Flachspule 1 und an dessen Unterseite die zweite Flachspule 2. Beide Flachspulen 1 , 2 wurden vor der Bildung des Multilayer- Stacks auf ein PCB-Substrat aufgebracht. Gleiches gilt für die dritte Flachspule 3 und die vierte Flachspule 4, die ebenfalls auf ein PCB-Substrat vor der Fertigung des Ge- samt-Stacks aufgebracht wurden. Ebenso wurde die fünfte Flachspule 5 auf die Oberseite einer dritten Einzellayer-Platine aufgebracht und die sechste Flachspule 6 auf die Unterseite dieser Einzelplatine. Figure 2 shows a cross section 8 through an embodiment of the multilayer board according to the invention. Again, the multilayer board forms a solenoid coil, which is formed by electrical interconnection of a total of six flat coils 1 - 6, which are arranged in vertically superimposed planes. Again, a first single layer carries on its upper side the first flat coil 1 and on the underside of the second flat coil 2. Both flat coils 1, 2 were applied to a PCB substrate before the formation of the multilayer stack. The same applies to the third flat coil 3 and the fourth flat coil 4, which were also applied to a PCB substrate prior to the fabrication of the overall stack. Likewise, the fifth flat coil 5 was applied to the top of a third single-layer board and the sixth flat coil 6 on the underside of this single board.
Im Unterschied zu dem in Figur 1 dargestellten Stand der Technik sind jedoch hier jeweils zwei in vertikaler Richtung unmittelbar benachbarte Flachspulen 1 - 6 in lateraler Richtung zueinander versetzt angeordnet. Auf diese Art und Weise ist gewährleistet, dass beispielsweise jeder Leiterbahnabschnitt 26 der zweiten Flachspule 2 vertikal in teilweiser Überdeckung mit zwei Leiterbahnabschnitten 7 der ersten Flachspule angeordnet ist. Ebenso ist beispielsweise der Leiterbahnabschnitt der dritten Flachspule 3, der die mittlere Windung darstellt, von zwei vertikal betrachtet darüberliegenden Leiterbahnabschnitten der zweiten Flachspule 2 in teilweiser Überdeckung angeordnet. Die eingezeichneten Pfeile visualisieren, wie durch den lateralen Versatz der in vertikaler Richtung unmittelbar benachbarten Flachspulen der Wärmetransport von den inneren Windungen einer jeden Flachspule 1 - 6 zum äußeren Randbereich einer jeden Flachspule 1 - 6 verbessert wird. Beispielhaft ist das in der Figur 2 für den Wärmetransport der zweiten und dritten Flachspule 2, 3 dargestellt. Durch den ab- schnittsweisen Überdeckungsbereich zwischen zwei Leiterbahnabschnitten, die in vertikaler Richtung benachbart sind, muss nur noch ein deutlich geringerer Abstand durch elektrisch- und somit auch wärmeisolierendes Material überbrückt werden. In contrast to the prior art illustrated in FIG. 1, however, in each case two flat coils 1 - 6 immediately adjacent in the vertical direction are arranged offset from each other in the lateral direction. In this way it is ensured that, for example, each conductor track section 26 of the second flat coil 2 is arranged vertically in partial overlap with two conductor track sections 7 of the first flat coil. Likewise, for example, the conductor track portion of the third flat coil 3, which represents the mean turn, arranged by two vertically above-lying conductor track portions of the second flat coil 2 in partial coverage. The drawn arrows visualize how the heat transfer from the inner turns of each flat coil 1 to 6 to the outer edge region of each flat coil 1 to 6 is improved by the lateral offset of the flat coils immediately adjacent in the vertical direction. By way of example, this is shown in FIG. 2 for the heat transport of the second and third flat coils 2, 3. Due to the sectional coverage area between two conductor track sections, which are adjacent in the vertical direction, only a significantly smaller distance has to be bridged by electrically and thus also heat-insulating material.
In Figur 2 ist auch zu erkennen, dass der Abstand zwischen der zweiten Flachspule 2 und der dritten Flachspule 3 in vertikaler Richtung geringer ist als der Abstand zwischen der ersten Flachspule 1 und der zweiten Flachspule 2. Ebenso ist der Abstand zwischen der vierten Flachspule 4 und der fünften Flachspule 5 deutlich geringer als der Abstand zwischen der fünften Flachspule 5 und der sechsten Flachspule 6. Dies ist auf die zugrundeliegende Verbindungstechnologie zwischen den zuvor bereits er- wähnten Einzellayern zurückzuführen. Verwendet man zur Verbindung der Einzelplatinen nur ein sehr dünnes Prepreg-Material oder alternativ eine reine Backlackschicht, kann die isolierende Verbindungsschicht zwischen den zu einem Stack verbundenen Einzelplatinen geringer gewählt werden als die Dicke des Substrates, auf dem die Flachspulen jeder Einzelplatine angeordnet sind. Auf diese Art und Weise kann, sofern es der geforderte elektrische Isolationsabstand erlaubt, die Wärmeleitung vom zentralen inneren Bereich der Solenoidspule zum äußeren Bereich der Solenoidspule noch weiter verbessert werden. It can also be seen in FIG. 2 that the distance between the second flat coil 2 and the third flat coil 3 in the vertical direction is smaller than the distance between the first flat coil 1 and the second flat coil 2. Likewise, the distance between the fourth flat coil 4 and the fifth flat coil 5 is significantly smaller than the distance between the fifth flat coil 5 and the sixth flat coil 6. This is due to the underlying connection technology between the above-mentioned single layers. If only a very thin prepreg material or alternatively a pure baked enamel layer is used to connect the individual boards, the insulating connecting layer between the stacked individual boards can be selected to be smaller than the thickness of the substrate on which the Flat coils of each individual board are arranged. In this way, as far as the required electrical isolation distance permits, the heat conduction from the central inner portion of the solenoid coil to the outer portion of the solenoid coil can be further enhanced.
Figur 3 zeigt einen Querschnitt 8 einer Ausführungsform einer Multilayer-Platine entsprechend der vorliegenden Erfindung, bei der auf der Multilayer-Platine zwei Figure 3 shows a cross section 8 of an embodiment of a multilayer board according to the present invention, in which on the multilayer board two
Solenoidspulen lateral benachbart zueinander angeordnet sind. Die erste Solenoid coils are arranged laterally adjacent to each other. The first
Solenoidspule, die in dem Querschnitt 8 links angeordnet ist, umfasst drei vertikal übereinander liegende Flachspulen 1 - 6, die in der bereits in Zusammenhang mit Figur 2 beschriebenen Art und Weise jeweils lateral versetzt zueinander angeordnet sind. Lateral betrachtet greifen die Flachspulen 1 - 6 der ersten Solenoidspule kammartig in eine unmittelbar lateral benachbarte zweite Solenoidspule mit Flachspulen 9 - 14 ein. Der Eingriff entsteht im Bereich der jeweils äußeren Leiterbahnabschnitte 27, 15. Wie zu erkennen ist, ist durch den kammartigen Eingriff gewährleistet, dass jeweils ein äußerer Leiterbahnabschnitt 15 der zweiten Solenoidspule mit mindestens einem äußeren Leiterbahnabschnitt 27 der ersten Solenoidspule vertikal in teilweiser Überdeckung angeordnet ist. Durch diese Überdeckung wird ein Wärmetransport zwischen den beiden beteiligten Solenoidspulen auf besonders effektive Art und Weise ermöglicht. Wie zu erkennen ist, muss auch hier nur der relativ geringe vertikale Abstand zwischen zwei in vertikaler Richtung benachbarten äußeren Leiterbahnabschnitten der beiden Solenoidspulen überwunden werden, um den lateralen Wärmetransport zu ermöglichen. Auf diese Art und Weise kann eine Vielzahl von Solenoidspulen lateral betrachtet nebeneinander auf einer Multilayer-Platine angeordnet werden und hierbei ein hervorragender Wärmetransport in lateraler Richtung in der Multilayer-Platine gewährleistet werden, der dem thermischen Verhalten einer massiven Metallschicht nahekommt. Figur 4 zeigt eine weitere Ausführungsform einer Multilayer-Platine gemäß der vorliegenden Erfindung in einem Querschnitt 8. Zu erkennen sind wiederum sechs vertikal übereinander liegende Flachspulen 1 - 6 einer ersten Solenoidspule. Die Anordnung der Flachspulen 1 - 6 entspricht im Wesentlichen der Anordnung, die bereits im Zu- samnnenhang mit Figur 2 erläutert wurde. Im linken Bereich des Querschnitts 8 ist eine passive Leiterbahnstruktur 16 zu erkennen, die kammartig in die äußeren Leiterbahnabschnitte 27 der ersten Solenoidspule eingreift. Diese passive Leiterbahnstruktur 16 ist Stromfluss ausgeschlossen, das heißt, sie ist von sämtlichen stromführen- den Elementen der Multilayer-Platine galvanisch getrennt. Die passive Leiterbahnstruktur 16 hat die Aufgabe, die auf die bereits beschriebene Art und Weise in lateraler Richtung durch die Multilayer-Platine geleitete Wärme auf sehr effektive Art und Weise vertikal zu einer oder beiden Oberflächen der Multilayer-Platine zu transportieren. Auf einer dieser Oberflächen ist beispielhaft ein Kühlkörper 18 angeordnet, über den die Wärme schließlich an die Umgebung abgegeben wird. Selbstverständlich kann sich ein derartiger Kühlkörper 18 zusätzlich noch auf der Unterseite der dargestellten Multilayer-Platine befinden. Um auf optimale Art und Weise von der passiven Leiterbahnstruktur 16 die Wärme nunmehr in vertikaler Richtung in Richtung des Kühlkör- pers 18 zu transportieren, sind die passiven Leiterbahnabschnitte 16 mit thermisch leitfähigen VIAs 17 durchsetzt. Hierbei kann es sich beispielsweise um Bohrungen handeln, die mit einem thermisch gut leitfähigen Metall anschließend gefüllt werden. Da die Leiterbahnstruktur 16 elektrisch nicht wirksam ist, ist der durch die thermisch leitfähigen VIAs verursachte Kurzschluss der einzelnen Leiterbahnen der passiven Leiterbahnstruktur 16 unschädlich. Solenoid coil, which is arranged on the left in the cross section 8, comprises three vertically superimposed flat coils 1-6, which are each arranged laterally offset from one another in the manner already described in connection with FIG. Viewed laterally, the pancakes 1-6 of the first solenoid coil engage in a comb-like manner in a directly laterally adjacent second solenoid coil with pancakes 9-14. The engagement occurs in the area of the respective outer conductor sections 27, 15. As can be seen, the comb-like engagement ensures that in each case an outer conductor section 15 of the second solenoid coil with at least one outer conductor section 27 of the first solenoid coil is arranged vertically in partial overlap. This overlap enables heat transfer between the two solenoid coils involved in a particularly effective manner. As can be seen, only the relatively small vertical distance between two vertically adjacent outer conductor track sections of the two solenoid coils must be overcome in order to allow the lateral heat transfer. In this way, a multiplicity of solenoid coils can be arranged laterally side by side on a multilayer board and, in this case, an excellent heat transport in the lateral direction in the multilayer board can be ensured, which approaches the thermal behavior of a solid metal layer. FIG. 4 shows a further embodiment of a multilayer board according to the present invention in a cross section 8. In turn, six vertically stacked flat coils 1-6 of a first solenoid coil can be seen. The arrangement of the flat coils 1 - 6 essentially corresponds to the arrangement already in use. Samnnenhang was explained with Figure 2. In the left-hand area of the cross-section 8, a passive printed conductor structure 16 can be seen, which comb-like engages in the outer conductor track sections 27 of the first solenoid coil. This passive conductor track structure 16 excludes current flow, that is, it is galvanically isolated from all current-carrying elements of the multilayer board. The passive interconnect structure 16 has the task of transporting in the manner already described in the lateral direction through the multilayer board heat in a very effective manner vertically to one or both surfaces of the multilayer board. On one of these surfaces, a heat sink 18 is arranged by way of example, via which the heat is finally released to the environment. Of course, such a heat sink 18 may additionally be on the bottom of the illustrated multilayer board. In order to transport the heat in an optimal manner from the passive printed conductor structure 16 in the vertical direction in the direction of the heat sink 18, the passive printed conductor sections 16 are penetrated by thermally conductive VIAs 17. These may be, for example, bores which are subsequently filled with a thermally highly conductive metal. Since the interconnect structure 16 is not electrically effective, the short circuit caused by the thermally conductive VIAs of the individual interconnects of the passive interconnect structure 16 is harmless.
Wie in Figur 4 zu erkennen ist, ist das dargestellte thermisch leitfähige VIA 17 in unmittelbarem Kontakt mit dem Kühlkörper 18. Hierdurch ergibt sich ein nahezu ideales Wärmeleitverhalten zwischen der passiven Leiterbahnstruktur 16 und dem Kühlkör- per 18. Sollte jedoch die Solenoidspule mit einer höheren Spannung beaufschlagt werden, kann es sein, dass der Isolationsabstand zwischen den äußeren Leiterbahnabschnitten 27 der Solenoidspule und der passiven Leiterbahnstruktur 16 nicht ausreichend ist, um ausreichend Berührungsschutz zu gewährleisten. Für Hochspannungsanwendungen empfiehlt sich daher eine weitere vorteilhafte Ausführungsform der Erfindung, die in Figur 5 dargestellt ist. Beispielhaft seine eine Anwendung in einem Umrichter mit Gleichspannungszwischenkreis und einer Zwischen- kreisspannung von 750 V genannt. Der Aufbau entspricht im Wesentlichen dem be- reits in Figur 4 gezeigten Querschnitt 8, wobei jedoch nunmehr zwischen dem Kühlkörper 18, den Leiterbahnen der obersten ersten Flachspule 1 und dem thermischen VIA 17 eine isolierende Prepreg-Schicht 19 aufgebracht wurde. Ebenso befindet sich eine derartige Isolationsschicht 19 an der Unterseite der Platine, an der sich ebenfalls optional noch ein weiterer, hier nicht dargestellter Kühlkörper befinden kann. Die Prepreg-Schicht ist dünn genug gewählt, um den Wärmetransport vom thermisch leitfähigen VIA 17 zum Kühlkörper 18 nicht über Gebühr zu behindern. Gleichzeit ist sie aber so dick gewählt, dass ausreichend Berührungsschutz für die Multilayer-Platine gewährleistet ist. Durch die Prepregschicht 19 an beiden Oberflächen der As can be seen in FIG. 4, the illustrated thermally conductive VIA 17 is in direct contact with the heat sink 18. This results in a nearly ideal heat conduction behavior between the passive printed conductor structure 16 and the heat sink 18. However, should the solenoid coil be at a higher voltage can be acted upon, it may be that the insulation distance between the outer conductor portions 27 of the solenoid coil and the passive interconnect structure 16 is not sufficient to ensure sufficient contact protection. For high voltage applications, therefore, a further advantageous embodiment of the invention, which is shown in Figure 5 is recommended. As an example, it is called an application in a converter with direct voltage intermediate circuit and an intermediate circuit voltage of 750 V. The structure corresponds essentially to the cross-section 8 already shown in Figure 4, but now an insulating prepreg layer 19 has been applied between the heat sink 18, the conductor tracks of the uppermost first flat coil 1 and the thermal VIA 17. Likewise, such an insulating layer 19 is located on the underside of the board, to which optionally also another, not shown here, heat sink can be located. The prepreg layer is selected to be thin enough so as not to obstruct the heat transfer from the thermally conductive VIA 17 to the heat sink 18. At the same time, however, it is so thick that sufficient contact protection for the multilayer board is ensured. By the prepreg 19 on both surfaces of
Multilayerplatine ergibt sich eine vollkommen glatte Oberfläche der Platine. Multilayer board results in a perfectly smooth surface of the board.
Figur 6 zeigt eine Ausführungsform der erfindungsgemäßen Multilayer-Platine in einer Aufsicht. Die Multilayer-Platine dient als Primärteil 22 eines Linearmotors. Neben einer ersten Solenoidspule 20 und einer zweiten Solenoidspule 21 befinden sich vier weite- re baugleiche Solenoidspulen lateral neben den bereits genannten Spulen. Jede einzelne Solenoidspule ist so aufgebaut, dass sie in vertikaler Richtung betrachtet den erfindungsgemäßen lateralen Versatz der benachbarten Flachspulen aufweist. Des Weiteren greifen die jeweils äußersten Leiterbahnabschnitte einer jeden Figure 6 shows an embodiment of the multilayer board according to the invention in a plan view. The multilayer board serves as the primary part 22 of a linear motor. In addition to a first solenoid coil 20 and a second solenoid coil 21, four further identical solenoid coils are located laterally next to the already mentioned coils. Each individual solenoid coil is constructed such that it has the lateral offset of the adjacent flat coils according to the invention viewed in the vertical direction. Furthermore, the outermost trace portions of each grip
Solenoidspule kammartig in die äußersten Leiterbahnabschnitte der unmittelbar lateral benachbarten Solenoidspule ein, wobei dieser Eingriff auf die in Figur 3 dargestellte Art und Weise realisiert ist. Hierdurch wird in lateraler Richtung ein Wärmeleitwert innerhalb der Multilayer-Platine zwischen den einzelnen Solenoidspulen gewährleistet, der dem einer massiven Metallplatte nahekommt. Figur 7 zeigt schematisch einen Linearmotor mit einem Primärteil 22, welches wie das in Figur 6 gezeigte als Multilayer-Platine aufgebaut sein kann. Ein solches Primärteil 22 ist sehr kompakt und leicht, sodass es sich für hochdynamische Anwendungen besonders gut eignet. Dieses Primärteil 22 steht in einer elektromagnetischen Wechselwirkung mit einem Sekundärteil 23. Das Sekundärteil umfasst Permanentmagnete 24, die in ein Weicheisenbett eingebettet sind. Primärteil 22 und Sekundärteil 23 sind über einen Luftspalt 25 voneinander beabstandet. Durch geeignete Bestromung der im Primärteil 27 vorhandenen Solenoidspulen kann eine translatorische hochdynamische Bewegung des Primärteils 22 realisiert werden. Bezuqszeichenliste Solenoid coil comb-like in the outermost trace portions of the immediately laterally adjacent solenoid coil, wherein this engagement is realized in the manner shown in Figure 3. As a result, a thermal conductivity within the multilayer board between the individual solenoid coils is ensured in the lateral direction, which comes close to that of a solid metal plate. Figure 7 shows schematically a linear motor with a primary part 22, which may be constructed as shown in Figure 6 as a multilayer board. Such a primary part 22 is very compact and lightweight, so that it is particularly well suited for highly dynamic applications. This primary part 22 is in an electromagnetic interaction with a secondary part 23. The secondary part comprises permanent magnets 24 which are embedded in a soft iron bed. Primary part 22 and secondary part 23 are spaced apart by an air gap 25. By means of suitable energization of the solenoid coils present in the primary part 27, a translationally highly dynamic movement of the primary part 22 can be realized. LIST OF REFERENCES
1 erste Flachspule 1 first flat coil
2 zweite Flachspule 2 second flat coil
3 dritte Flachspule  3 third flat coil
4 vierte Flachspule  4 fourth flat coil
5 fünfte Flachspule  5 fifth flat coil
6 sechste Flachspule  6 sixth flat coil
7, 26 Leiterbahnabschnitte 7, 26 trace sections
8 Querschnitt 8 cross section
9 - 14 Flachspulen der zweiten Solenoidspule  9 - 14 flat coils of the second solenoid coil
15 äußere Leiterbahnabschnitte der zweiten Solenoidspule 15 outer trace portions of the second solenoid coil
16 passive Leiterbahnstruktur 16 passive conductor track structure
17 thermisch leitfähige VIAs 17 thermally conductive VIAs
18 Kühlkörper  18 heat sinks
19 isolierende Deckschicht  19 insulating cover layer
20 erste Solenoidspule  20 first solenoid coil
21 zweite Solenoidspule  21 second solenoid coil
22 Primärteil 22 primary part
23 Sekundärteil  23 secondary part
24 Permanentmagnete  24 permanent magnets
25 Luftspalt  25 air gap

Claims

Patentansprüche claims
1 . Mulilayer-Platine mit vertikal übereinanderliegenden Flachspulen (1 -6), die zur Ausbildung einer ersten Solenoidspule (20) elektrisch in Reihe oder parallel geschaltet sind, dadurch gekennzeichnet, dass jeweils zwei vertikal benachbarte Flachspulen (1 ,2) derart lateral versetzt zueinander angeordnet sind, dass in einem Querschnitt (8) lotrecht zur Oberfläche der Mulilayer-Platine Leiterbahnabschnitte (26) der einen Flachspule (2) vertikal in teilweiser Überdeckung mit zwei Leiterbahnabschnitten (7) der anderen Flachspule (1 ) angeordnet sind. 1 . Mulilayer board with vertically superimposed flat coils (1 -6), which are connected to form a first solenoid coil (20) electrically in series or in parallel, characterized in that each two vertically adjacent flat coils (1, 2) are arranged laterally offset from one another in that, in a cross-section (8) perpendicular to the surface of the multilayer board, conductor track sections (26) of one flat coil (2) are arranged vertically in partial overlap with two conductor track sections (7) of the other flat coil (1).
2. Mulilayer-Platine nach Anspruch 1 , wobei die Mulilayer-Platine mindestens eine zweite Solenoidspule (21 ) aufweist, die lateral versetzt zu der ersten Solenoidspule (20) angeordnet ist, wobei äußere Leiterbahnabschnitte (15) von Flachspulen (9-14) der zweiten Solenoidspule (21 ) kammartig in äußere Leiterbahnabschnitte (27) der Flachspulen (1 -6) der ersten Solenoidspule (20) eingreifen, so dass in dem besagten Querschnitt (7) jeweils ein äußerer Leiterbahnabschnitt (15) der zweiten 2. Mulilayer board according to claim 1, wherein the multilayer board has at least one second solenoid coil (21) which is arranged laterally offset from the first solenoid coil (20), said outer conductor sections (15) of flat coils (9-14) of second solenoid coil (21) comb-like in outer trace portions (27) of the flat coils (1-6) of the first solenoid coil (20) engage, so that in said cross-section (7) in each case an outer conductor track portion (15) of the second
Solenoidspule (21 ) mit mindestens einem äußeren Leiterbahnabschnitt (14) der ersten Solenoidspule (20) vertikal in teilweiser Überdeckung angeordnet ist. Solenoid coil (21) with at least one outer conductor portion (14) of the first solenoid coil (20) is arranged vertically in partial overlap.
3. Mulilayer-Platine nach einem der vorhergehenden Ansprüche, wobei die Mulilayer- Platine eine passive Leiterbahnstruktur (16) aufweist, die von allen stromführenden Leiterbahnen der Mulilayer-Platine galvanisch getrennt ist, lateral versetzt zu der ers- ten Solenoidspule (20) angeordnet ist und kammartig in die äußeren Leiterbahnabschnitte (27) der Flachspulen (1 -6) der ersten Solenoidspule (20) eingreift. 3. Mulilayer board according to one of the preceding claims, wherein the multilayer board has a passive printed conductor structure (16), which is galvanically isolated from all current-carrying conductor tracks of the multilayer board, laterally offset from the first solenoid coil (20) and comb-like in the outer conductor portions (27) of the flat coils (1-6) of the first solenoid coil (20) engages.
4. Mulilayer-Platine nach Anspruch 3 mit thermischen leitfähigen VIAs (17), die die passive Leiterbahnstruktur (16) vertikal durchdringen. 4. Mulilayer board according to claim 3 with thermal conductive VIAs (17), which penetrate the passive interconnect structure (16) vertically.
5. Mulilayer-Platine nach Anspruch 4, wobei die thermisch leitfähigen VIAs (17) mit einem auf einer Oberfläche der Mulilayer-Platine angeordneten Kühlkörper (18) in Berührung stehen. 5. Mulilayer board according to claim 4, wherein the thermally conductive VIAs (17) with a arranged on a surface of the multilayer board heat sink (18) are in contact.
6. Mulilayer-Platine nach Anspruch 4, wobei die Mulilayer-Platine eine isolierende Deckschicht (19) aufweist, die zumindest eine oberflächennahen Flachspule (1 ,9) und die thermischen VIAs (17) abdeckt. 6. Mulilayer board according to claim 4, wherein the multilayer board has an insulating cover layer (19), which covers at least one near-surface flat coil (1, 9) and the thermal VIAs (17).
7. Mulilayer-Platine nach einem der vorhergehenden Ansprüche, wobei Ebenen der Mulilayer-Platine durch eine zwischen benachbarten Flachspulen liegende Backlackschicht mechanisch miteinander verbunden sind. 7. Mulilayer board according to one of the preceding claims, wherein planes of the multilayer board are mechanically connected to each other by a lying between adjacent flat coils baking enamel layer.
8. Mulilayer-Platine nach einem der vorhergehenden Ansprüche, wobei die erste8. Mulilayer board according to one of the preceding claims, wherein the first
Solenoidspule (20) lotrecht zur Oberfläche der Mulilayer-Platine von einem Eisenkern durchsetzt ist. Solenoid coil (20) perpendicular to the surface of the Mulilayer board is interspersed by an iron core.
9. Linearmotor mit einem Primärteil (22), das als Mulilayer-Platine nach einem der vorhergehenden Ansprüche ausgebildet ist, und einem Sekundärteil (23) mit Permanentmagneten (24), das über einen Luftspalt (25) vom Primärteil (22) beabstandet ist. 9. linear motor having a primary part (22) which is formed as a multilayer board according to one of the preceding claims, and a secondary part (23) with permanent magnets (24) which is spaced via an air gap (25) from the primary part (22).
10. Verfahren zur Herstellung einer Solenoidspule auf einer Mulilayer-Platine, bei dem Flachspulen (1 -5) vertikal übereinander in verschiedenen Ebenen der Mulilayer- Platine angeordnet und über elektrische Durchkontaktierungen zueinander in Reihe oder parallel geschaltet werden, 10. A method for producing a solenoid coil on a multilayer board, in which flat coils (1 -5) are arranged vertically one above the other in different planes of the multilayer board and connected in series or in parallel via electrical feedthroughs,
dadurch gekennzeichnet, dass jeweils zwei vertikal benachbarte Flachspulen (1 ,2) derart lateral zueinander versetzt angeordnet werden, dass in einem Querschnitt (8) lotrecht zur Oberfläche der Mulilayer-Platine Leiterbahnabschnitte (26) der einen Flachspule (2) vertikal in teilweiser Überdeckung mit zwei Leiterbahnabschnitten (7) der anderen Flachspule (1 ) angeordnet sind. characterized in that each two vertically adjacent flat coils (1, 2) are arranged laterally offset from each other so that in a cross section (8) perpendicular to the surface of the multilayer board conductor track sections (26) of a flat coil (2) vertically in partial coverage with two conductor track sections (7) of the other flat coil (1) are arranged.
EP16810237.4A 2015-11-13 2016-11-09 Multi-layer printed circuit board having a printed coil and method for the production thereof Pending EP3375261A1 (en)

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DE102015222400.7A DE102015222400A1 (en) 2015-11-13 2015-11-13 Multilayer board and method for its production
PCT/DE2016/200512 WO2017080554A1 (en) 2015-11-13 2016-11-09 Multi-layer printed circuit board having a printed coil and method for the production thereof

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WO2017080554A1 (en) 2017-05-18
DE102015222400A1 (en) 2017-06-08
US20180317313A1 (en) 2018-11-01
CN108353494B (en) 2021-07-09

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