EP3295569A1 - Multi-rate ldpc encoding and decoding with different code lengths using one multi-rate exponent table and one expansion factor - Google Patents
Multi-rate ldpc encoding and decoding with different code lengths using one multi-rate exponent table and one expansion factorInfo
- Publication number
- EP3295569A1 EP3295569A1 EP15722234.0A EP15722234A EP3295569A1 EP 3295569 A1 EP3295569 A1 EP 3295569A1 EP 15722234 A EP15722234 A EP 15722234A EP 3295569 A1 EP3295569 A1 EP 3295569A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- exponent
- matrix
- code
- matrices
- code rate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
- H03M13/6505—Memory efficient implementations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP2015/060877 WO2016184493A1 (en) | 2015-05-18 | 2015-05-18 | Multi-rate ldpc encoding and decoding with different code lengths using one multi-rate exponent table and one expansion factor |
Publications (1)
Publication Number | Publication Date |
---|---|
EP3295569A1 true EP3295569A1 (en) | 2018-03-21 |
Family
ID=53175532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP15722234.0A Ceased EP3295569A1 (en) | 2015-05-18 | 2015-05-18 | Multi-rate ldpc encoding and decoding with different code lengths using one multi-rate exponent table and one expansion factor |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP3295569A1 (zh) |
CN (1) | CN107592958B (zh) |
WO (1) | WO2016184493A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102018211882A1 (de) * | 2018-07-17 | 2020-01-23 | Ziehl-Abegg Se | Verfahren zur Erfassung von Betriebsparameterdaten eines Motorsystems mit Elektromotor und entsprechendes Motorsystem |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7295137B2 (en) * | 2005-03-01 | 2007-11-13 | The Texas A&M University System | Data encoding and decoding using Slepian-Wolf coded nested quantization to achieve Wyner-Ziv coding |
CN101217337B (zh) * | 2007-01-01 | 2013-01-23 | 中兴通讯股份有限公司 | 一种支持递增冗余混合自动重传的低密度奇偶校验码编码装置和方法 |
CN101471672B (zh) * | 2007-12-27 | 2011-04-13 | 华为技术有限公司 | 低密度奇偶校验码的编码方法和编码器 |
CN101471743A (zh) * | 2007-12-28 | 2009-07-01 | 中兴通讯股份有限公司 | 低密度生成矩阵码的编码方法 |
EP2148445B1 (en) * | 2008-07-22 | 2012-06-20 | Nokia Siemens Networks S.p.A. | Generating exponent matrixes for LDPC codes |
EP2194647B1 (en) * | 2008-12-05 | 2012-08-01 | Nokia Siemens Networks Oy | Generating a seed matrix for LDPC codes |
EP2211469A1 (en) * | 2009-01-23 | 2010-07-28 | Nokia Siemens Networks Oy | Method of encoding or decoding for LDPC codes |
ATE523967T1 (de) * | 2009-01-26 | 2011-09-15 | Nokia Siemens Networks Oy | Erzeugung einer exponententabelle für die codierung und decodierung von ldpc-codes unterschiedlicher länge |
EP2226945A1 (en) * | 2009-03-03 | 2010-09-08 | Nokia Siemens Networks Oy | Generation of optimized exponent matrices for multi-rate LDPC codes |
EP2285004A1 (en) * | 2009-07-13 | 2011-02-16 | Nokia Siemens Networks Oy | Method for pseudo-puncturing exponent matrixes of LDPC codes to comply with different code-rates |
CN101800618B (zh) * | 2009-09-24 | 2012-07-25 | 北京理工大学 | 一种基于编码协作通信的ldpc码构造方法 |
WO2011087275A2 (ko) * | 2010-01-12 | 2011-07-21 | 엘지전자 주식회사 | 다중 안테나 지원 무선 통신 시스템에서 코드북 구성 및 하향링크 신호 전송 방법 및 장치 |
CN103944586A (zh) * | 2014-04-10 | 2014-07-23 | 重庆邮电大学 | 一种码率兼容qc-ldpc码的构造方法 |
-
2015
- 2015-05-18 EP EP15722234.0A patent/EP3295569A1/en not_active Ceased
- 2015-05-18 CN CN201580079892.1A patent/CN107592958B/zh active Active
- 2015-05-18 WO PCT/EP2015/060877 patent/WO2016184493A1/en active Application Filing
Non-Patent Citations (2)
Title |
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None * |
See also references of WO2016184493A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2016184493A1 (en) | 2016-11-24 |
CN107592958A (zh) | 2018-01-16 |
CN107592958B (zh) | 2020-06-16 |
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