EP3254364A1 - Einschaltstrombegrenzung - Google Patents

Einschaltstrombegrenzung

Info

Publication number
EP3254364A1
EP3254364A1 EP16700307.8A EP16700307A EP3254364A1 EP 3254364 A1 EP3254364 A1 EP 3254364A1 EP 16700307 A EP16700307 A EP 16700307A EP 3254364 A1 EP3254364 A1 EP 3254364A1
Authority
EP
European Patent Office
Prior art keywords
charging
transistor
storage capacitor
semiconductor device
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP16700307.8A
Other languages
German (de)
English (en)
French (fr)
Inventor
Günter Haas
Alex Schneider
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ebm Papst Mulfingen GmbH and Co KG
Original Assignee
Ebm Papst Mulfingen GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ebm Papst Mulfingen GmbH and Co KG filed Critical Ebm Papst Mulfingen GmbH and Co KG
Publication of EP3254364A1 publication Critical patent/EP3254364A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/36Means for starting or stopping converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/001Emergency protective circuit arrangements for limiting excess current or voltage without disconnection limiting speed of change of electric quantities, e.g. soft switching on or off
    • H02H9/002Emergency protective circuit arrangements for limiting excess current or voltage without disconnection limiting speed of change of electric quantities, e.g. soft switching on or off limiting inrush current on switching on of inductive loads subjected to remanence, e.g. transformers
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • H02M1/322Means for rapidly discharging a capacitor of the converter for protecting electrical components or for preventing electrical shock

Definitions

  • the invention relates to a method and a circuit arrangement for inrush current limiting in a DC link or acips originallynikum-.
  • An intermediate circuit is generally known as an electrical circuit device that electrically couples a plurality of electrical networks via converters as an energy store.
  • the DC intermediate circuit is known, which is operated with a DC link capacitor at constant voltage and variable current.
  • the intermediate circuit of such voltage source inverter usually contains a comparatively large capacity, which serves as a low-impedance source for connected converters.
  • a capacitive behavior, ie, a high current immediately after switching on, which subsides thereafter, is disadvantageous.
  • the high charging current that flows into the storage capacitor when the relevant converter is plugged in or switched on can, if no restrictive measures are taken, lead to the destruction of components.
  • NTC temperature-dependent resistor
  • Einschaltstrombegrenzer usually such a thermistor, which is connected in series with the consumer, but need not necessarily be bridged. It limits the current after switching on because of its high resistance when cold. Then it warms up by the current flow, reduces its resistance and then causes only small losses to maintain its own temperature. Conversely, with NTC, the resistance decreases as the temperature increases, but conversely, with a hot (warm) NTC, the resistance of the limiting resistor drops very far and the inrush current increases very much.
  • Object of the present invention is to overcome the aforementioned disadvantages and to provide a circuit arrangement for inrush current limiting in a DC link, which is possible cost feasible, can be operated reliably and operates as low loss.
  • the basic idea of the present invention is inter alia to provide a specific charging circuit in order to charge the storage capacitor sequentially and to charge the storage capacitor, preferably stepwise, by respectively successive amounts of charge, wherein the charging circuit performs the switching through and blocking of the charging circuit to the storage capacitor via semiconductor components.
  • a charge of the storage capacitor takes place below an envelope of an exponential function, which asymptotically approaches the charge capacitance of the capacitor.
  • a circuit arrangement for Einschaltstrombegrenzung for voltage intermediate circuits which are designed to limit the current flowing in the storage capacitor charging current between a supply voltage source and the storage capacitor, the at least one semiconductor device with a gate, a resistor and a transistor, wherein one or the drain-source path (between the drain terminal and the source terminal) of the semiconductor device is arranged in series with the storage capacitor and wherein the charging of the storage capacitor via a plurality of each time sequential charging current pulses (h, ... In) takes place, which in each case flow during short-term switching of the drain-source path of the semiconductor device to the storage capacitor.
  • the charging current is thus divided into a plurality of charging current components, which load the storage capacitor in chronological succession.
  • the gate of the semiconductor device via the drain-source path of the transistor connected to this gate connected to one or the ground potential or connectable (depending on the circuit state) and depending on whether the drain-source path of the semiconductor device accordingly is blocked or turned on, the gate of the semiconductor device is connected to either the ground potential or a control voltage UST.
  • the drain-source path of the semiconductor device is arranged in series with the resistor. Accordingly, this branch represents the charging current branch for the charging current of the storage capacitor. Only for the short period of time in which the semiconductor device is turned on, a time-limited charging current can flow. Once the gate of the semiconductor device is again connected to the ground potential, the drain-source path goes into the blocking state and the charging current breaks off.
  • a resistor in the charge branch is arranged in series with the drain-source path of the semiconductor device, causing a voltage drop across the resistor, which is used to drive the base of the transistor to turn on the transistor, which in turn causes the gate of the semiconductor device is connected to the ground potential and the semiconductor device goes into its off state.
  • the blocking state occurs, no current flows in the charging branch through the resistor and the voltage drops at the resistor immediately.
  • no control voltage is applied to the base of the transistor and the transistor is in the blocking state.
  • the gate of the semiconductor component resides the control voltage and the semiconductor device is switched through again, etc.
  • the transistor has a base and the resistor is connected to the source terminal of the semiconductor device and between the resistor and the source terminal is a septabgriff, which is connected to the gate of the transistor.
  • the gate of the semiconductor component for applying the control voltage UST required for switching the gate is connected to a control voltage line, preferably to a tap on a voltage divider.
  • the storage capacitor is connected to the drain terminal of the semiconductor device.
  • a MOSFET e.g., a SuperMesh Power MOSFET
  • a transistor is used as the semiconductor device. It is further preferred if the transistor for switching the gate of the MOSFET or semiconductor element is an NPN transistor.
  • a further switchable transistor is also provided, which bridges the charging circuit for charging the charging capacitor when switching.
  • a switchable transistor can also be connected to the gate of the semiconductor component (eg, the gate of the MOSFET) in order to achieve the halfway point. to turn the circuit component in its blocking state. This ensures that no currents can flow via the branch for charging the storage capacitor during operation of a load on the intermediate circuit, which serves for the further protection of the storage capacitor and thus of the entire DC link circuit.
  • a further aspect of the present invention relates to a method for inrush current limiting for voltage intermediate circuits with a circuit arrangement as described above wherein: a. the charging of the storage capacitor in each case via a charging current pulse
  • steps a) and b) are repeated until the storage capacitor is charged and charging current no longer flows (cyclic charging).
  • a (cyclic) charging of the storage capacitor also via a charging current pulse (Ii, ... I n ) for the duration of the switching through the Drain-source path of the circuit controller via the closed circuit breaker, wherein the charging is accomplished for this period of time by a respective charge current pulse (Ii ,, L) corresponding amount of charge flows to the storage capacitor and the charging current of the charging capacitor increases and the charging current increases is opened again via a current threshold of the circuit controller, the circuit breaker, whereby the charging current is interrupted.
  • a specific switching regulator such as a flyback converter (Tiny Switch)
  • the circuit is operated so that the charging current to the storage capacitor is interrupted by the drain-source path of the semiconductor device is blocked, whereby the voltage at the resistor and thus at the gate of the transistor decreases and the transistor changes to the locked state.
  • the gate of the semiconductor device In the locked state of the transistor, however, the gate of the semiconductor device is no longer at ground potential, but at the control potential, so that the drain-source path is turned on again and a charging current again briefly flows through the charging branch to the storage capacitor, etc.
  • the charge described above with charging current pulses can also be effected via a charging circuit at the z.
  • a flyback converter is used.
  • the operating principle of the flyback converter is used to implement the inventive idea described above and in each case a small amount of energy in the magnetic field of a transformer is stored in a charging phase and in a second (the locked) phase, the "unloading" via the secondary side takes place / Discharge cycle is performed at a certain switching frequency, eg 130 kHz.
  • the method is preferably developed further so that a further transistor is activated before connecting a load fed from the voltage intermediate circuit in order to bridge the charging circuit for charging the charging capacitor.
  • a further transistor is activated before connecting a load fed from the voltage intermediate circuit in order to bridge the charging circuit for charging the charging capacitor.
  • a monitoring circuit monitors the voltage levels (potentials) at the gate of the semiconductor device, at the gate of the transistor for bypassing the charging circuit, and the voltage across the resistor. Does it come z. B. after activation of the power path to an unauthorized in this case voltage drop across the resistor, an error signal is generated, which interrupts the circuit and thus prevents the destruction of the charging branch.
  • the aforementioned circuit arrangement is characterized in that the semiconductor device is a MOSFET or a transistor, in particular an NPN transistor and / or in that a switchable transistor is provided which bridges the charging circuit for charging the charging capacitor when switching. It is advantageous if, in addition, a switchable transistor is connected to the gate of the semiconductor component in order to switch the semiconductor component into its blocking state.
  • FIG. 2 an illustration which shows the charging process of the
  • Storage capacitor with a circuit according to the invention is exemplary
  • FIG. 3 a flyback converter used by way of example for the charging circuit
  • FIG. 4 shows an illustration of an alternative embodiment of a charging circuit
  • FIG. 5 is a diagram illustrating the charging process of a charging capacitor connected to the charging circuit
  • FIG. 6 shows an illustration of an alternative further embodiment of a charging circuit
  • Fig. 7 is an illustration of an alternative further embodiment of a charging circuit
  • the circuit arrangement 1 shows a block diagram of an exemplary embodiment of a circuit arrangement 1 according to the invention.
  • the circuit arrangement 1 comprises a charging circuit 4 (charging operation), a power unit 20 (stationary operation after charging the capacitor), a monitoring part 30 (voltage monitoring) and a locking part 40.
  • the circuit arrangement 1 is designed for inrush current limiting for voltage intermediate circuits, which are formed at least with a storage capacitor 2.
  • the charging circuit 4 mentioned above is provided between a supply voltage source 3 and the storage capacitor 2.
  • the charging circuit 4 has at least one semiconductor component 5 (in this case a MOSFET) with a gate 6, a resistor 7 and a transistor 8.
  • the semiconductor device 5 has a drain terminal D, a source terminal S and a gate 6.
  • the drain-source path between the drain terminal D and the source terminal S of the semiconductor component 5, as shown in FIG. 1, are arranged in series with the storage capacitor 2.
  • the storage capacitor 2 is connected to the drain terminal D of the semiconductor component 5.
  • the resistor 7 is connected in series with the charging capacitor 2 and the semiconductor component 5. Accordingly, if a charging current flows through the charging current branch, then a voltage drops across the resistor 7, which voltage u. a. is monitored with the monitoring part 30. If an undesired current flows over the charging current branch after the charge of the storage capacitor 2 has been fully charged, a voltage which can be detected by the monitoring part 30 drops at the resistor 7 so that an error signal can be triggered in order to switch off the circuit.
  • a transistor 8 (here an NPN transistor) for blocking and switching of the semiconductor device 2 is provided.
  • the gate 6 of the semiconductor device 5 is connected via the base-emitter path of the transistor 8 to the ground potential. If the base-emitter path of the transistor 8 is blocked or switched on, then the gate 6 of the semiconductor component 5 is connected to either the ground potential or a control voltage UST and thus in the locked state or in its forward position.
  • the transistor 8 has the base 10 and the resistor 7 is connected to the source terminal S of the semiconductor device 5. Between the resistor 7 and the source terminal S is a voltage tap 9, which is connected to the base 10 of the Transistor 8 is connected. That is, the transistor 8 switches, depending on whether a charging current (charging current pulse) flows in the charging current branch, as a result of which a voltage drop across the resistor 7 occurs.
  • a charging current charging current pulse
  • a voltage divider 12 is provided in order to provide the control voltage UST required for switching the semiconductor component 5.
  • the gate 6 of the semiconductor component 5 is connected to the gate 6 via a control voltage line 11, preferably to a tap 13 on the voltage divider 12.
  • the charging circuit 4 further comprises the transistor 16, which pulls the potential at the gate 6 of the semiconductor device 5 in its forward position to ground potential and thus blocks the charge branch. If the transistor 8 and the transistor 6 are in their locked state, the control voltage is present at the gate 6
  • the power unit 20 further includes the transistor 15, which serves to protect the circuit in steady state operation.
  • the transistor 15 (or alternatively a MOSFET) bridges the charging circuit 4 as intended.
  • the monitoring part 30 is used for voltage monitoring.
  • the voltage levels (potentials) at the gate 6 of the semiconductor device 5, at the base 10 of the transistor 18 for bridging the charging circuit and the voltage across the resistor 7 are monitored.
  • an error signal can be output from the monitoring part 30.
  • FIG. 3 shows a switching regulator 50 which is exemplary for the charging circuit.
  • the power switch is clocked at a fixed frequency, the turn-on time being limited by the current increase.
  • a compact design can be realized by the circuit breaker with driver, the current limit and the generation of the clock signal are housed in a housing.
  • the module can generate its required voltages by internal voltage regulation itself, so that no external control voltage is needed.
  • FIG. 4 shows an illustration of an alternative embodiment of a charging circuit 4.
  • the shown switching regulator 50 (Tiny Switch) is self-powered via its "DRAIN" PIN D. As soon as the switching regulator 50 has built up its operating voltage, the charging process starts and the following process takes place: At the beginning of a charging cycle, the circuit breaker is closed and the Charging current of the charging capacitor 2 increases.
  • the steepness of the current increase is predetermined by a resistor 7 arranged in series with the switching regulator 50. If the current threshold of the switching regulator 50 is reached, the power switch is disabled. Between detection of the current clamp and the blockage of the circuit breaker is a certain delay time in which the current continues to increase. Furthermore, the components d. H. the resistors R60, R61, R62, R63, the diode D60, the capacitor C60 provided for the purpose of grid relief when switching off the circuit breaker.
  • FIG. 5 shows a corresponding illustration, which represents the charging process of a charging capacitor 7 connected to the charging circuit 4 from FIG.
  • the current increases up to the value of the current limit of the switching regulator.
  • the circuit breaker trip already starts at 75% of the specified current. This switching cycle is repeated at the clock frequency of the switching regulator 50 (here: Tiny Switch) and is in the present embodiment at a fixed 130kHz.
  • the internal shutdown of the switching regulator 50 must be bypassed by the circuit 60 shown in FIG. A transistor 61 sets the Enable PIN EN of As soon as the output voltage drops below the threshold, the transistor 61 is again disabled and the timing is continued.
  • bypass pin BP of the switching regulator 50 is connected to a capacitor C101. This serves to regulate the maximum flowing charging current.
  • four series-connected resistors R100, R101, R102 and R103 are further provided in a wiring harness arranged in parallel to the charging branch.
  • the ENABLE PIN EN is connected to the transistor 61 via a resistor R104.
  • the circuit 60 shown in FIG. 6 provides via the transistor 61 that the open loop control is operated.
  • the transistor 61 is formed with an adjustable clock frequency, resulting in a period for the turn-on and turn-off.
  • the clock signal is generated with an astable flip-flop.
  • the charging time can be suitably reduced by the changes to the circuit according to the embodiment shown in FIG.
  • a throttle 19 is connected in series with the charging capacitor 2 for limiting the increase in current. Due to the characteristic of the current increase through the throttle 19, the time duration for the current increase increases. This implies, conversely, that the power switch remains closed for a longer period of time before the shutdown takes place upon reaching the current threshold, whereby the charging capacitor 2 is charged faster, resulting in an optimized charging characteristics.
  • FIG. 8 shows an illustration of a circuit arrangement 1 (here: intermediate circuit circuit) for charging the charging capacitor 2 comprising three subcircuits (TS1, TS2 and TS3).
  • the subcircuit TS1 corresponds to the one described above Embodiment of the charging circuit 4. It can be seen that the ENABLE PIN (EN) of the Tiny switch is connected to the transistor 8 via a resistor.
  • the subcircuit TS2 represents a power section 20 which serves as the circuit breaker for bypassing and for driving the charging circuit
  • the subcircuit TS3 is used for enabling as soon as the charging capacitor 2 is charged.
  • the invention is not limited in its execution to the above-mentioned preferred embodiments. Rather, a number of variants is conceivable, which makes use of the illustrated solution even with fundamentally different types of use.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Dc-Dc Converters (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
EP16700307.8A 2015-02-02 2016-01-11 Einschaltstrombegrenzung Ceased EP3254364A1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102015101457 2015-02-02
DE102015103713.0A DE102015103713A1 (de) 2015-02-02 2015-03-13 Einschaltstrombegrenzung
PCT/EP2016/050384 WO2016124358A1 (de) 2015-02-02 2016-01-11 Einschaltstrombegrenzung

Publications (1)

Publication Number Publication Date
EP3254364A1 true EP3254364A1 (de) 2017-12-13

Family

ID=56409860

Family Applications (1)

Application Number Title Priority Date Filing Date
EP16700307.8A Ceased EP3254364A1 (de) 2015-02-02 2016-01-11 Einschaltstrombegrenzung

Country Status (5)

Country Link
US (1) US10468970B2 (zh)
EP (1) EP3254364A1 (zh)
CN (1) CN107735931B (zh)
DE (1) DE102015103713A1 (zh)
WO (1) WO2016124358A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102018118068A1 (de) * 2018-07-26 2020-01-30 Ebm-Papst Mulfingen Gmbh & Co. Kg Schaltungsanordnung zur Zwischenkreissymmetrierung

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4233616A1 (de) 1992-10-06 1994-09-01 Metrawatt Gmbh Gossen Vorrichtung zur Einschaltstrombegrenzung an Schaltnetzteilen
US6714429B2 (en) * 2001-08-15 2004-03-30 Astec International Limited Active inrush current control for AC to DC converters
JP2005093497A (ja) * 2003-09-12 2005-04-07 Toshiba Corp 保護回路を有する半導体装置
DE102005003258B3 (de) * 2005-01-24 2006-05-18 Infineon Technologies Ag Schaltungsanordnung zum Begrenzen eines Klingelstroms
US7432661B2 (en) * 2005-05-02 2008-10-07 Lutron Electronics Co., Inc. Electronic ballast having a flyback cat-ear power supply
WO2007038649A2 (en) * 2005-09-26 2007-04-05 Hitek Power Corporation Power supply with current limiting circuits
CN100487492C (zh) * 2006-07-12 2009-05-13 中国石油天然气集团公司 声波测井相控阵激励的幅度加权电路
WO2008131795A1 (de) * 2007-04-25 2008-11-06 Osram Gesellschaft mit beschränkter Haftung Beleuchtungsgerät mit einschaltstrombegrenzungsschaltung
JP5550716B2 (ja) * 2010-02-26 2014-07-16 シチズンホールディングス株式会社 Led駆動回路
CN102355124B (zh) * 2011-09-14 2014-01-08 华为技术有限公司 一种避免光伏逆变器频繁启停的装置及光伏逆变器
US8816625B2 (en) * 2011-10-27 2014-08-26 Rockwell Automation Technologies, Inc. Integrated regenerative AC drive with solid state precharging
EP2639949B1 (de) * 2012-03-13 2020-04-29 Siemens Aktiengesellschaft Stromversorgung mit Zwischenkreis
CN103368212A (zh) * 2012-03-29 2013-10-23 海洋王照明科技股份有限公司 一种限压充电电路
EP2701294B1 (en) * 2012-08-24 2017-11-08 Dialog Semiconductor GmbH Low current start up including power switch
DE102012219488A1 (de) * 2012-10-25 2014-04-30 Robert Bosch Gmbh Schaltungsanordnung und Verfahren zum Vorladen eines kapazitiven Bauelements
JP6193029B2 (ja) * 2013-07-12 2017-09-06 株式会社東芝 スイッチング素子駆動電源回路
US20150022087A1 (en) * 2013-07-16 2015-01-22 GE Lighting Solutions, LLC Method and apparatus for providing supplemental power in a led driver
US9513681B2 (en) * 2014-11-04 2016-12-06 Dell Products, L.P. Systems and methods for controlling inrush electrical currents using a virtual miller capacitor and a metal-oxide-semiconductor field-effect transistor (MOSFET)

Also Published As

Publication number Publication date
US20180026522A1 (en) 2018-01-25
CN107735931A (zh) 2018-02-23
WO2016124358A1 (de) 2016-08-11
CN107735931B (zh) 2020-06-12
DE102015103713A1 (de) 2016-08-04
US10468970B2 (en) 2019-11-05

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