EP3117282B1 - Parallel and redundant voltage regulator system - Google Patents

Parallel and redundant voltage regulator system Download PDF

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Publication number
EP3117282B1
EP3117282B1 EP15739361.2A EP15739361A EP3117282B1 EP 3117282 B1 EP3117282 B1 EP 3117282B1 EP 15739361 A EP15739361 A EP 15739361A EP 3117282 B1 EP3117282 B1 EP 3117282B1
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cavs
information
thyristor
pmu
test
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EP15739361.2A
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German (de)
English (en)
French (fr)
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EP3117282A1 (en
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Süleyman TOPÇU
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/14—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using tap transformers or tap changing inductors as final control devices

Definitions

  • the invention relates to voltage regulators and stabilizers which are used in places where line voltages are low and/or high; in all the applications where industrial or commercial electrical device and machines are required to be fed with regular and stable voltage; in all the electrical devices operating with single-phase and/or three-phase AC power; especially in high-capacity factories; in the plants where lack of electricity or voltage instability negatively affect the operation of the machines and devices or cause problems and loss of performance in the workflow; in the regulation and stabilization of AC voltage.
  • Voltage regulators used in the regulation of AC voltage are produced in different technologies such as mechanical, electromechanical, electronic and resonance.
  • Voltage regulators produced with the current technology are produced up to 3000kva-4000kva as three-phase.
  • As supplying current carrying elements such as on-off switch, protection fuse, thyristor, transistor, IGBT, and variac, which are required to produce a higher power voltage regulator, is not possible or very expensive, a regulator with a power higher than 4000kva cannot be produced.
  • machines are required to be separated in 4000kva groups.
  • WO9320497A1 Another application numbered WO9320497A1 states following words in abstract: "The invention is a system and method for changing the tap position of transformers, where two or more of the transformers (20, 22, 24) are operating in parallel, based on the measured low side bus voltage (156, 158, 160) and low side MVAR flow.
  • a programmable logic controller (PLC) (11) calculates the average low side bus voltage for the transformers operating in parallel.
  • the PLC also calculates a feedback voltage for each transformer as a function of circulating MVAR flow for each transformer operating in parallel based on concept of preventing the tap position of a transformer from exceeding a certain relative difference compared to other transformers."
  • the present invention aims to eliminate the above mentioned drawbacks.
  • the main object of the invention is to obtain a voltage regulator which is connected in parallel, has a redundancy feature and operate synchronously, for the plants with a power higher than 4000kva.
  • the second main object of the invention is to obtain regulators operating simultaneously, in parallel and synchronously and in case of a breakdown in any regulator, to provide the other regulators to operate without interruption while the broken regulator is repaired.
  • Another object of the invention is to offer a solution of voltage regulator, the power of which can be increased and decreased by being connected in parallel for the big plants. Thereby, new companies are prevented from making a non-productive investment and expiration of the products bought without being used is prevented.
  • the invention relates to a parallel and redundant voltage regulator (13) system which is used in the regulation and stabilization of AC voltage.
  • the system according to the invention consists of;
  • Inputs and outputs of at least 2 regulators (13) are short circuited.
  • PMU (3) sends the stable and same thyristor (9) address to all the regulators (13) and after assuring that this address is applied it tests the regulators (13) and provides the parallel connections thereof respectively. After all the regulators (13) are connected in parallel, the process of increasing and decreasing the output voltage starts for maintaining the output voltage in desired limits. The process of increasing and decreasing the voltage is performed in all the regulators (13) simultaneously.
  • Each regulator (13) has a structure as in Figures 2 and 3 . It consists of the following parts:
  • Thyristor (9) is a semi-conductor power switch which provides the current to pass between ANODE-CATHODE terminals when voltage is applied to the control terminal (gate); waits for the current, which is drawn for switching off the anode-cathode switch after the control voltage is cut, to be zero; remains in transmission as long as the anode-cathode current is not zero; and is generally used in AC voltage applications.
  • regulators (13) connected in parallel, semi-conductor AC current switches obtained by connecting the two thyristors (9) reversely in parallel to each other are used. These switches are turned on and off by indicating the address by CAVS-MB (1).
  • Thyristors (9) are arranged in the form of 2 groups.
  • the stage When the stage is to be changed in order to apply a different voltage to the booster transformer (7), first the gate voltage of the thyristors (9) operating at that time is cut. In this case, thyristor (9) is not turned off immediately but remains in transmission until cathode-anode current becomes zero. Before operating a new thyristor (9), it is required to be assured that the thyristor (9), gate voltage of which is cut, is turned off.
  • a specially designed electronic circuit is provided on the CAVS-MB (1) card which measures the zero state of anode-cathode current of each thyristor (9). There are 10 pieces of this electronic circuit in this design composed of 10 thyristors (9). This electronic circuit is referred to as TOC measurement circuit.
  • This circuit measures on and off state of each thyristor (9), and sends the turn-off information of the thyristors (9), to which the turn-off command is sent, and the turn-on/operation information of the thyristors (9), to which operation command is sent, to the TSD unit and CAVS-MB (1) microprocessor.
  • TOC information is collected from all of the 5 TOC measurement circuits disposed in the 1st group and sent to the microprocessor which is disposed on the CAVS-MB (1) card and is the management unit of the card.
  • the microprocessor sets the permission of operation of a new thyristor (9) for the 1st group.
  • Thyristor Selector Demultiplexer (TSD) circuit is designed on said CAVS-MB (1) so as to activate only one thyristor (9) out of each thyristor (9) groups simultaneously, wherein it performs the thyristor (9) selection process according to the address information determined by the microprocessor of CAVS-MB (1).
  • TSD circuits are used for 2 groups of thyristors (9).
  • Microprocessor writes the address of thyristor (9) that it desires to select from the 1st group in the 1st TSD and the address of thyristor (9) that it desires to select from the 2nd group in the 2nd TSD.
  • the new thyristor (9) addresses are written in TSDs and the TSD output is activated, gate driver circuit of the selected thyristor (9) is operated and the thyristor (9) is activated.
  • the information that the thyristor (9) is operated and the current is drawn between anode-cathode is measured by TOC circuit and sent to the microprocessor. After receiving the information that the thyristors (9) in both groups operate properly, the microprocessor completes the thyristor (9) selection process.
  • This system where the next step is passed upon receiving the information that the operating thyristor (9) is turned off and upon measuring the operation of the new thyristor (9) after the address of the new thyristor (9) is written, is referred to as closed loop addressing.
  • CAVS-MB (1) definitely has the information that which thyristors (9) are active in the regulator (13). Thus, it is possible to activate the thyristor (9) having the same voltage value in multiple regulators (13) simultaneously. In case of a breakdown or failure of any thyristors (9) in fulfilling the command issued, CAVS-MB (1) has full and precise information about the situation. To control whether these thyristors (9) are turned off, suitable thyristors (9) are operated by using the respective address in accordance with the voltage stage desired to be selected.
  • 0V, 55V, 110V, 165V, 220V voltage stages to connect the 1st group of thyristors (9) and 88V, 99V, 110V, 121V, 132V stages to connect the 2nd group of thyristors (9) are provided on the transformer with stage (8).
  • the regulator (13) is started up, 3rd thyristor (9) from the 1st group and 8th thyristor (9) from the 2nd group are operated (thyristor address 38).
  • 0V is applied to the secondary winding of the booster transformer (7).
  • 0V is generated in primary windings of the booster transformer (7), and the output voltage is equal to the input voltage. If the output voltage is below the set value, thyristor (9) is increased by 1 and made 39. As the voltages of the 3rd and 9th thyristors (9) are 110V and 121V, respectively, 11V is applied to the secondary winding of the booster transformer (7). Conversion ratio of booster transformer (7) is 1/3, 3,5V is generated in the primary winding thereof. Output voltage and input voltage are +3,5V, thyristor (9) address is increased until the output voltage is elevated to the set value.
  • thyristor (9) address is decreased by 1. In every reduction of thyristor (9) address, output voltage decreases by 3,5V. All the address changes are performed according to the instructions received from PMU (3) by CATC protocol.
  • Parallel communication connections between PMU and CAVS-MB (1) are made with the connecting connectors and parallel and synchronous communication electronic circuits specially designed for this purpose and disposed on PCU (2).
  • Connectors which provide the connections between the devices and cards; multiplexer, demultiplexer, latch and line drivers where mutually received and sent information are taken and stored, are provided on PCU (2). Thereby, parallel communication is provided bi-directionally and simultaneously for three phases.
  • PMU (3) comprises electronic circuits which will perform simultaneous bidirectional communication with all the regulators (13) connected in parallel.
  • Parallel and communication unit and connecting connector are added to the PMU (3) unit in a number equal to the number of the regulators (13) to be connected in parallel.
  • Parallel communication units in PMU (3) and PCU (2) are the same.
  • 10 different voltage values are available on the transformer with stage (8).
  • 10 thyristors (9) are arranged in a way to form 25 different voltage values by being arranged in the form of 2 groups out of the thyristors provided by fives.
  • more number of voltage variations can be provided with more number of thyristors (9).
  • 64 different voltage stages can be formed by using 16 thyristors (9).
  • CAVS-MB (1) tests whether all the thyristors (9) are turned off and closes the 1st and 2nd TSD outputs. In this case, gate pulse is not generated for any thyristor (9).
  • Microprocessor writes the addresses of the thyristors (9) to be started up in the TSD inputs. TSDs select the thyristor (9) to be operated, but as the TSD exit permissions are closed, thyristor (9) gate drivers are not operated.
  • TOC information is waited to be received for the activation of the thyristors (9).
  • TOC information is sent by CAVS-MB (1) circuit. A cable from Anode-Cathode and Gate terminals of each thyristor (9) is received by CAVS-MB (1).
  • TOC measurement circuit disposed on the CAVS-MB (1) follows the voltage between the Anode-Cathode of the thyristor (9). When the voltage between the anode-cathode of the thyristor (9) is higher than 10V, it decides that the thyristor (9) is not in transmission and gives the TOC information. 10 TOC test circuits are provided on CAVS-MB (1) in a way to be provided 1 for each thyristor (9). When all the TOC test circuits yield positive results, CAVS-MB (1) turns on the TSD outputs and provides the activation of pre-selected thyristors (9).
  • CATC is the electronic circuits which provide the thyristors (9) that cannot be turned on and off fully and simultaneously with the gate signal to be turned on and off with reliable and precise information in order to form different voltage variations and the algorithm where these circuits are managed.
  • CATC first waits for the TOC information to come from the thyristor (9) measurement circuits. When all the thyristors (9) are turned off, TOC information is supplied. When the TOC information is received, TSD outputs are turned on and the gate circuit of the thyristor (9) selected is operated. Finally, TSC information is waited to be received from the thyristor (9) measurement circuits. This information indicates that the selected thyristor (9) is active.
  • the thyristor (9) conversion process is cancelled, all the thyristors (9) are turned off and error message is given.
  • thyristor transmission process is completed.
  • a new thyristor (9) address calculation permission is set for PMU (3).
  • CAVS-MB (1) cards disposed in the regulator (13) bring the thyristor (9) groups in their management to the initial conditions with the same algorithm.
  • CAVS-MB (1) informs the PCU (2) about the provision of initial conditions and waits for the new thyristor (9) address.
  • PCU (2) takes the immediate information from the CAVS-MB (1) cards, informs PMU (3) about this and waits for the new address.
  • the second important component of the invention is that parallel communication uses CPC protocol with the specially designed electronic circuits and algorithms.
  • CPC protocol provides a secure and fast parallel communication which protects the thyristor (9) address information calculated by PMU (3) and sent to the regulators (13) connected in parallel against electrical noise and connection errors and provides equality and precision in the received and sent information between the 4 voltage regulators (13) and PRMU (12).
  • Electronic circuits are designed in the invention in a way to provide 4 regulators (13) to be connected in parallel. To provide more number of regulators (13) to be connected in parallel, the number of these electronic circuits is required to be increased.
  • a total of 6 received data storage and retrieval circuits (DRL) and 6 sent data storage and transfer circuits, 3 (1 for each phase) for communicating with CAVS-MBs (1) and 3 for communicating with PMU (3), are provided on PCU (2). Thanks to the PCU (2) writing the information to be sent to CAVS-MBs (1) and PMU (3) in DSL and setting the DSO (data sent ok) signal, DRL which is disposed in each CAVS-MB (1) and PMU (3) is allowed to simultaneously receive the information sent.
  • DSL data transfer and storage circuits
  • DRL data retrieval and storage circuits
  • DSL data transfer and storage circuit
  • DRL data retrieval and storage circuit
  • the information to be sent are written in the sent data latches, respectively. During this process, a separate information can also be written in each latch if required. These information are the thyristor (9) addresses or process instructions.
  • the writing process is completed, all the latches are opened simultaneously and 'Data Sent Ok' (DSO) signal is sent.
  • DSO 'Data Sent Ok'
  • CAVS-MBs (1) and PMU (3) are allowed to simultaneously receive the information.
  • 'Data Received Ok' (DRO) signal is sent.
  • CAVS-MB (1) and PMU (3) write the information they will send in the sent data latch comprised therein and send the DSO signal.
  • PCU (2) receives the DSO signal, it reads the information in the received data latches and records the same in its memory. When the reading process is completed, it sends the DRO signal.
  • Receiving the same address information several times and comparing the sent and received addresses during the communication processes is a special algorithm which is developed for preventing activation of a different thyristor (9) than the other in any regulator (13) due to the connection errors or communication errors.
  • CBI (6) is used at the output of each regulator (13) in order to prevent said loop currents.
  • CBI (6) consists of inductors coupled in series to the output of each phase of the regulator (13). As the current drawn from the output of the regulator (13) increases, voltage drop on inductor also increases. Thereby, if there is 1-2V difference between the output voltages of the two regulators (13) connected in parallel, this voltage is kept by CBI (6) and drawing loop current between the regulators (13) is prevented.
  • Stage voltages of the transformers with stage (8) in all the regulators (13) connected in parallel are equal to each other.
  • voltages of the booster transformer (7) are also equal to each other. Therefore, when the thyristors (9) having the same address are activated in all the regulators (13), output voltages of all the regulators (13) become equal.
  • secure and fast voltage regulator (13) system which comprises many voltage regulators (13); operates at high power and on a parallel and redundant basis, wherein the broken regulators (13) are disabled without affecting the other regulators (13) and are reactivated after being repaired without turning off the other regulators (13).

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Rectifiers (AREA)
  • Control Of Eletrric Generators (AREA)
  • Control Of Electrical Variables (AREA)
EP15739361.2A 2015-06-03 2015-06-03 Parallel and redundant voltage regulator system Active EP3117282B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/TR2015/000247 WO2016195606A1 (en) 2015-06-03 2015-06-03 Parallel and redundant voltage regulator system

Publications (2)

Publication Number Publication Date
EP3117282A1 EP3117282A1 (en) 2017-01-18
EP3117282B1 true EP3117282B1 (en) 2019-02-20

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EP (1) EP3117282B1 (tr)
TR (1) TR201907530T4 (tr)
WO (1) WO2016195606A1 (tr)

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Publication number Priority date Publication date Assignee Title
CN109063288A (zh) * 2018-07-19 2018-12-21 中山大学 一种城市区域交通噪声分布并行计算方法

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Publication number Priority date Publication date Assignee Title
AU3944293A (en) * 1992-04-01 1993-11-08 Pennsylvania Power & Light Company Control system and method for the parallel operation of voltage regulators
US20110182094A1 (en) * 2007-08-13 2011-07-28 The Powerwise Group, Inc. System and method to manage power usage
US7872886B2 (en) 2008-02-20 2011-01-18 Virginia Tech Intellectual Properties, Inc. Quasi-parallel voltage regulator
ITTO20090367A1 (it) * 2009-05-08 2010-11-09 Torino Politecnico Procedimento e sistema di conversione statica per la regolazione della potenza in una rete elettrica in corrente alternata
CN102830744A (zh) 2012-09-17 2012-12-19 江苏国石半导体有限公司 一种频率补偿的线性稳压器

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Publication number Publication date
EP3117282A1 (en) 2017-01-18
TR201907530T4 (tr) 2019-06-21
WO2016195606A1 (en) 2016-12-08

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