EP3005684A1 - Capteur cmos à photosites standard - Google Patents
Capteur cmos à photosites standardInfo
- Publication number
- EP3005684A1 EP3005684A1 EP14733237.3A EP14733237A EP3005684A1 EP 3005684 A1 EP3005684 A1 EP 3005684A1 EP 14733237 A EP14733237 A EP 14733237A EP 3005684 A1 EP3005684 A1 EP 3005684A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- photosites
- columns
- matrix
- photosite
- analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/767—Horizontal readout lines, multiplexers or registers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/71—Circuitry for evaluating the brightness variation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/57—Control of the dynamic range
- H04N25/58—Control of the dynamic range involving two or more exposures
- H04N25/581—Control of the dynamic range involving two or more exposures acquired simultaneously
- H04N25/583—Control of the dynamic range involving two or more exposures acquired simultaneously with different integration times
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
Definitions
- the present invention relates to an image sensor device.
- Image sensor means any device making it possible to capture views of real objects.
- it may be a camera, a video camera, a mobile phone with a camera, etc.
- a photosite array (also referred to hereinafter as "pixels") is used whose exposure to light generates a current (or voltage) which is then converted to a numerical value, using an analog-to-digital converter.
- the photosites may for example include photodiodes, transistors, diodes, capacitors, resistors, etc.
- the path traveled by the information included in the image is deemed to be in the direction of the entry of the light beam into the device to the analog or digital processing and then storing the digital data of the image.
- the reception of the light data by the device is made upstream of the electronic processing of these data.
- the cameras and cameras adapt their sensitivity to pre-defined conditions (under the name called "ISO-digital" relative to such devices) .
- pre-defined conditions under the name called "ISO-digital" relative to such devices.
- a scene often contains areas of very different brightness.
- the brightly lit areas may be saturated in the whites, and / or the dimly lit areas may be confused with black.
- a hue rendering operation is then preferable for encoding this high dynamic image for 8-bit display formats.
- This technique then requires calculation means, as well as memory, and poses problems during movements in the scene between acquisitions.
- this blind photosite or means of regulation decreases the filling factor of the photosite (ratio between the surface of the photosensitive photosite and the total surface of the photosite). This results in a decrease in the electro-optical performance of this same photosite, and thus alters the overall performance of the sensor.
- the invention improves the situation. It proposes for this purpose a sensor architecture in which the additional components required for local regulation are located at the periphery of the photosite matrix, alternatively.
- the present invention thus aims at an image sensor device, comprising a multiplicity of photosites forming a matrix (KxL) of K lines and L columns, and at least one analogue / digital converter, each photosite being able to receive a luminous flux and to deliver an electrical signal, in analog form, furthermore comprising at least: a first set of integrating circuits, with a first regulation by analog weighting on blocks of n photos, the photosites belonging to n adjacent columns and n 'adjacent lines, and a second set of integrator circuits, with a second analog weighting control on blocks of mxm' photosites, the photosites belonging to m adjacent columns and with m 'adjacent lines, n adjacent columns of a first set of columns of the matrix being connected to nxn' integrating circuits of the first set, m adjacent columns of a second set of columns of the matrix being connected to mxm 'integrator circuits the second set, n columns of the first set being alternated with m columns
- the regulation is carried out at the level of the integrator circuits.
- the architecture of the photosite matrix is thus not modified. It is therefore possible to take directly a photosite matrix produced in large series and usually used for a conventional sensor. The design costs are therefore reduced. Local analog control does not interfere with other common problems of the photosite array (eg resolution, fill factor, etc.). In addition, it is possible to use conventional integrator circuits (for example with respect to the width of these integrating circuits).
- the additional analog components are therefore associated with the integrator circuits of the photosite matrix.
- the number of these integrator circuits is therefore increased.
- These integrator circuits are located downstream of the matrix and upstream of a digital analog conversion.
- the alternative arrangement of the sets of columns attached to the two sets of integrator circuits limits the effects of this increase in the number of integrator circuits.
- the separation of the integrator circuits simplifies the design of the device.
- Such a separation substantially simplifies the architectural design of the periphery of the photosite matrix.
- the two sets of integrator circuits are arranged one on the other.
- one set is below the matrix and the other is adjacent to the matrix.
- the circuits are arranged on either side of the photosite matrix.
- the alternative arrangement of column sets limits the influence of the separation of the integrator circuits on the operation of the device.
- the distances between the matrix and the integrator circuits are advantageously reduced by the alternative arrangement of column sets. It is indeed easy to provide an integrator circuit closer to the column to which it is connected in this configuration.
- the regularity introduced by this arrangement makes it possible to maintain a temporal management similar to that of a usual image sensor. Indeed, the sequential reading remains possible because each set of integrator circuits is connected to each line.
- the first set of integrator circuits is coupled to a first end edge of the matrix, at the foot of the columns, and the second set of integrating circuits is coupled to a second end edge of the matrix, opposite to the first stop, at the top of the columns.
- the integrator circuits are advantageously distributed on either side of the photosite matrix. This distribution thus releases two times more space for the integrator circuits.
- Each set of integrator circuit can therefore correspond in part to the integrator circuits usually used for a conventional sensor, without local analog regulation.
- the column amplifiers included in these integrator circuits may be identical to those usually used. Their arrangement may also be similar to that usually suggested. The sensor design is therefore greatly simplified.
- K and L even integers.
- the column amplifiers used to process the data received from the photosite matrix may be those used usually.
- top of columns is meant the area above the photosite matrix, when this matrix is viewed from above.
- the integrating circuits of the two sets comprise: calculating means capable of delivering an analog signal corresponding to an average of the analog signals delivered by the blocks of n ⁇ n 'photosites and, respectively, by the blocks of m ⁇ m' photosites, and
- the regulation is carried out at the level of the integrator circuits.
- the architecture of the photosite matrix is thus not modified.
- the device comprises at least as many regulating means as photosites read simultaneously and at least as many converters as photosites read simultaneously.
- the analog calculation of an average value corresponding to a local area requires having all the photosite values of this local area simultaneously.
- these local areas correspond to the blocks of photosites.
- the photosite matrices can include several million pixels.
- the control means and the converters must therefore simultaneously manage all the values read by all the photosites read simultaneously.
- the presence of a means of regulation and a converter by photosites read simultaneously allows to divide the number of operations to be performed simultaneously. Indeed, all the operations required by a photosite are processed by a regulating means and a converter.
- the processing speed of the data received from the photosite matrix is therefore advantageously accelerated.
- Such a configuration is for example adapted to a sensor used in a video recording device and particularly for a recording device requiring a high acquisition frequency.
- components capable of processing a large number of data simultaneously are very expensive. It may thus be cheaper to provide a large number of inexpensive components than few very expensive components.
- the device comprises fewer regulating means than photosites read simultaneously and fewer converters than photosites read simultaneously.
- the device comprises a single regulation means for all the photosites and a single converter for all the photosites.
- the signal undergoes very little distortion.
- Such a configuration is for example adapted to the spatial domain, in which a reduced number of photosites or a low read speed may be relevant.
- the control and conversion means are able to process the data with a reasonable frequency while ensuring a high quality of treatment.
- the set of integrator circuits is symmetrical on either side of the matrix.
- the design of the device is advantageously simplified.
- the costs associated with producing this device are limited.
- the design of the part at the bottom of the column of the matrix can simply be reused at the top of the matrix column.
- a single production line may for example produce the parts at the bottom and at the top of the column.
- the first set of integrator circuits and the second set of integrator circuits operate synchronously.
- the time management is advantageously simplified.
- the data received from the photosites and then processed (regulation, conversion, etc.) for the first and second sets are thus directly collected to be interpreted by the digital means of the sensor downstream of the converter or converters. It is therefore not necessary to add components to take into account a possible time lag.
- the temporal operating characteristics of the device are advantageously similar to those of a conventional sensor without local analog regulation.
- the integration of such a device is transparent for the industrialist.
- the integrator circuit assemblies further include at least one fixed spatial noise compensation (FPN).
- FPN fixed spatial noise compensation
- Such a compensation means may advantageously be located upstream of the means for calculating the average. Thus, this compensation is also applied to the average and thus makes possible a more precise regulation.
- the integrator circuits comprise at least one means for sampling and blocking analog signals.
- the control means may for example comprise an analog divider, it is advantageous to supply such control means with constant analog signals.
- the image sensing device object of the present invention can thus be easily integrated with the image acquisition devices (for example digital camera, digital video camera, etc.):
- the photosite remains identical to the original photosite.
- the usual photosite matrices can therefore be used directly with the present device.
- the column amplifiers remain identical to those used usually.
- the implemented processing and the proposed architecture do not affect the reading speed.
- the number of frames per second (“frame rate") remains that of a usual sensor.
- the implemented processing and the proposed architecture do not affect the temporal operation of the imager. This one remains quite classical and the reading of the photogenerated data is done in the usual way.
- FIG. 1A illustrates an overview of a signal processing chain derived from a PXL photosite generating a photocurrent PHC, up to a digital voltage value VN
- FIG. 1B illustrates a matrix of pixels KxL and its periphery, with conventional processing
- FIG. pixel matrix KxL and its periphery with processing in the sense of the invention
- - Figure 3A illustrates the detail of a device in the sense of the invention
- Figure 3B illustrates the detail of a device within the meaning of the invention, in one embodiment, FIG.
- FIG. 4A illustrates a matrix of pixels KxL, with a distribution according to the invention
- FIG. 4B illustrates a matrix of pixels KxL, with a distribution according to the invention
- FIG. 4C illustrates a matrix of pixels KxL, with a distribution according to the invention, according to a mode of embodiment
- FIG. 4D illustrates a matrix of pixels KxL, with a distribution in the sense of the invention, according to one embodiment.
- a conventional sensor comprises a multiplicity of photosites (k, l), with k ranging from 1 to K and 1, from 1 to L.
- Each photosite PXL converts a PH light energy into a photocurrent PHC to finally deliver an analog VA voltage.
- An AC column amplifier has a sample and hold function for collecting all analog voltages from the different photosites and the resulting voltage is applied via a multiplexer function to an ADC to deliver a digital voltage VN.
- the photosite matrix referenced MAT PXL and also called “sensor” hereinafter
- the signal from the matrix is amplified (AMP) and converted into digital voltage VN.
- the MAT sensor PXL is equipped with a means for measuring the response V (in voltage or in intensity) of a set of N pixels. neighbors. This response estimates the local brightness in the scene.
- a parameter XO corresponding to a local luminance is measured so as to adapt the dynamics of a photosite or a group of N neighboring photosites. This luminance can be estimated by the average (simple or advantageously weighted, for example) signals from photosites or "pixels".
- the sensitivity of a photosite is then regulated using an adaptive non-linear function F (X, X0) whose form of non-linearity (its local "slope") depends on the parameter of said average XO, X being the output voltage of this photosite.
- F adaptive non-linear function
- an embodiment of the invention is adapted to a conventional sensor such as a standard CMOS (mass-produced) imager usually consisting of four distinct parts:
- each pixel comprising a photodiode and three to five MOS transistors; these pixel structures make it possible to convert a photocurrent generated in the photodiode into voltage; the most complex structures can also memorize the image within the pixel that has a memory (so-called "Global shutter” technique);
- a module for regulating the sensitivity of photosites comprising, for example, the function F (X, X0);
- K even means all the integers k even belonging to [0; K] and we mean by "k uneven” all the odd integers k belonging to [0; K],
- Calculation means GEN X0 capable of delivering an analog signal corresponding to an average XObioc of the analog signals delivered by the blocks of 2 ⁇ 2 photosites of the first set of columns and, respectively, by the blocks of 2 ⁇ 2 photosites of the second set of columns,
- a regulator means REGUL for weighting an analog signal Xk, i derived from each photosite by a mean signal X0bi oc of a block to which this photosite belongs.
- an odd line and an even line are selected at the same time
- a single regulating means applies the weighting to the signals from the photosites.
- only one converter is used.
- Such a configuration is of particular interest for matrices comprising a relatively small number of photosites (for example 640 ⁇ 480 photosites). Indeed, the components (regulation and / or converter) must simultaneously process a large number of photosites data. Thus, to avoid reducing the processing speed or increasing costs, it is advantageous but not limiting to use such a configuration with sensors having relatively few photosites.
- a digital module DEC2 sequentially selects the lines to be activated. For example, a plurality of switches corresponding to two lines of photosites (here we read simultaneously L x 2 photosites corresponding to a row of blocks or 2 rows of pixels) can be engaged at the same time t.
- the X signal of a photosite of the MAT matrix PXL is first processed in a column amplifier included in a row of AMP column amplifiers and then a mean value X0 is generated by GEN calculation means X0 from four signal sources.
- F (X, X0) ⁇ + ⁇ - In another embodiment, it is an adaptive non-linear function.
- the regulated signals are then converted into digital form by a CAN converter. Finally, these digital signals are read sequentially so that the entire image can be reconstructed.
- the size of the photosites is so small that an AMP amplifier is drawn over the width of two pixels.
- two AMP amplifier lines must be provided at the bottom of the column and at the top of the column.
- as many CAN converters are used as there are photosites read simultaneously on the matrix.
- a compromise between the processing speed (large number of components), the price of the components and the quality of the received signal (reduced number of components) is thus advantageously but non-limitatively chosen.
- FIG. 4A This figure represents the matrix of photosites MAT PXL and illustrates a possible configuration for the blocks of photosites.
- the blocks thus comprise four adjacent photosites forming a square.
- a block line has K x 2 photosites.
- a photosite signal is weighted by the average of the photosite signals of the block of this photosite.
- the sensitivity of a photosite is here modulated by the signals received by three of its neighbors.
- the blocks of the first and second set of columns are here different. However, the number of photosites read simultaneously remains the same. Thus, the management of the temporal aspects of the design of the device is facilitated.
- the difference between the blocks of the first and second set of columns introduces an irregularity in the processing applied to the signals received from the photosites. Such an irregularity is likely to improve this treatment by limiting the appearance of artifacts. Indeed, the periodic nature of some sensors can have the consequence of generating noise during the digital reconstruction of the image. Thus, the introduction of these irregularities makes it possible to improve the quality of the reconstructed images.
- the blocks of the first and second set of columns are here different.
- the temporal management of such an architecture requires a specific design. For example, it is possible to process two blocks of the second set of columns (blocks m ⁇ m ') for a single block of the first set (blocks n ⁇ n'). Such an architecture therefore introduces significant irregularities and therefore limits the appearance of artifacts.
- the blocks thus comprise sixteen adjacent photosites forming a square. When receiving data, the photosites of an entire block line are read simultaneously.
- a block line has K x 4 photosites.
- the average is calculated from a larger number of photosites. This average value is therefore more representative than for blocks of 4 photosites.
- the erroneous photosite values are better smoothed by an average of 16 values than of 4 values.
- a simple average has been described in the calculation of the function F, previously. Nevertheless, a variant may consist of calculating a weighted average according to chosen rules. More generally, convolution functions that are more complex than a simple average can be provided.
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1355139A FR3006500B1 (fr) | 2013-06-04 | 2013-06-04 | Capteur cmos a photosites standard |
PCT/FR2014/051307 WO2014195622A1 (fr) | 2013-06-04 | 2014-06-03 | Capteur CMOS à photosites standard |
Publications (1)
Publication Number | Publication Date |
---|---|
EP3005684A1 true EP3005684A1 (fr) | 2016-04-13 |
Family
ID=48795822
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP14733237.3A Ceased EP3005684A1 (fr) | 2013-06-04 | 2014-06-03 | Capteur cmos à photosites standard |
Country Status (5)
Country | Link |
---|---|
US (1) | US9838630B2 (fr) |
EP (1) | EP3005684A1 (fr) |
JP (1) | JP2016523474A (fr) |
FR (1) | FR3006500B1 (fr) |
WO (1) | WO2014195622A1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017212564A (ja) * | 2016-05-25 | 2017-11-30 | ソニー株式会社 | 撮像装置、および制御方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2745457B1 (fr) * | 1996-02-23 | 1998-04-24 | Suisse Electronique Microtech | Reseau de cellules photosensibles et capteur d'images comportant un tel reseau |
US6787749B1 (en) * | 1996-11-12 | 2004-09-07 | California Institute Of Technology | Integrated sensor with frame memory and programmable resolution for light adaptive imaging |
JP3548410B2 (ja) * | 1997-12-25 | 2004-07-28 | キヤノン株式会社 | 固体撮像装置および固体撮像装置の信号読み出し方法 |
JP2003116047A (ja) * | 2001-10-03 | 2003-04-18 | Fuji Photo Film Co Ltd | 撮像装置および撮影制御方法 |
JP4663956B2 (ja) * | 2002-12-25 | 2011-04-06 | 浜松ホトニクス株式会社 | 光検出装置 |
JP3863880B2 (ja) * | 2003-01-10 | 2006-12-27 | 松下電器産業株式会社 | 固体撮像装置およびカメラ |
US20060077273A1 (en) * | 2004-10-12 | 2006-04-13 | Hae-Seung Lee | Low noise active pixel image sensor |
JP5251412B2 (ja) * | 2008-10-09 | 2013-07-31 | ソニー株式会社 | 固体撮像素子およびその駆動方法、並びにカメラシステム |
JP2010093746A (ja) * | 2008-10-10 | 2010-04-22 | Sony Corp | 固体撮像素子及び信号処理システム |
JP2012124729A (ja) * | 2010-12-09 | 2012-06-28 | Sony Corp | 撮像素子および撮像装置 |
JP5714982B2 (ja) * | 2011-02-01 | 2015-05-07 | 浜松ホトニクス株式会社 | 固体撮像素子の制御方法 |
JP2012253624A (ja) * | 2011-06-03 | 2012-12-20 | Sony Corp | 固体撮像装置およびカメラシステム |
FR2980660A1 (fr) * | 2011-09-22 | 2013-03-29 | Centre Nat Rech Scient | Capteur a photosites, perfectionne |
-
2013
- 2013-06-04 FR FR1355139A patent/FR3006500B1/fr not_active Expired - Fee Related
-
2014
- 2014-06-03 JP JP2016517656A patent/JP2016523474A/ja active Pending
- 2014-06-03 US US14/895,561 patent/US9838630B2/en not_active Expired - Fee Related
- 2014-06-03 EP EP14733237.3A patent/EP3005684A1/fr not_active Ceased
- 2014-06-03 WO PCT/FR2014/051307 patent/WO2014195622A1/fr active Application Filing
Non-Patent Citations (2)
Title |
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None * |
See also references of WO2014195622A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2014195622A1 (fr) | 2014-12-11 |
FR3006500B1 (fr) | 2016-10-28 |
US9838630B2 (en) | 2017-12-05 |
JP2016523474A (ja) | 2016-08-08 |
US20160127670A1 (en) | 2016-05-05 |
FR3006500A1 (fr) | 2014-12-05 |
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