EP2845454A1 - Method for producing ceramic circuit boards from ceramic substrates having metal-filled vias - Google Patents
Method for producing ceramic circuit boards from ceramic substrates having metal-filled viasInfo
- Publication number
- EP2845454A1 EP2845454A1 EP13721642.0A EP13721642A EP2845454A1 EP 2845454 A1 EP2845454 A1 EP 2845454A1 EP 13721642 A EP13721642 A EP 13721642A EP 2845454 A1 EP2845454 A1 EP 2845454A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- vias
- copper
- ceramic
- filled
- μιτι
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/043—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by using a moving tool for milling or cutting the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
Definitions
- the invention relates to a method for producing ceramic circuit boards of ceramic substrates with metal-filled vias.
- Ceramic circuit boards with completely metal-filled vias can be prepared in the prior art by repeatedly filling the vias in the ceramic substrate with templates and structure of a surface metallization by a first screen printing, baking and galvanic amplification to over 100 ⁇ . Through a single filling process (Viafilivorgang) you can not completely fill vias with copper pastes.
- the invention has for its object to improve a method according to the preamble of claim 1 so that the vias can be filled with a single filling.
- a voltage can be applied. It should be noted that the Kupfernetallmaschine or the copper foil covering the vias unilaterally.
- a voltage is applied to the copper metallization or to the copper foil in the copper bath and the vias are filled from the ceramic side.
- ceramic side is meant the side opposite to the side of the copper metallization or the copper foil.
- the copper metallization is partially covered by a galvano resist and then the vias are filled by the electrogalvanic process in a copper bath and at the same time the exposed (not under the Galvano Resist) games to layer thicknesses of 50- Reinforced 100 ⁇ and then the electroplating Resist again chemically removed and provided with screen printed thinner unreinforced parts that were previously under the Galvano Resist dissolved. It can be made as any metallization with any thicknesses.
- the vias are completely filled with copper.
- a possibly protruding copper ridge is mechanically by z.
- brushing, lapping or grinding removed and then the ceramic substrates in the DCB / DBC process are completed. Even with these process steps, any metallization can be made with any thicknesses.
- the vias are completely filled with copper.
- the areas provided with screen printing are dissolved with a mixture of HCl + FeCl 3 .
- the vias preferably have a diameter of 50 to 5000 ⁇ and are preferably introduced by lasers.
- the ceramic substrate is rotated in the copper bath with the ceramic side to the anode mounted in the electroplating process in the electroplating process and rinsed with electrolyte. This greatly improves the filling of the vias. Through the use of vibration and / or ultrasound in the electroplating tank mass transfer can be improved.
- a copper metallization is thus applied by screen printing on the ceramic substrate, with the vias previously introduced, for example by lasers, on one side, but at the same time it is pressed uncontrollably into the vias.
- the coating thickness is usually after the firing at 6-12 ⁇ , the vias are border metallized, but not hermetically closed.
- the copper metallization is partially covered by a Galvano Resist.
- Galvao Resist is meant materials that are applied to the metallization or copper foil to prevent electrodeposition where it covers the surface.
- the ceramic substrate After application of the Galvano Resist, the ceramic substrate is immersed in a copper bath. There, the vias are grown by an electrogalvanic process by deposition of copper and the exposed (not under the Galvano Resist) games are amplified to layer thicknesses of 50-100 ⁇ . Then the Galvano Resist is chemically removed (dissolved) again.
- the thin screen-printed sections are made with, for example, a mixture HCI + FeCl 3 dissolved. The thicker parts of the metallization are thinned only slightly. For higher quality products, the galvanized layout can be protected by tinning or photoresist before stripping the resist.
- the second Möglickeit or inventive variant is to laser in the ceramic substrates of any type and thickness vias and coated on one side with copper foil of 100 -300 ⁇ in the DCB / DBC process.
- the vias (diameter 50-5000 ⁇ ) can then be filled with the previously described method.
- the supernatant copper burr is mechanically broken, e.g. removed by brushing, lapping or sanding.
- the thus treated semi-substrates can then be completed in the DCB / DBC process and have a reliable via.
- the ceramic substrate is turned in the copper bath with the ceramic side towards the anode mounted in the galvanic basin and rinsed with electrolyte.
- the vias are therefore filled from the ceramic side.
- Through the use of vibration and / or ultrasound is a further improvement of the mass transfer possible. Due to the more intensive mass transfer the vias grow especially fast with copper.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electroplating Methods And Accessories (AREA)
- ing And Chemical Polishing (AREA)
Abstract
The invention relates to a method for producing ceramic circuit boards from ceramic substrates having metal-filled vias. In order to be able to fill the vias by means of a single filling process, either a planar copper metallization is applied on one side to the ceramic substrate having vias by means of screen printing, or a copper film of 100 - 300 μm is bonded on one side to the ceramic substrate having vias in a DCB/DBC process and the vias are filled from the ceramic side by means of an electrogalvanic process in a copper bath by the deposition of copper.
Description
Verfahren zum Herstellen keramischer Leiterplatten aus Keramiksubstraten mit metallgefüllten Vias Method for producing ceramic circuit boards from ceramic substrates with metal-filled vias
Die Erfindung betrifft ein Verfahren zum Herstellen keramischer Leiterplatten aus Keramiksubstraten mit metallgefüllten Vias. The invention relates to a method for producing ceramic circuit boards of ceramic substrates with metal-filled vias.
Keramische Leiterplatten mit vollständig metallgefüllten Vias (Durchmesser etwa 100-300 μιτι) können nach dem Stand der Technik durch wiederholtes Füllen der Vias im Keramiksubstrat mit Schablonen und Aufbau einer Flächenmetallisierung durch einen ersten Siebdruck, Einbrennen und galvanische Weiterverstärkung bis über 100 μιτι hergestellt werden. Durch einen einzigen Füllvorgang (Viafilivorgang) kann man Vias mit Kupferpasten nicht komplett füllen. Ceramic circuit boards with completely metal-filled vias (diameter about 100-300 μιτι) can be prepared in the prior art by repeatedly filling the vias in the ceramic substrate with templates and structure of a surface metallization by a first screen printing, baking and galvanic amplification to over 100 μιτι. Through a single filling process (Viafilivorgang) you can not completely fill vias with copper pastes.
Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren nach dem Oberbegriff des Anspruchs 1 so zu verbessern, dass mit einem einzigen Füllvorgang die Vias gefüllt werden können. The invention has for its object to improve a method according to the preamble of claim 1 so that the vias can be filled with a single filling.
Diese Aufgabe wird dadurch gelöst, This task is solved by
- dass auf dem Keramiksubstrat mit Vias entweder einseitig mit Siebdruck eine flächige Kupfermetallisierung aufgebracht wird oder einseitig eine Kupferfolie von 100 - 300 μηη im DCB/DBC-Verfahren aufgebondet wird, und - That on the ceramic substrate with Vias either one side with screen printing a planar copper metallization is applied or on one side a copper foil of 100 - 300 μηη is bonded in the DCB / DBC method, and
- dass die Vias von der Keramikseite her durch einen elektrogalvanischen Prozess in einem Kupferbad durch Abscheidung von Kupfer gefüllt werden. - That the vias are filled from the ceramic side by an electro-galvanic process in a copper bath by deposition of copper.
Durch das Aufbringen der Kupfermetallisierung oder der Kupferfolie kann eine Spannung angelegt werden. Es ist hierbei zu beachten, dass die
Kupfernnetallisierung oder die Kupferfolie die Vias einseitig abdeckt. Beim anschließenden elektrogalvanischen Prozess wird an die Kupfermetallisierung oder an die Kupferfolie im Kupferbad eine Spannung angelegt und die Vias von der Keramikseite her gefüllt. Mit Keramikseite ist die Seite gegenüber der Seite mit der Kupfermetallisierung oder der Kupferfolie gemeint. Mit diesem Verfahren können die Vias mit einem einzigen Füllvorgang gefüllt werden By applying the copper metallization or the copper foil, a voltage can be applied. It should be noted that the Kupfernetallisierung or the copper foil covering the vias unilaterally. During the subsequent electrogalvanic process, a voltage is applied to the copper metallization or to the copper foil in the copper bath and the vias are filled from the ceramic side. By ceramic side is meant the side opposite to the side of the copper metallization or the copper foil. With this method, the vias can be filled with a single filling process
Nachfolgend werden zwei erfinderische Varianten des Verfahrens beschrieben. In the following, two inventive variants of the method will be described.
In einer ersten Variante wird nach dem Aufbringen der Kupfermetallisierung mit Siebdruck die Kupfermetallisierung durch einen Galvano Resist partiell abgedeckt und anschließend die Vias durch den elektrogalvanischen Prozess in einem Kupferbad gefüllt und gleichzeitig die freiliegenden (nicht unter dem Galvano Resist liegenden) Partien auf Schichtstärken von 50-100 μιτι verstärkt und anschließend der Galvano Resist wieder chemisch entfernt und die mit Siebdruck versehenen dünneren nicht verstärkten Partien, die vorher unter dem Galvano Resist waren, aufgelöst. Es können so beliebige Metallisierungen mit beliebigen Dicken hergestellt werden. Die Vias sind vollständig mit Kupfer gefüllt. In a first variant, after application of the copper metallization with screen printing, the copper metallization is partially covered by a galvano resist and then the vias are filled by the electrogalvanic process in a copper bath and at the same time the exposed (not under the Galvano Resist) games to layer thicknesses of 50- Reinforced 100 μιτι and then the electroplating Resist again chemically removed and provided with screen printed thinner unreinforced parts that were previously under the Galvano Resist dissolved. It can be made as any metallization with any thicknesses. The vias are completely filled with copper.
In einer zweiten Variante wird nach dem Aufbonden der Kupferfolie und Füllen der Vias ein eventuell überstehender Kupfergrat mechanisch durch z. B. Bürsten, Läppen oder Schleifen entfernt und anschließend werden die Keramiksubstrate im DCB/DBC-Verfahren fertig gestellt. Auch mit diesen Verfahrensschritten können beliebige Metallisierungen mit beliebigen Dicken hergestellt werden. Die Vias sind vollständig mit Kupfer gefüllt. In a second variant, after the bonding of the copper foil and filling of the vias a possibly protruding copper ridge is mechanically by z. As brushing, lapping or grinding removed and then the ceramic substrates in the DCB / DBC process are completed. Even with these process steps, any metallization can be made with any thicknesses. The vias are completely filled with copper.
Bevorzugt werden in der ersten Variante die mit Siebdruck versehenen Partien mit einer Mischung aus HCI+FeCI3 aufgelöst.
Die Vias weisen bevorzugt einen Durchmesser von 50 bis 5.000 μιτι auf und werden bevorzugt durch Lasern eingebracht In einer Weiterbildung der Erfindung wird beim elektrogalvanischen Prozess das Keramiksubstrat im Kupferbad mit der Keramikseite zur im Galvanikbecken angebrachten Anode hin gedreht und mit Elektrolyt angespült. Dies verbessert die Füllung der Vias enorm. Durch den Einsatz von Vibration und / oder Ultraschall kann im Galvanikbecken der Stoffaustausch verbessert werden. Preferably, in the first variant, the areas provided with screen printing are dissolved with a mixture of HCl + FeCl 3 . The vias preferably have a diameter of 50 to 5000 μιτι and are preferably introduced by lasers In a further development of the invention, the ceramic substrate is rotated in the copper bath with the ceramic side to the anode mounted in the electroplating process in the electroplating process and rinsed with electrolyte. This greatly improves the filling of the vias. Through the use of vibration and / or ultrasound in the electroplating tank mass transfer can be improved.
In der ersten Variante der Erfindung wird also mit Siebdruck auf das Keramiksubstrat, mit den vorher zum Beispiel durch Lasern eingebrachten Vias, einseitig eine Kupfermetallisierung aufgebracht, die gleichzeitig aber unkontrolliert in die Vias eingedrückt wird. Die Beschichtungsstärke liegt nach dem Einbrennen üblicherweise bei 6-12 μιτι, die Vias sind randmetallisiert, aber nicht hermetisch geschlossen. Anschließend wird die Kupfermetallisierung durch einen Galvano Resist partiell abgedeckt. Unter Galvao Resist werden Materialien verstanden, die auf der Metallisierung oder der Kupferfolie aufgebracht werden, um an den Stellen, wo sie die Oberfläche bedecken, eine galvanische Abscheidung zu verhindern. In the first variant of the invention, a copper metallization is thus applied by screen printing on the ceramic substrate, with the vias previously introduced, for example by lasers, on one side, but at the same time it is pressed uncontrollably into the vias. The coating thickness is usually after the firing at 6-12 μιτι, the vias are border metallized, but not hermetically closed. Subsequently, the copper metallization is partially covered by a Galvano Resist. By Galvao Resist is meant materials that are applied to the metallization or copper foil to prevent electrodeposition where it covers the surface.
Nach dem Aufbringen des Galvano Resist wird das Keramiksubstrat in ein Kupferbad getaucht. Dort lässt man durch einen elektrogalvanischen Prozess durch Abscheidung von Kupfer die Vias zuwachsen und die freiliegenden (nicht unter dem Galvano Resist liegenden) Partien werden auf Schichtstärken von 50-100 μιτι verstärkt. Dann wird der Galvano Resist wieder chemisch entfernt (aufgelöst). Die dünnen gesiebdruckten Partien werden mit beispielsweise einer Mischung aus
HCI+FeCI3 aufgelöst. Die dickeren Partien der Metallisierung werden nur wenig gedünnt. Handelt es sich um höherwertige Produkte, kann das aufgalvanisierte Layout vor dem Strippen des Resistes durch Verzinnen oder durch Photoresist geschützt werden. After application of the Galvano Resist, the ceramic substrate is immersed in a copper bath. There, the vias are grown by an electrogalvanic process by deposition of copper and the exposed (not under the Galvano Resist) games are amplified to layer thicknesses of 50-100 μιτι. Then the Galvano Resist is chemically removed (dissolved) again. The thin screen-printed sections are made with, for example, a mixture HCI + FeCl 3 dissolved. The thicker parts of the metallization are thinned only slightly. For higher quality products, the galvanized layout can be protected by tinning or photoresist before stripping the resist.
Die zweite Möglickeit bzw. erfinderische Variante besteht darin, in die Keramiksubstrate jeder Art und Dicke Vias zu lasern und einseitig mit Kupferfolie von 100 -300 μιτι im DCB/DBC-Verfahren zu beschichten. Die Vias (Durchmesser 50 - 5.000 μιτι) können dann mit dem vorher beschriebenen Verfahren gefüllt werden. Nach dem Füllen wird der überstehende Kupfergrat mechanisch z.B. durch Bürsten, Läppen oder Schleifen entfernt. Die so behandelten Halbsubstrate können dann im DCB/DBC-Verfahren fertig gestellt werden und weisen eine zuverlässige Durchkontaktierung auf. The second Möglickeit or inventive variant is to laser in the ceramic substrates of any type and thickness vias and coated on one side with copper foil of 100 -300 μιτι in the DCB / DBC process. The vias (diameter 50-5000 μιτι) can then be filled with the previously described method. After filling, the supernatant copper burr is mechanically broken, e.g. removed by brushing, lapping or sanding. The thus treated semi-substrates can then be completed in the DCB / DBC process and have a reliable via.
Zur kathodischen Füllung der Vias und der Schichtverstärkung wird das Keramiksubstrat im Kupferbad mit der Keramikseite zur im Galvanikbecken angebrachten Anode hin gedreht und mit Elektrolyt angespült. Die Vias werden also von der Keramikseite her gefüllt. Durch den Einsatz von Vibration und /oder Ultraschall ist ist eine weitere Verbesserung des Stoffaustausches möglich. Durch den intensiveren Stoffaustausch wachsen die Vias besonders schnell mit Kupfer zu.
For cathodic filling of the vias and the layer reinforcement, the ceramic substrate is turned in the copper bath with the ceramic side towards the anode mounted in the galvanic basin and rinsed with electrolyte. The vias are therefore filled from the ceramic side. Through the use of vibration and / or ultrasound is a further improvement of the mass transfer possible. Due to the more intensive mass transfer the vias grow especially fast with copper.
Claims
Ansprüche claims
Verfahren zum Herstellen keramischer Leiterplatten aus Keramiksubstraten mit metallgefüllten Vias, dadurch gekennzeichnet, Method for producing ceramic circuit boards of ceramic substrates with metal-filled vias, characterized
- dass auf dem Keramiksubstrat mit Vias entweder einseitig mit Siebdruck eine flächige Kupfermetallisierung aufgebracht wird oder einseitig eine Kupferfolie von 100 - 300 μιτι im DCB/DBC-Verfahren aufgebondet wird, und - That on the ceramic substrate with Vias either one side with screen printing a planar copper metallization is applied or one side of a copper foil of 100 - 300 μιτι is bonded in the DCB / DBC method, and
- dass die Vias von der Keramikseite her durch einen elektrogalvanischen Prozess in einem Kupferbad durch Abscheidung von Kupfer gefüllt werden. - That the vias are filled from the ceramic side by an electro-galvanic process in a copper bath by deposition of copper.
Verfahren nach Anspruch 1 , dadurch gekennzeichnet, dass nach dem Aufbringen der Kupfermetallisierung mit Siebdruck A method according to claim 1, characterized in that after application of the copper metallization with screen printing
- die Kupfermetallisierung durch einen Galvano Resist partiell abgedeckt wird, the copper metallization is partially covered by a galvano resist,
- anschließend die Vias durch den elektrogalvanischen Prozess in einem Kupferbad gefüllt werden und gleichzeitig die freiliegenden (nicht unter dem Galvano Resist liegenden) Partien auf Schichtstärken von 50-100 μιτι verstärkt werden und - Then the vias are filled by the electro-galvanic process in a copper bath and at the same time the exposed (not under the Galvano Resist) games are amplified to layer thicknesses of 50-100 μιτι and
- anschließend der Galvano Resist wieder chemisch entfernt und die mit Siebdruck versehenen dünneren nicht verstärkten Partien, die vorher unter dem Galvano Resist waren, aufgelöst werden. - then chemically removed the Galvano Resist and dissolved the screen-printed thinner unreinforced areas previously under the Galvano Resist.
Verfahren nach Anspruch 1 , dadurch gekennzeichnet, dass nach dem Aufbonden der Kupferfolie und Füllen der Vias ein eventuell überstehender Kupfergrat mechanisch durch z.B. Bürsten, Läppen oder Schleifen entfernt wird und anschließend die Keramiksubstrate im DCB/DBC-Verfahren fertig gestellt werden.
Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die mit Siebdruck versehenen Partien mit einer Mischung aus HCI+FeCI3 aufgelöst werden. A method according to claim 1, characterized in that after the bonding of the copper foil and filling the vias a possibly protruding copper ridge is mechanically removed by brushing, lapping or grinding, for example, and then the ceramic substrates are completed in the DCB / DBC process. A method according to claim 1 or 2, characterized in that the screen-printed parts are dissolved with a mixture of HCl + FeCl 3 .
Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, dass die Vias einen Durchmesser von 50 bis 5.000 μιτι aufweisen. Method according to one of claims 1 to 4, characterized in that the vias have a diameter of 50 to 5000 μιτι.
Verfahren nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, dass die Vias durch Lasern eingebracht werden. Method according to one of claims 1 to 5, characterized in that the vias are introduced by lasers.
Verfahren nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, dass beim elektrogalvanischen Prozess das Keramiksubstrat in einem Kupferbad mit der Keramikseite zur im Galvanikbecken angebrachten Anode hin gedreht und mit Elektrolyt angespült wird. Method according to one of claims 1 to 6, characterized in that in the electro-galvanic process, the ceramic substrate is rotated in a copper bath with the ceramic side to the anode mounted in the electroplating tank and rinsed with electrolyte.
Verfahren nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass durch den Einsatz von Vibration und / oder Ultraschall im Galvanikbecken der Stoffaustausch verbessert wird.
Method according to one of claims 1 to 7, characterized in that the exchange of substances is improved by the use of vibration and / or ultrasound in the electroplating tank.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102012207283 | 2012-05-02 | ||
PCT/EP2013/059012 WO2013164348A1 (en) | 2012-05-02 | 2013-04-30 | Method for producing ceramic circuit boards from ceramic substrates having metal-filled vias |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2845454A1 true EP2845454A1 (en) | 2015-03-11 |
Family
ID=48407468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP13721642.0A Withdrawn EP2845454A1 (en) | 2012-05-02 | 2013-04-30 | Method for producing ceramic circuit boards from ceramic substrates having metal-filled vias |
Country Status (7)
Country | Link |
---|---|
US (1) | US20150108003A1 (en) |
EP (1) | EP2845454A1 (en) |
JP (1) | JP6231079B2 (en) |
CN (1) | CN104412720A (en) |
DE (1) | DE102013207942A1 (en) |
TW (1) | TW201410085A (en) |
WO (1) | WO2013164348A1 (en) |
Families Citing this family (6)
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TWI623539B (en) | 2012-09-20 | 2018-05-11 | Udc愛爾蘭責任有限公司 | Azadibenzofurans for electronic applications |
CN105491795B (en) * | 2014-09-18 | 2018-07-03 | 浙江德汇电子陶瓷有限公司 | A kind of manufacturing method of metallized ceramic base plate and the metallized ceramic base plate manufactured by this method |
CN108133886A (en) * | 2017-12-11 | 2018-06-08 | 上海申和热磁电子有限公司 | A kind of method of DBC substrate backs grinding |
CN109037079B (en) * | 2018-07-13 | 2020-06-16 | 无锡天杨电子有限公司 | Patterning method of nitride ceramic copper-clad plate for rail transit chip |
CN109618505B (en) * | 2018-10-30 | 2020-01-03 | 华中科技大学 | Method for interconnecting through holes with high thickness-diameter ratio of directly copper-clad ceramic substrate |
CN111834324A (en) * | 2019-04-15 | 2020-10-27 | 谭祖荣 | Polished thick film substrate suitable for packaging flip chip and eutectic crystal element and manufacturing method thereof |
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GB8518945D0 (en) * | 1985-07-26 | 1985-09-04 | Ngk Insulators Ltd | Forming copper film on ceramic body |
US5298687A (en) * | 1990-12-27 | 1994-03-29 | Remtec, Inc. | High-density multilayer interconnection system on a ceramic substrate for high current applications and method of manufacture |
US5340947A (en) * | 1992-06-22 | 1994-08-23 | Cirqon Technologies Corporation | Ceramic substrates with highly conductive metal vias |
US6093443A (en) * | 1997-11-12 | 2000-07-25 | Curamik Electronics Gmbh | Process for producing a ceramic-metal substrate |
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- 2013-04-26 TW TW102114943A patent/TW201410085A/en unknown
- 2013-04-30 CN CN201380023208.9A patent/CN104412720A/en active Pending
- 2013-04-30 WO PCT/EP2013/059012 patent/WO2013164348A1/en active Application Filing
- 2013-04-30 EP EP13721642.0A patent/EP2845454A1/en not_active Withdrawn
- 2013-04-30 DE DE201310207942 patent/DE102013207942A1/en not_active Withdrawn
- 2013-04-30 JP JP2015509420A patent/JP6231079B2/en not_active Expired - Fee Related
- 2013-04-30 US US14/397,675 patent/US20150108003A1/en not_active Abandoned
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Also Published As
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JP2015520944A (en) | 2015-07-23 |
JP6231079B2 (en) | 2017-11-15 |
CN104412720A (en) | 2015-03-11 |
US20150108003A1 (en) | 2015-04-23 |
TW201410085A (en) | 2014-03-01 |
DE102013207942A1 (en) | 2013-11-07 |
WO2013164348A1 (en) | 2013-11-07 |
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