EP2820684A1

EP2820684A1 - Optoelectronic semiconductor chip

Info

Publication number: EP2820684A1
Application number: EP13708711.0A
Authority: EP
Inventors: Martin Mandl; Martin Strassburg; Christopher KÖLPER; Alexander Pfeuffer; Patrick Rode; Johannes Ledig; Richard Neumann; Andreas Waag
Original assignee: Osram Opto Semiconductors GmbH
Current assignee: Ams Osram International GmbH
Priority date: 2012-03-01
Filing date: 2013-02-20
Publication date: 2015-01-07
Also published as: CN104145346A; KR20150044422A; DE102012101718A1; US20150021636A1; WO2013127672A1; US9214600B2; JP2015508941A; JP5952922B2; CN104145346B

Abstract

The invention relates to an optoelectronic semiconductor chip, comprising a plurality of active regions (1) that are arranged at a distance from each other and a substrate (2) that is arranged on an underside (1a) of the plurality of active regions (1), wherein one of the active regions (1) has a main extension direction (R), the active region (1) has a core region (10) that is formed using a first semiconductor material, the active region (1) has an active layer (11) that which covers the core region (10) at least in directions (x, y) perpendicular to the main extension direction (R) of the active region (1), and the active region (1) has a cover layer (12) that is formed using a second semiconductor material and covers the active layer (11) at least in directions (x, y) perpendicular to the main extension direction (R) of the active region (11).

Description

description

Optoelectronic Semiconductor Chip An optoelectronic semiconductor chip is specified.

One problem to be solved is one

specify optoelectronic semiconductor chip, which can be operated very efficiently.

The optoelectronic semiconductor chip described here is, in particular, a radiation-emitting optoelectronic semiconductor chip. For example, it is an optoelectronic semiconductor chip, which in the

Operation emits UV radiation, visible light or infrared radiation. The optoelectronic semiconductor chip is in particular a light-emitting diode chip. Furthermore, it is possible for the semiconductor chip to be a

Radiation-receiving optoelectronic semiconductor chip is, for example, a solar cell or a

Photodiode.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the optoelectronic semiconductor chip comprises at least one active region. In particular, the optoelectronic semiconductor chip comprises a multiplicity of active ones

Areas which are spaced from each other. During operation of the optoelectronic semiconductor chip, electromagnetic radiation, in particular light, is generated in the active regions, which at least partially leaves the semiconductor chip. Alternatively, it is possible that in the active Electromagnetic radiation is converted into charge carriers.

It is also possible in extreme cases that the

Optoelectronic semiconductor chip includes exactly one active area. Such a semiconductor chip can be used in particular in communications technology.

The optoelectronic semiconductor chip comprises a plurality of active regions, which are each arranged at a distance from one another. It is possible that the active

Areas are connected to one another at a bottom and / or on an upper side by another element. In this case, the active areas are spaced apart from each other in a region between their lower side and their upper side and are not connected to each other there.

The active areas may be arranged, for example, in the manner of a regular grid. That is, the active areas are at predetermined intervals from each other

arranged, for example in a plan view of the

Tops of active areas is a regular one

Lattice structure, such as the structure of a

Rectangular grid or a triangular grid, recognizable. However, a random distribution of the active areas is also possible.

In the following, there is usually talk of an active area of the multiplicity of active areas. Preferably, a majority of the active areas, in particular all active areas, have the properties described for the one area. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the optoelectronic semiconductor chip comprises a carrier. The carrier is disposed on an underside of the plurality of active areas. The carrier is that element of the optoelectronic semiconductor chip which mechanically supports and supports the multiplicity of active regions. By way of example, the carrier can also be that element of the optoelectronic semiconductor chip which connects the multiplicity of active regions to one another.

The carrier may be, for example, a

Growth substrate for at least parts of the active areas act. The carrier may be made of GaAs, for example,

Silicon, glass or sapphire be formed. Furthermore, it is possible for the carrier to be at least one of the mentioned

Contains materials. If the carrier is a growth substrate, then the growth substrate remains in the

Semiconductor chip and is not removed in particular. However, thinning of the growth substrate, that is, one

Reduction of the thickness of the growth substrate, for example by grinding, etching or chemical mechanical polishing possible.

The carrier can be radiolucent, for example

be transparent, radiation reflective or diffused diffused. That is, for example, electromagnetic radiation generated or to be detected in the active regions during operation of the semiconductor chip may pass through the carrier or be reflected or scattered thereon.

In addition, it is possible that the carrier is electrically

is formed insulating. For example, the carrier be formed with a radiation-transparent, electrically insulating material such as sapphire, which serves as a growth substrate for a semiconductor material of the plurality of active areas.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, at least one of the active regions has a main extension direction. That is, the active region does not extend equally in every spatial direction, but there is a preferential direction

Main extension direction, in which the active area has its greatest extent.

For example, the active area may take the form of a

Cylinder, the shape of a truncated cone, the shape of a pyramid, or the shape of a prism, in particular with a hexagonal or triangular base area having. The main direction of extension is then the direction in which the height of the cylinder, the truncated cone or the prism is determined. In other words, the at least one active region is formed by an elongated, three-dimensional body and, for example, does not have the shape of a planar layer. Furthermore, the active region is not a continuous, unstructured layer, for example a plane one

Having outer surface.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the at least one active region has a core region, which is formed with a first semiconductor material. The first semiconductor material has a first conductivity type. For example, the first one is Semiconductor material formed n-type. The first

Semiconductor material may for example be based on an n-doped I I I / V semiconductor material system. For example, the first semiconductor material is based on an n-doped nitride semiconductor material system. In particular, the first semiconductor material can then be based on n-type GaN, InGaN, AlGaN or AlInGaN.

For example, at least the first semiconductor material is deposited directly onto the outer area of the carrier facing the active areas. An undoped growth layer can also be deposited as the first layer, on which in turn the n-conducting material is subsequently applied. The core region of the active region extends

in particular along the main extension direction and may have the same shape as the active region. If the active region is embodied, for example, in the form of a cylinder or prism, the core region can also have the shape of a cylinder or prism. The core region can then be embodied in particular as a solid body, which consists of the first semiconductor material.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the at least one active region comprises an active layer which covers the core region at least in FIG

Directed directions transverse to the main direction of extension of the active area. The core region has, for example, a lateral surface which may be partially or in particular completely covered with the material of the active layer. An end face can also be covered at least in places. The core area can be directly to the active layer limits. During operation of the optoelectronic semiconductor chip, the voltage generated by the optoelectronic semiconductor chip is generated

Radiation generated in the active region and there in particular in the active layer. Within the manufacturing tolerance, the active layer preferably has a uniform thickness, but may vary along the main direction of extension.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the at least one active region has a cover layer, which is formed with a second semiconductor material and covers the active layer at least in directions transverse to the main extension direction of the active region. By way of example, the active layer is then arranged between the cover layer and the core region. The

Covering layer can partially or completely cover the active layer. Within the scope of the manufacturing tolerance, the cover layer preferably has a uniform thickness, which, however, may change along the main extension direction.

The second semiconductor material is a semiconductor material of a second conductivity type different from the first conductivity type. In particular, the second semiconductor material may be based on the same semiconductor material system as the first semiconductor material, but may have a different doping. If the first semiconductor material is formed, for example, n-type, then the second

Semiconductor material formed p-type. For example, the second semiconductor material is based on p-GaN, p-InGaN, p-AlGaN or p-AHnGaN or a stack of two or more layers of two or more of the specified materials. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the semiconductor chip comprises a multiplicity of active regions, which are arranged at a distance from one another. Furthermore, the optoelectronic semiconductor chip comprises a

Carrier disposed at an underside of the plurality of active areas. In this case, at least one of the active

Areas of a main extension direction, the active

The region comprises a core region which is formed with a first semiconductor material, the active region has an active layer which covers the core region at least in directions transverse to the main extension direction of the active region, the active region has a cover layer comprising a second semiconductor material is formed and the active layer at least in the direction transverse to

Main extension direction of the active area covered.

In this case, the optoelectronic semiconductor chip comprises

preferably a plurality of active areas, which are of similar construction, for example. As part of the

Manufacturing tolerance, these active areas can then be the same. That is, each of the active ones

Areas then comprises a core region, an active layer and a cover layer which, within the scope of the manufacturing tolerance, each have the same material composition.

In particular, it is possible that under the

Manufacturing tolerance all active areas of the

Optoelectronic semiconductor chips are the same. However, it is also possible that the optoelectronic

Semiconductor chip comprises a plurality of active areas, which are at least partially formed differently. For example, the active areas may vary in thickness, ie extension in directions transverse to

Main extension direction and / or length, ie extension parallel to the main direction of extent and / or

Composition differ from each other. Thus, different active areas can emit light of different colors, so that the Hableiterchip emits, for example, in total white light.

The efficiency of GaN-based light-emitting diodes in particular under operating current conditions is the so-called

Limited "Droop" effect. This effect indicates a significant drop in efficiency with increasing current density or charge carrier density. Typical operating currents are therefore well beyond the maximum of the efficiency curve. To advance to higher efficiencies while maintaining constant current, therefore, is a reduction of the local

Carrier density advantageous. This could be done, for example, by increasing the cross-sectional area of the

optoelectronic semiconductor chips or by increasing the number of active layers can be achieved. Both

However, approaches have problems.

Thus, increasing the cross-sectional area is impractical for many applications, for example, the use of the optoelectronic semiconductor chip in a projection device, since this enlargement increases the etendue

accompanied. Moreover, this solution is always with a

Cost increase associated, which is usually disproportionately to increase the cross-sectional area of the semiconductor chip.

In the case of the optoelectronic semiconductor chip described here, the active regions are known, for example, as core-shell nanodevices. or Microrods ", ie as core-shell nano- or micro-rods, formed by the division of the radiation-emitting region of the optoelectronic semiconductor chip in a

Variety of active areas, such as a variety of core-sheath bars, is the active volume in which

Operation is generated electromagnetic radiation, compared to an optoelectronic semiconductor chip having a single active region, which is unstructured, for example, increases. In this way, the efficiency of the

Semiconductor chips increased.

Due to the fact that one described here

Optoelectronic semiconductor chip a variety of active

Has areas, a significant increase in the active area and thus an increase in efficiency under operating current conditions at reduced carrier density is achieved. Further, in the epitaxial growth of the active regions that are spaced apart from a closed two-dimensional layer, a reduction of strain in the semiconductor material of the active regions can be achieved.

In particular, it is possible for an optoelectronic semiconductor chip described here to comprise one, more than two, more than 100, preferably more than 1000, in particular more than 10,000 or more than 100,000 active regions. To the

For example, the active areas are electrically insulated from each other in the area of their lateral surfaces. It is possible that the active areas are controlled together, in groups or individually. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the growth direction of the first semiconductor material is substantially parallel to

Main extension direction. That is, under the

Manufacturing tolerance runs the growth direction of the first semiconductor material parallel to

Main direction. The first semiconductor material of the core region of the at least one active region is therefore grown in the main direction of extent. The active layer and the overcoat of the active region cover the core region in directions that are transverse and equal

Direction to the direction of growth of the semiconductor material of the core region run. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the active region has a length which is determined in the main direction of extent. That is, the length of the active area is along the

Main extension direction measured. Furthermore, the active region has a diameter or a thickness, which is determined in a direction perpendicular to the main extension direction, ie in a plane to which the

Main extension direction is vertical, runs. Of the

Diameter may vary along the main direction of extent. The ratio of length to maximum diameter of the active region, preferably of all active regions of the optoelectronic semiconductor chip, is at least one, in particular at least five, for example between at least five and at most 100.

The diameter, ie the thickness, of the active region can be between at least 20 nm and at most 25 μm. With a view to improving the material quality, in particular with regard to reducing dislocations in the semiconductor material of the active region, active regions with a diameter of at least 100 nm and at most 3 ym, in particular at most 1 ym, prove to be

especially advantageous. In such thin active areas dislocations usually do not enforce the active area along its entire length, but end up on a relatively short path lengths due to the small thickness

Lateral surface of the active area, without over the

to extend the entire active area. It is further

possible that the dislocations extend along the entire length of the core region of the active region but do not penetrate the active layer on the outer surface of the core region.

The active areas are preferably in high density, that is arranged with a high fill factor. Of the

Fill factor corresponds to the ratio of the area of the side of the carrier, which is adjacent to the active areas, to the total area of the top of the carrier, the active

Is assigned to areas. The filling factor is preferably at least 20%, in particular at least 50%, for example at least 75%. This is a particularly significant increase in the active area of the optoelectronic

Reached semiconductor chips.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the active region has a

Current spreading layer, which covers the cover layer at least in directions transverse to the main direction of extent, wherein the Stromaufweitungsschicht for in operation in the active layer generated electromagnetic radiation

can be permeable. The current spreading layer serves to distribute an electric current particularly uniformly over the cover layer. The current spreading layer is in particular in direct contact with the cover layer and can cover it partially or completely. Is the

Cover layer formed for example with a p-type nitride compound semiconductor material, so it has a relatively low transverse conductivity. The

Current spreading layer therefore leads to a more uniform energization of the active layer of the active region. The current spreading layer covers the cover layer

for example, as a layer that under the

Manufacturing tolerance may have a uniform thickness.

According to at least one embodiment of the optoelectronic semiconductor chip, the current spreading layer is for electromagnetic radiation generated in the active region

permeable. That is, the

Current spreading layer is in this case

permeable to radiation.

Here and below means the term

"radiation-transmissive" means that the radiation-transmissive component is at least 75% of that passing through it

Electromagnetic radiation of the active layer passes without absorbing this radiation. The

Radiation permeable component may be milky, cloudy or clear, transparent.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the current spreading layer is provided with a transparent conductive oxide (TCO) formed. For example, materials such as ITO or ZnO are suitable for forming the current spreading layer. According to at least one embodiment of the optoelectronic semiconductor chip, the current spreading layer extends over at least a major portion of the length of the active region. In particular, it is possible for the current spreading layer to cover the cover layer uniformly over the entire length of the active region while completely covering it.

According to at least one embodiment of the optoelectronic semiconductor chip, an insulating material is disposed between the

Variety of active areas arranged, the

Insulating material for electromagnetic radiation generated in operation in the active layer may be permeable and the insulating material surrounds the plurality of active areas at least in directions transverse to the main direction of extent. In other words, the insulating material is filled in the spaces between the active areas and the insulating material can fill these spaces, in particular completely fill. The insulating material is electrically insulating and optionally

permeable to radiation. For example, materials such as alumina (AlOx), silica,

Silicon nitride, diamond-like carbon or polymers as

Insulation materials.

The insulation material is especially then

permeable to radiation, although the

Stromaufweitungsschicht is radiation-permeable. For example, if the current spreading layer is as formed radiation-impermeable metal layer, so the insulating material can be radiopaque

be educated. In addition to electrical decoupling of the individual active areas, the insulation material ensures protection of the active areas from mechanical damage,

atmospheric gases and moisture. According to at least one embodiment of the optoelectronic semiconductor chip, it is alternative or in addition to

Insulating material allows a functional material to be disposed between the plurality of active regions, wherein the functional material surrounds the active regions at least in directions transverse to the main direction of extent, and the functional material at least one

Lumineszenzkonversionsstoff and / or at least one ESD protective material comprises. For example, particles of these materials may also be incorporated into the insulating material so that the filled insulating material forms the functional material. The luminescence conversion substance is suitable, for example, for converting at least part of the electromagnetic radiation generated in the active regions into electromagnetic radiation of longer wavelengths

convert. The semiconductor chip then emits, for example, mixed radiation, in particular white light. The ESD protection material may be, for example, a varistor material such as ZnO. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the insulation material at least in places directly adjoins the outer surface of the active region. For example, the insulating material completely covers the lateral surface of each active region and directly adjoins the outermost layer of the active region,

in particular the current spreading layer. In this case, the insulation material embeds the active areas.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, a mask layer is arranged on the side of the carrier assigned to the multiplicity of active regions, the mask layer having an opening for each of the active regions which is made of the first semiconductor material

is permeated. To produce the active regions, for example, a mask layer is applied to a layer of first semiconductor material or to the carrier. The

Mask layer has openings to the layer of the first

Semiconductor material or towards the wearer. The first

Semiconductor material, which forms the core region of each active region, then grows only in the region of

Openings on the layer of first semiconductor material or the carrier. Due to the position of the opening, the

Position of the active area determined. The mask layer can remain in the finished optoelectronic semiconductor chip. Their openings are penetrated by first semiconductor material.

If the mask layer is not transparent to radiation, but it can also be removed from the semiconductor chip. Alternatively, a self-organized growth of the core areas without a mask is possible. In this case, the mask is omitted. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the mask layer is electromagnetic radiation generated in operation in the active layer

permeable. For this purpose, the mask layer can be formed, for example, from the same material as the insulation layer.

According to at least one embodiment of the optoelectronic semiconductor chip, the core region on the upper side of the active region facing away from the carrier is free of the active layer and is in an electrically conductive manner

Contact layer in direct contact. That is, the tip of the active region directed away from the carrier is partially removed, with the capping layer and the active layer removed. In this way, the core region, ie in particular the first semiconductor material of the active region, exposed and can in direct electrical

Contact with an electrically conductive contact layer

to be brought.

For example, the core region is n-type. That is, an n-side contacting of the active region is possible by means of the electrically conductive contact layer. In order to suppress short circuits or current leakage paths, the cover layer and possibly the current spreading layer are passivated by the electrically conductive layer

Contact layer isolated. The passivation can in this case be in direct contact with the core region of the active region and is then located on the side of the active region facing away from the carrier on its lateral surface, for example in direct contact with the cover layer and optionally the current spreading layer. The passivation can be flush there terminate with the top of the core region facing away from the carrier and are in direct contact with the electrically conductive contact layer on its side facing away from the carrier.

The passivation can be achieved, for example, by covering the cover layer and optionally the current spreading layer with an electrically insulating material or by

Passivation of the semiconductor material of the cover layer, for example by ion implantation or by electrical deactivation of the dopant species, for example in the context of a hydrogen plasma step or by generating

Surface defects by a back sputtering step,

respectively .

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the contact layer is in contact with the

Core areas of at least a large part, in particular all active areas of the optoelectronic semiconductor chip in direct contact. That is, all core areas, or at least a majority of all core areas, become electrically conductive via a single, common contact layer

connected. The contact layer may in particular at least locally extend in a plane which runs parallel or substantially parallel to the outer surface of the carrier facing the plurality of active regions. The active regions are then trapped between the carrier and the contact layer. At least a majority of the active regions designates at least 75%, preferably at least 85%, in particular at least 95%, of the active regions of the optoelectronic semiconductor chip. Substantially parallel means that the contact layer at least in places in a plane

runs, which runs parallel to the active areas facing the outer surface of the carrier within the manufacturing tolerance.

In accordance with at least one embodiment of the optoelectronic semiconductor chip, the contact layer is for the electromagnetic radiation generated in operation in the active region

permeable or reflective formed. A permeable contact layer may be, for example, an upper one

be formed described transparent, conductive oxide. A reflective contact layer may be formed, for example, with a reflective metal such as silver, Au, Ti, Pt, Pd, Wf, Os, and / or aluminum. In case of a

reflective contact layer, the carrier is preferably designed to be transparent to radiation, at least a majority of the optoelectronic semiconductor chip in operation

radiated electromagnetic radiation is then radiated through the carrier. In accordance with at least one embodiment of the optoelectronic semiconductor chip, the active region has traces of material removal on its upper side facing away from the carrier. That is, the core area of the active area is

for example, removed by a material-removing process. At least the core area then has traces of this material removal. For example, the removal of material may be an etching, a chemical-mechanical Polishing (CPM) or sawing. The technique used for material removal produces characteristic traces in the

Material of the active area, which can be detected on the finished component as traces of material removal.

It is possible that due to the material removal, so the tracks, the area of the core area, the for a

Contacting through the contact layer is available is increased. For example, the side of the core region facing away from the carrier has a faceting or a roughening which increases the contact surface with respect to a flat surface. In this way, a lower contact resistance is possible. An optoelectronic semiconductor chip described here is characterized among others by the following advantages:

The semiconductor chip can be produced particularly cost-effectively, since the number of required process steps and processes for the production of the optoelectronic

Semiconductor chips with three-dimensional crystal structures, for example, three-dimensional core-shell structures, is possible. Furthermore, the contacting of the three-dimensional crystal structures can be carried out by standardized processes, since the contacting itself no dissolution in the

Nanometer range needed, but by means of a

Contact layer is possible, which extends over all active areas. Since no planar epitaxial structure is required for the generation of the active regions described here, unusual and / or large-area ones can also be used

Foreign substrates are grown epitaxially. In particular, electrically insulating growth substrates can be used come. Furthermore, it is also possible to use GaN-based semiconductor material which is grown in the N-face direction as semiconductor material. Differences in the length of the active

Areas in the direction of the main extension direction can be compensated by a planarization step, without affecting the properties of the p-type region used for the contact to the p-side. However, it is also possible to dispense with a planarization in order to utilize the available active area of each active area particularly efficiently.

Below are described optoelectronic

Semiconductor chips and method for its production in

Connection with exemplary embodiments and the associated figures explained in more detail.

In connection with the figures 1A to IG are based on

schematic sectional views

Process steps for producing an embodiment of an optoelectronic semiconductor chip described here explained in more detail.

Connection with Figures 2A to 2H are based on

schematic sectional views

Process steps for producing another

Embodiment of an optoelectronic semiconductor chip described here explained in more detail.

Connection with Figures 3A to 3F are based on

schematic sectional views

Process steps for producing a

Embodiment of another here described optoelectronic semiconductor chips in more detail.

In conjunction with Figures 4A to 4C are based

schematic sectional views

Process steps for producing a further embodiment of an optoelectronic semiconductor chip described here explained in more detail. The same, similar or equivalent elements are provided in the figures with the same reference numerals. The figures and the proportions in the figures

Elements shown with each other are not as

to scale. Rather, individual elements for better presentation and / or for better

Comprehensibility must be exaggerated.

In connection with the figures 1A to IG are based on

schematic sectional views of process steps for the production of an optoelectronic described here

Semiconductor chips explained in more detail. The schematic

Sectional views of Figures 1F and IG show

Embodiments of described here

optoelectronic semiconductor chips.

According to FIG. 1A, initially a carrier 2, which is, for example, a radiation-transmissive,

electrically insulating growth substrate such as sapphire or glass, provided with a mask layer 5. On the

Mask layer 5, the active areas 1 are grown.

In the present case, each active region has, for example, the shape of a cylinder. Each active area 1 extends along the main extension direction R. The active regions 1 are arranged, for example, at the lattice points of a regular lattice, in the present example a triangular lattice.

Each of the active regions 1 comprises a core region 10. In the present case, the core region 10 is formed with an n-doped GaN-based first semiconductor material. The core region 10 also has the shape of a cylinder. The

The lateral surface of this cylinder is completely covered by the active layer 11, in which, for example, electromagnetic radiation is generated during operation of the optoelectronic semiconductor chip. Also, the side facing away from the carrier 2 of the core portion 10 is initially covered with material of the active layer 11.

The active layer 11 has the shape of a hollow cylinder, the inner surface is completely with the first

Semiconductor material of the core portion 10 is covered. The

Outer surface of the active layer 11 is completely covered by a cover layer 12, which in the embodiment of Figure 1 with a p-doped GaN-based second

Semiconductor material may be formed. In the subsequent method step, FIG. 1B, the outer surface of the covering layer 12 facing away from the active layer 11 is completely covered by the current spreading layer 13. The current spreading layer 13 is transparent to electromagnetic radiation generated in the active layer 11 and is made of, for example, a TCO material such as ITO. Alternatively, it is also possible that the cover layer 12 with a

in particular radiation-reflecting contact material, For example, a metal such as silver and / or aluminum is covered as Stromweitweitungsschicht 13.

Furthermore, it is possible that the current spreading layer 13 fills the intermediate regions between the core regions 10. In this case, the current spreading layer 13 is therefore not a thin layer, in particular of uniform thickness

formed, but it forms a filler between the core areas.

In a subsequent method step, FIG. 1C, the interstices between the active regions 1 are filled with an insulating material 4. The insulating material 4 completely covers the active areas 1 even on its side facing away from the carrier 2. The

Insulating material 4 may directly adjoin the outer surface of the current spreading layer 13 of each active region 1 facing away from the core region 10. The insulating material 4 is preferably designed to be permeable to electromagnetic radiation generated in the active layer 11 and to be electrically insulating. For example, the insulating material 4 is made of silicon dioxide. The insulating material 4 can

be applied for example by spin coating, vapor deposition, sputtering, ALD or CVD. Optionally, the spaces between the active ones

Areas 1 are also filled with a functional material, for example, for ESD protection of the

optoelectronic semiconductor chip is used or generated in the active zone electromagnetic radiation in

converted electromagnetic radiation of a different wavelength. The functional material may be so also be a material comprising at least one luminescent zenzkonversionsstoff.

Subsequently, Figure 1D, carried out a planarization, for example by means of chemical-mechanical polishing or a

dry chemical process. In the case of planarization, in the present case the current spreading layer 13, the cover layer 12 and the active layer 11 are removed on the side of each active region 1 facing away from the carrier 2. That is, the core region 10 of each active region is exposed. The core region 10 of each active region has on its side facing away from the carrier 2 traces of

Material removal, so for example, the chemical ^¬ mechanical polishing or the dry chemical process.

Subsequently, FIG. 1C, passivations 3 for the cover layers 12 exposed at the edges of the active regions 1 are made, for example, by deactivating the p-doped layers

Cover layers produced by means of a hydrogen plasma.

In the present case, the current spreading layer 13 is also covered by the passivation on its side facing away from the carrier 2.

Due to the passivation 3 will be in the following

Contacting through the contact layer 6, compare the

1F or IG prevents contact between the contact layer 6 and the p-type region and the current spreading layer of each active region. In the case where the current spreading layer 13 is the

Fills intermediate regions between the core regions 10, the passivation 3 on the Stromaufweitungsschicht 13th run and covered in this way the areas between the core areas 10th

According to FIG. 1F, a full-area reflective contact layer is used for contacting. In this case, the electromagnetic radiation generated in the active regions 1 preferably passes through the carrier 2

decoupled. Alternatively, it is possible that the

Contact layer 6 comprises a dielectric mirror and an electrically conductive region. The electrically conductive region can, for example, with a

radiation-permeable, conductive oxide may be formed.

The contact layer 6 is electrically isolated from the current spreading layer 13 by the passivation 3.

In an alternative embodiment, compare the figure IG, the contact layer 6 with a

radiation-transmissive, conductive material, such as a TCO material such as ITO formed. The decoupling of electromagnetic radiation is then also possible, for example, by the side of the contact layer 6 facing away from the carrier 2. It can be generated in this way a volume emitter. In order to improve the decoupling, the side of the contact layer 6 facing away from the carrier 2 may contain roughenings which reduce the probability of total reflection.

A contact can, as in Figures 1F and IG

indicated, made from the side or from the side facing away from the carrier 2 of the contact layer 6 ago. FIGS. 2A to 21 show a further method for

Production of an optoelectronic device described here

Semiconductor chips explained in more detail. In conjunction with the

FIGS. 2H and 21 describe exemplary embodiments of an optoelectronic semiconductor chip described here with reference to sectional representations.

In contrast to the exemplary embodiment described in conjunction with FIGS. 1A to 1C, the insulating material 4 is etched back in the exemplary embodiment of FIG. 2 until the active regions 1 are exposed again on the side of the insulating material 4 facing away from the carrier 2, compare FIG. 2D. Alternatively, it is possible that filling with the insulating material 4 in step 2C does not take place beyond the side of the active regions 1 facing away from the carrier 2, but only filling takes place up to a certain filling height, which is surmounted by the active regions 1 , Subsequently, the tip of each active region 1 is wet-chemically removed, for example by hot KOH etching. This leads, due to the crystal structure of the

For example, the upper sides 1b of the active regions 1 in the area of the... 1 face, for a faceting and thus to an enlarged contact area at the core region 10 of each active region

Core area after the wet chemical process each have a pyramidal tip on. In process step 2F, the generation of passivations 3 takes place again, either as described above

Passivation of the p-type semiconductor material or by re-applying insulating material 4 (see Figures 2F and 2G). In the following, FIGS. 2H and 21, contacting takes place by means of contact layers as already explained in connection with FIGS. 1F and 1G.

Due to the increased contact surface due to the faceting, particularly high-density current can be injected into each core region.

In connection with FIGS. 3A to 3F, another method for the production of one described here is

Optoelectronic semiconductor chips explained in more detail. In this method, no planarization step takes place, that is, the length of the active regions 1 is not adapted to one another. In this way, the naturally occurring different lengths of the individual active areas are used, that is, there is an efficient use of the largest possible part of the active layer 11 of each active area 1. In step 3c, therefore, takes place in contrast to the method described above the

Applying an insulating material 4 not in one

over-shaping manner, but as a thin layer higher

Conformity, for example by an ALD method. In addition, a layer of further insulating material 7 can be introduced between the active regions, which comprise the active ones

Areas 1 in the main extension direction R is not surmounted. Subsequently, compare the figure 3E, the

Insulating material 4, 7 removed by etching. Due to the increased thickness of the insulating material between the active areas 1, the core areas 10 can be exposed on the upper sides 1b of the active areas 1, without the

Passivierungsmaterial 7 between the active areas 1 is completely removed. Alternatively, it would be conceivable that is etched at the tops of the active areas lb with increased etch rate. In any case, the core region 10 of each active region 1 at the carrier 2

facing away from the top lb exposed.

The exposure is carried out by dry chemical or

wet-chemical processes, for example by plasma etching, for example with ICP RIE (Inductively Coupled Plasma Reactive Ion Etching), or KOH, which in addition to a faceting and thus an increased contact area in the area of

Core area 10 of each active area 1 can lead.

Subsequently, the production of a passivation 3 as described for example in connection with the figures 2F or 2G.

Finally, a contact layer 6 is applied to the side facing away from the carrier 2 side of the active regions 1, which may be formed planarizing. The contact layer 6 may be formed as described above radiation permeable or radiation-reflecting.

A further exemplary embodiment of a method described here is shown in conjunction with FIGS. 4A to 4C, which can be used as a modification to the methods described above. FIG. 4C shows a correspondingly produced optoelectronic semiconductor chip in a schematic sectional illustration. In contrast to the methods described above, in this embodiment, the current spreading layer 13 is not applied directly to the mask layer 5, but before the application of the current spreading layer 13, the stumps of the active regions 1 are passivated with an insulating material 4. The insulating material 4 can be applied for example by a spin-coating process. The active areas 1 project beyond the insulation material 4 in FIG

Direction of the main extension direction R (see Figure 4B). Subsequently, further processing takes place, for example, as described in connection with FIGS. 1B to 1G. The passivation at the stump leads to an optoelectronic semiconductor chip, in which the

Probability of the occurrence of leakage currents is reduced.

The invention is not limited by the description based on the embodiments of these. Rather, the invention encompasses every new feature as well as every combination of features, which in particular includes any combination of features in the patent claims, even if this feature or combination itself is not explicitly incorporated in the claims

Claims or embodiments is given.

This patent application claims the priority of German Patent Application 102012101718.2, the disclosure of which is hereby incorporated by reference.

Claims

Optoelectronic semiconductor chip with:

- At least one active areas (1), in particular a plurality of active areas (1) which are spaced from each other, and

- A support (2) which is arranged on a lower side (la) of the active regions (1), wherein

- One of the active areas (1) one

Main extension direction (R),

the active region (1) has a core region (10)

comprises, which is formed with a first semiconductor material,

- The active region (1) has an active layer (11), the core region (10) at least in

Directions (x, y) across the main extension direction (R) of the active region (1) covered, and

- The active region (1) has a cover layer (12) which is formed with a second semiconductor material and the active layer (11) at least in directions (x, y) transverse to the main extension direction (R) of the active region (11).

Optoelectronic semiconductor chip according to one of

previous claims,

with a variety of active areas (1), where

- At the carrier (2) facing away from the top (lb) of each active region (1), the core region (10) of the active region (1) is free of the active layer

(11) and with an electrically conductive contact layer

(6) is in direct contact, and the contact layer (6) is in direct contact with the core regions (10) of at least a majority or of all active regions (1) and extends in places in a plane parallel or substantially parallel to that of the plurality of active regions (1). facing outer surface (2a) of the carrier extends.

Optoelectronic semiconductor chip according to one of

previous claims,

in which at least the first semiconductor material

epitaxially deposited on the carrier (2).

Optoelectronic semiconductor chip according to the preceding claim,

in which a growth direction (z) of the first

Semiconductor material is parallel or substantially parallel to the main extension direction (R).

Optoelectronic semiconductor chip according to one of

previous claims,

in which the active region (1) has a length (L) which is determined in the main extension direction (R), and the active region (1) has a diameter (D) which is in a plane perpendicular to the plane

Main extension direction (R) is determined, wherein the ratio of length (L) to diameter (D) is at least 1.

Optoelectronic semiconductor chip according to one of

previous claims,

in which the active area (1) a

Current spreading layer (13) comprising the Covering layer (12) at least in directions (x, y) transversely to the main extension direction (R) covered.

7. Optoelectronic semiconductor chip according to the preceding claim,

in which the current spreading layer (13) is transparent to electromagnetic radiation generated in operation in the active layer (11) and in particular is formed with a transparent conductive oxide.

8. Optoelectronic semiconductor chip according to one of the two preceding claims,

wherein the current spreading layer (13) extends over at least a major portion of the length (L) of the active

Area (1) extends.

9. Optoelectronic semiconductor chip according to one of

previous claims,

in which an insulating material (4) is arranged between the plurality of active regions (1), wherein the

Insulation material (4) the active areas (1)

at least in directions (x, y) across

Main extension direction (R) surrounds.

10. Optoelectronic semiconductor chip according to the preceding claim,

in which the insulation material (4) at least

in places directly to the outer surface of the active

Area, in particular the StromaufWeitungsschicht (13) borders. Optoelectronic semiconductor chip according to one of

previous claims,

in which at the plurality of active areas (1)

a mask layer (5) is arranged facing the side of the carrier, wherein the mask layer (5) for each of the active regions (1) has an opening (5a) to the support (2), which is penetrated by the first semiconductor material. 12. Optoelectronic semiconductor chip according to the preceding claim,

in which the mask layer (5) locally directly adjoins the insulating material (4).

Optoelectronic semiconductor chip according to one of

previous claims,

in which the core region (10) is free from the active layer (11) and in direct contact with an electrically conductive contact layer (6) on the upper side (1b) of the active region (1) facing away from the carrier (2).

Optoelectronic semiconductor chip according to the preceding claim,

in which the contact layer (6) is in direct contact with the core regions (10) of at least a large part, in particular of all active regions (1), and extends in places in a plane parallel or substantially parallel to that of the plurality of active regions ( 1) facing outer surface (2a) of the carrier extends.

15. Optoelectronic semiconductor chip according to one of

previous claims,

wherein a functional material is disposed between the plurality of active regions (1), wherein the

functional material surrounds the active regions (1) at least in directions (x, y) transversely to the main extension direction (R) and the functional material comprises at least one luminescence conversion substance and / or at least one ESD protection material.

16. Optoelectronic semiconductor chip according to one of

previous claims,

in which the active region (1) has traces of material removal on its upper side (1b) facing away from the carrier (2).