WO2020035413A1

WO2020035413A1 - Optoelectronic semiconductor component having a carrier element comprising an electrically conductive material

Info

Publication number: WO2020035413A1
Application number: PCT/EP2019/071446
Authority: WO
Inventors: Christian LEIRER
Original assignee: Osram Oled Gmbh
Priority date: 2018-08-14
Filing date: 2019-08-09
Publication date: 2020-02-20
Also published as: DE102018119734A1

Abstract

An optoelectronic semiconductor component (10) comprises an optoelectronic semiconductor chip (15) suitable for emitting electromagnetic radiation (20) and having a first semiconductor layer (120) of a first conductivity type, a second semiconductor layer (130) of a second conductivity type, and also a first current distribution layer (125). In this case, the first semiconductor layer (120) is arranged on a side facing away from a first main surface (145) of the second semiconductor layer (130). Electromagnetic radiation (20) emitted by the optoelectronic semiconductor chip (15) is output via the first main surface (145) of the second semiconductor layer (130). The first current distribution layer (125) is arranged on the side of a first main surface (144) of the first semiconductor layer (120). The optoelectronic semiconductor component furthermore has a carrier element (135), which comprises an electrically conductive material (132), is arranged on a side of the first main surface (144) of the first semiconductor layer (120) and extends in a vertical direction along an edge of the optoelectronic semiconductor chip (15). The electrically conductive material (132) is connected to the second semiconductor layer (130).

Description

OPTOELECTRONIC SEMICONDUCTOR COMPONENT WITH ONE

SUPPORT ELEMENT, WHICH IS AN ELECTRICALLY CONDUCTIVE MATERIAL

INCLUDES

This patent application claims the priority of German patent application DE 10 2018 119 734.9, the disclosure content of which is hereby incorporated by reference.

A light emitting diode (LED) is a light emitting device based on semiconductor materials. For example, an LED includes a pn junction. If electrons and holes recombine with one another in the region of the pn junction, for example because a corresponding voltage is applied, electromagnetic radiation is generated.

In general, new concepts are sought with which, as miniaturization of the optoelectronic semiconductor components continues, an electrical contacting of the semiconductor layers can be improved and at the same time the efficiency of the optoelectronic semiconductor component is not impaired.

The present invention has for its object to provide an improved optoelectronic semiconductor component.

According to the present invention, the object is achieved by the subject matter and the method of the independent claims. Advantageous further developments are defined in the dependent patent claims.

An optoelectronic semiconductor component comprises an optoelectronic semiconductor chip which is suitable for emitting electromagnetic radiation and a first semiconductor Layer of a first conductivity type, a second semiconductor layer of a second conductivity type and a first current distribution layer. The first semiconductor layer is arranged on a side facing away from a first main surface of the second semiconductor layer. Electromagnetic radiation emitted by the optoelectronic semiconductor chip is emitted via the first main surface of the second semiconductor layer. The first current distribution layer is arranged on the side of a first main surface of the first semiconductor layer. The optoelectronic semiconductor component furthermore has a carrier element which comprises an electrically conductive material, is arranged on a side of the first main surface of the first semiconductor layer and extends in the vertical direction along an edge of the optoelectronic semiconductor chip. The electrically conductive material is connected to the second semiconductor layer.

The optoelectronic semiconductor component can furthermore have a transparent conductive layer over the first main surface of the second semiconductor layer, the transparent conductive layer being connected to the electrically conductive material of the carrier element and the second semiconductor layer. For example, the transparent conductive layer can be formed over the entire surface of the second semiconductor layer. For example, a surface of the transparent conductive layer can be roughened.

The optoelectronic semiconductor component can furthermore have a second current distribution structure which is arranged above the first main surface of the second semiconductor layer and is connected to the second semiconductor layer and the electrically conductive material of the carrier element. For example, the second power distribution structure can consist of one transparent material. According to further embodiments, the second current distribution structure can consist of an opaque material. The optoelectronic semiconductor component can furthermore have a metallic mirror layer which is arranged between the second semiconductor layer and the first current distribution layer.

According to further embodiments, the optoelectronic semiconductor component comprises a first contact element which is connected to the first current distribution layer, and a second contact element which is connected to the conductive material of the carrier element, the first and the second contact element in each case on one side of the first main surface the first semiconductor layer are arranged.

The optoelectronic semiconductor component can furthermore have a mold material between the first and the second contact element. For example, the first contact element is arranged within an opening arranged in the carrier element. The first and the second semiconductor layer can each contain GaN. For example, the first conductivity type can be p-type and the second conductivity type can be n-type. The carrier element can consist of conductive material. A horizontal dimension of the semiconductor chip can be less than 100 μm.

A method for producing an optoelectronic semiconductor component comprises forming a second semiconductor layer of a second conductivity type and a first semiconductor layer of a first conductivity type over a growth substrate, the second semiconductor layer being arranged on a side facing away from a first main surface of the first semiconductor layer and a first main surface of the second semiconductor layer on the Side of the growth substrate is arranged. The method further comprises forming a first current distribution layer over that of the first semiconductor layer, forming a carrier element, which comprises an electrically conductive material, on one side of the first main surface of the first semiconductor layer, the carrier element extending in a vertical direction along one Edge of the first semiconductor layer extends and the electrically conductive material is connected to the second semiconductor layer and the detachment of the growth substrate after forming the carrier element.

The method may further include forming a first contact element in electrical contact with the first current distribution layer and forming a second contact element in electrical contact with the conductive material of the support member, the first and second contact members each on one side of the first Main surface of the first semiconductor layer are arranged.

The method may further comprise forming a molding material between the first contact element and the second contact element, the molding material being formed before the growth substrate is detached. The method may further comprise forming a transparent conductive layer over the first main surface of the second semiconductor layer, the transparent conductive layer being connected to the electrically conductive material of the carrier element and the second semiconductor layer.

The accompanying drawings serve to understand exemplary embodiments of the invention. The drawings illustrate exemplary embodiments and, together with the description, serve to explain them. Further exemplary embodiments and numerous of the intended advantages result directly bar from the following detailed description. The elements and structures shown in the drawings are not necessarily drawn to scale with respect to one another. The same reference numerals refer to the same or corresponding elements and structures.

FIG. 1A shows a schematic cross-sectional view of an optoelectronic semiconductor component in accordance with embodiments.

FIG. 1B shows a schematic plan view of a part of the optoelectronic semiconductor component.

FIG. IC shows a schematic cross-sectional view of an optoelectronic semiconductor component in accordance with further embodiments.

FIG. 2A shows a schematic cross-sectional view of part of an optoelectronic semiconductor component in accordance with embodiments.

FIG. 2B shows a schematic plan view of a part of an optoelectronic semiconductor component.

FIG. 3A shows a schematic cross-sectional view of part of an optoelectronic semiconductor component in accordance with embodiments.

FIG. 3B shows a schematic plan view of a part of an optoelectronic semiconductor component.

FIG. 4A shows a workpiece in the production of the described optoelectronic semiconductor component. FIG. 4B summarizes a method of manufacturing an optoelectronic semiconductor device.

In the following detailed description, reference is made to the accompanying drawings, which form a part of the disclosure and in which specific exemplary embodiments are shown for purposes of illustration. In this context, directional terminology such as "top", "bottom", "front", "back", "over", "on", "in front", "behind", "front", "back" etc. is opened the orientation of the fi gures just described related. Since the components of the exemplary embodiments can be positioned in different orientations, the directional terminology is only used for explanation and is in no way restrictive.

The description of the exemplary embodiments is not restrictive, since other exemplary embodiments also exist and structural or logical changes can be made without deviating from the range defined by the claims. In particular, elements of exemplary embodiments described below can be combined with elements of other exemplary embodiments described, unless the context provides otherwise.

The terms "wafer" or "semiconductor substrate" used in the following description may include any semiconductor-based structure that has a semiconductor surface. Wafers and structures are to be understood to include doped and undoped semiconductors, epitaxial semiconductor layers, optionally supported by a base, and other semiconductor structures. For example, a layer of a first semiconductor material on a growth substrate made of a second semiconductor material or of an insulating material, for example Sapphire, have grown. Depending on the intended use, the semiconductor can be based on a direct or an indirect semiconductor material. Examples of semiconductor materials which are particularly suitable for generating electromagnetic radiation include, in particular, nitride semiconductor compounds, by means of which, for example, ultraviolet, blue or longer wavelength light can be generated, such as, for example, GaN, InGaN, A1N, AlGaN, AlGalnN, phosphide semiconductor compounds, by means of, for example green or longer-wave light can be generated, such as GaAsP, AlGalnP, GaP, Al-GaP, and other semiconductor materials such as AlGaAs, SiC, ZnSe, GaAs, ZnO, Ga2Cg, diamond, hexagonal BN and combinations of the materials mentioned. The stoichiometric ratio of the ternary compounds can vary. Other examples of semiconductor materials can include silicon, silicon germanium and germanium. In the context of the present description, the term “semiconductor” also includes organic semiconductor materials.

The terms “lateral” and “horizontal”, as used in this description, are intended to describe an orientation or alignment that runs essentially parallel to a first surface of a semiconductor substrate or semiconductor body. This can be the surface of a wafer or a die or a chip, for example.

The term "vertical", as used in this description, is intended to describe an orientation which is essentially perpendicular to the first surface of the semiconductor substrate or semiconductor body.

As far as the terms "have", "contain", "comprise", "have" and the like are used here, they are open terms that refer to the presence of said Indicate elements or features, but do not rule out the presence of further elements or features. The undefined articles and the certain articles include both the plural and the singular, unless the context clearly indicates otherwise.

In the context of this description, the term “electrically connected” means a low-resistance electrical connection between the connected elements. The electrically connected elements do not necessarily have to be connected directly to one another. Further elements can be arranged between electrically connected elements. The term “electrically connected "also includes tunnel contacts between the connected elements.

FIG. 1A shows a cross-sectional view through part of an optoelectronic semiconductor component 10. An optoelectronic semiconductor component 10 comprises an optoelectronic semiconductor chip 15 which is suitable for emitting electromagnetic radiation 20. The optoelectronic semiconductor chip 15 has a first semiconductor layer 120 of a first conductivity type, for example p-type, and a second semiconductor layer 130 of a second conductivity type, for example n-type. The optoelectronic semiconductor chip 15 also has a first current distribution layer 125 which is electrically connected to the first semiconductor layer 120. The first and second semiconductor layers 120, 130 are stacked one above the other. The first semiconductor layer 120 is arranged on a side facing away from a first main surface 145 of the second semiconductor layer 130. Electromagnetic radiation 20 emitted by the optoelectronic semiconductor chip 15 is output via the first main surface 145 of the second semiconductor layer 130. The first power distribution layer 125 is on the side the first main surface 144 of the first semiconductor layer 120.

The optoelectronic semiconductor component 10 also has a carrier element 135. The carrier element 135 comprises an electrically conductive material 132 and is arranged on one side of the first main surface 144 of the first semiconductor layer 120. The carrier element extends in the vertical direction along an edge of the optoelectronic semiconductor chip. The electrically conductive material 132 of the carrier element 135 is connected to the second semiconductor layer 130. For example, the carrier element 135 can consist entirely of one or more conductive materials. According to further embodiments, however, it can also be constructed from an insulating material and coated with one or more conductive layers. The carrier element 135 carries the semiconductor chip 15. The carrier element 135 extends along a side surface of the semiconductor chip 15 to a height of the second semiconductor layer 130. For example, an upper side of the carrier element 135 can be arranged in the vicinity of the first main surface 145 of the second semiconductor layer 130.

The electrically conductive material 132 of the carrier element 135 can be connected directly to the second semiconductor layer 130. According to further embodiments, connecting elements may provide electrical contact between the second semiconductor layer 130 and the conductive material of the carrier element 135. For example, such contact elements can provide electrical contact at the edge of the second semiconductor layer 130 with the electrically conductive material of the carrier element. According to further embodiments, the contact elements can also be formed by a current distribution structure or a transparent electrode layer can be realized.

This is explained with reference to FIG. 2A or 3A will be described in more detail. For example, an active region 115 can be arranged between the first and second semiconductor layers 120, 130. The active region 115 can have, for example, a pn junction, a double heterostructure, a single quantum well structure (SQW, single quantum well) or a multiple quantum well structure (MQW, multi quantum well) for generating radiation. The term "quantum well structure" has no significance with regard to the dimensionality of the quantization. It therefore includes, among other things, quantum wells, quantum wires and quantum dots, as well as any combination of these layers.

Furthermore, a mirror layer 124 can be provided between the first semiconductor layer and the first current distribution layer 125. For example, the mirror layer can contain silver or be made of silver or contain zinc oxide or be made of zinc oxide. For example, a mirror layer 124 made of silver can be completely enclosed by the first current distribution layer 125 and thus encapsulated, as a result of which a migration of silver ions, which could take place for example in the presence of moisture, is prevented or suppressed. An insulation layer 138 is arranged between the first power distribution layer 125 and the carrier element 135. For example, a first contact element 127 can be provided on the side of the semiconductor chip 15 facing away from the first main surface 145 of the second semiconductor layer 130 in order to contact the first current distribution layer 125. The first contact element 127 can be arranged within an opening formed in the carrier element 135. The first contact element 127 can be isolated by an insulation material 141 be electrically insulated from the carrier element 135. For example, the insulation material 141 can comprise silicon nitride, silicon oxide or a mixture of these materials. A contact layer 128, for example made of titanium, can be arranged between the insulation material 141 and the first contact element 127. For example, a first main surface 145 of the second semiconductor layer 130 can be roughened in order to provide an improved coupling-out efficiency of the semiconductor component.

In embodiments shown in FIG. 1A, the second semiconductor layer 130 is connected via the carrier element 135. Furthermore, the first semiconductor layer 120 can be connected to a suitable connection via the first current distribution layer 125 and the first contact element 127. In this way, it is possible to electrically connect the optoelectronic semiconductor component without using the active surface of the semiconductor chip 15, for example for contact feedthroughs or knotting, and thus not for an emission of electromagnetic radiation.

For example, a length d of the semiconductor chip can be less than 50 gm. According to further embodiments, the chip size d can be less than 40 gm or less than 10 pm. For example, the chip size d can be larger than 500 nm, for example larger than 1 pm. The chip size d can be measured in the lateral direction and, for example, correspond to the length of a side surface if the semiconductor chip is of a rectangular shape. Due to the small chip size d, it is possible to efficiently electrically connect the second semiconductor layer 130, even if the transverse conductivity of the semiconductor material used is not very large. For example, the first and second semiconductor layers 120, 130 can be a GaN contain semiconductor material. The carrier element 135 can for example be a nickel layer, for example with a layer thickness of more than 5 gm, for example more than 7 gm, for example 10 gm or more. For example, one or more intermediate layers 134 may be provided between the insulation layer 138 and the layer of conductive material 132. The intermediate layer 134 can be, for example, a growth-promoting seed layer, which can be conductive. For example, it can contain Ti2oPt2o and gold. Furthermore, an adhesion-promoting layer, for example made of titanium, can be provided between the intermediate layer 134 and the layer of conductive material 132, for example with a layer thickness of less than 50 nm. The term “carrier element 135” thus encompasses the conductive layers which are formed adjacent and largely conform to the layer of conductive material 132. The layers belonging to the carrier element 135 can in particular extend along the edge of the optoelectronic semiconductor chip 15. In particular, extend the conductive intermediate layer 134 or the electrically conductive material 132 of the carrier element along the edge of the optoelectronic semiconductor chip 15, for example to a height of the second semiconductor layer 1. The first semiconductor layer 120 can be separated from the conductive intermediate layer 134 or the electrically conductive via an insulation layer 138 Insulated material 132 of the carrier element The conductive intermediate layer 134 or the electrically conductive material 132 of the carrier element can be electrically connected to the second semiconductor layer at the edge of the optoelectronic semiconductor chip The conductive intermediate layer 134 is suitable, for example, for connecting the electrically conductive material 132 of the carrier element to the second semiconductor layer 130. FIG. 1B shows a plan view of the optoelectronic semiconductor component 10. As can be seen, the optoelectronic semiconductor chip 15 is surrounded in a ring by the carrier element 135 or the intermediate layer 134 of the carrier element 135. The shape of the optoelectronic semiconductor component 10 need not necessarily be square, but can take any shape. An exposed surface of the semiconductor chip 15 is the surface of the second semiconductor layer 130. The second semiconductor layer 130 is electrically conductively connected to the electrically conductive material 132 of the carrier element 135.

FIG. IC shows a cross-sectional view of part of an optoelectronic semiconductor component in accordance with further embodiments. The in FIG. IC shown optoelectronic semiconductor component comprises contact elements 127, 137. The first contact element 127 is electrically conductively connected to the first current distribution layer 125, optionally via the contact layer 128. Furthermore, the second contact element 137 is electrically conductively connected to the electrically conductive material of the carrier element 135, optionally via a further contact layer 133, which can be constructed, for example, from titanium. For example, the first and second contact elements 127, 137 can be realized by nickel or copper elements, for example with a layer thickness of more than 50 μm, for example approximately 100 μm. A first connection area 126 can be arranged on the exposed surface of the first contact element 127, and a second connection area 136 can be arranged on the exposed surface of the second contact element 137. The first and second connection areas 126, 136 can each be realized, for example, by a NiAu alloy with a layer thickness of less than 300 nm, for example less than 150 nm, for example more than 100 nm. An intermediate layer 139, for example made of an insulating material, may be arranged between the first current distribution layer 125 and the insulation layer 138.

Furthermore, the structure of semiconductor chip 15 and carrier element 135 and contact elements 127, 137 can also be molded in a suitable molding material or a casting compound 140. For example, the molding material 140 can contain a permanent photoresist material, silicone, epoxy resin or a mixture of these materials.

FIG. 2A shows a cross-sectional view of a semiconductor device according to further embodiments. In addition to those shown in FIG. 1A or IC illustrated elements, the optoelectronic semiconductor component additionally has a second current distribution structure 152 which is arranged above the first main surface 145 of the second semiconductor layer 130 and is electrically connected to the latter. For example, the second current distribution structure 152 may have been produced by depositing a conductive layer over the entire area and subsequently structuring it. A material of the second current distribution structure 152 can be transparent or opaque, for example. The width of the second current distribution structure 152 is dimensioned such that the second semiconductor layer 130 is shaded as little as possible. The second current distribution structure 152 is electrically connected to the electrically conductive material 132 of the carrier element 135. For example, the second current distribution structure 152 can be produced from a transparent conductive material, for example ITO (“indium tin oxide”) or indium zinc oxide.

FIG. 2B shows a schematic plan view of a part of the optoelectronic component. As can be seen, the second current distribution structure 152 may be formed in strips. The second current distribution structure 152 is arranged above the second semiconductor layer 130. The optoelectronic semiconductor chip 15 is surrounded by the carrier element 135, for example by the electrically conductive intermediate layer 134. The second current distribution structure 152 is connected to the layer of electrically conductive material 132 of the carrier element 135 via the intermediate layer 134.

FIG. 3A shows a cross-sectional view of an optoelectronic semiconductor component in accordance with further embodiments. Deviating from that in FIG. IC embodiment is here arranged over the first main surface 145 of the second semiconductor layer 130 over the entire surface, a transparent electrode layer 150. For example, the transparent electrode layer 150 can contain or consist of a transparent conductive oxide, for example ITO (“indium tin oxide”). The transparent electrode layer 150 can be connected to the electrically conductive material of the carrier element 135. For example, the transparent electrode layer 150 is connected to the electrically conductive intermediate layer 134 of the carrier element 135. A surface of the transparent electrode layer 150 can be roughened in order to increase the coupling-out efficiency of the optoelectronic component.

FIG. 3B shows a top view of the optoelectronic semiconductor component. The transparent electrode layer 150 is arranged over the entire surface above the surface of the semiconductor chip 15 and is electrically conductively connected to the electrically conductive material of the carrier element 135. For example, the carrier element 135 surrounds the optoelectronic semiconductor chip 15 in a ring. For example, the intermediate layer 134 can make electrical contact between the electrically conductive material of the carrier element 135 and the second Provide semiconductor layer 130. The provision of a transparent electrode layer 150 or a second current distribution structure made of an electrically conductive material is advantageous if the transverse conductivity of the second semiconductor layer 130 is not sufficient to ensure adequate contacting of the second semiconductor layer 130 in the entire area over the entire size of the semiconductor chip 15 provide.

Compared to a configuration in which contact elements are implemented as via contacts through the second semiconductor layer 130, more active area of the semiconductor chip 15 is available for generating electromagnetic radiation. Accordingly, the efficiency of the optoelectronic semiconductor device can be increased. Furthermore, a method for producing the optoelectronic semiconductor component can be greatly simplified.

FIG. 4A shows a workpiece in the production of the described optoelectronic semiconductor component 10. To produce the optoelectronic semiconductor component, the second semiconductor layer 130, optionally the active region 115 and the first semiconductor layer 120 are grown epitaxially on a suitable growth substrate 100, for example a sapphire substrate. The mirror layer 124 and the first current distribution layer 125 are formed over the grown layer stack. An insulation layer 138 is then applied over the resulting structure. The insulation layer 138 can comprise, for example, silicon oxide, silicon nitride, aluminum oxide with different stoichiometric ratios, mixtures of these dielectrics or other dielectric materials. The carrier element 135 is then formed. This can be done, for example, by applying an intermediate layer 134 and then applying a layer of conductive material 132. The intermediate layer 134 can be, for example, a growth-promoting inoculation layer that can be conductive. For example, it can contain Ti2oPt2o and gold. Furthermore, an adhesion-promoting layer, for example made of titanium, can be provided between the intermediate layer 134 and the layer made of conductive material 132. The conductive material 132 may contain nickel or consist of nickel and be electroplated. An opening for contacting the first current distribution layer 125 is then formed in the carrier element 135.

After application of an insulation material 141, which may contain silicon nitride and / or silicon oxide, for example, contact is made with the first current distribution layer 125 through the opening. Furthermore, the first and the second contact element 127, 137 are formed. For example, the first and second contact elements 127, 137 may contain nickel or copper or consist of these materials. The first and second contact elements 127, 137 can, for example, be grown electrically. Then the grown structure, while still on the growth substrate, is molded in using a suitable molding material. Examples of suitable molding processes include compression molding, transfer molding, hot pressing, casting or introducing a permanent photoresist material.

This is followed by a laser lift-off process to remove the growth substrate. After roughening the first main surface 145 of the second semiconductor layer 130, ie the emission surface, the wafer is bonded to a temporary carrier. The back is then ground back to a total layer thickness of less than 200 μm, for example approximately 120 μm. Then a metallization tion to form the first and second connection areas 126, 136 on the first and second contact elements 127, 137. Furthermore, the wafer is separated into individual LED chips.

FIG. 4B summarizes the described method. A method of manufacturing an optoelectronic semiconductor component (10) comprises forming (S100) a second semiconductor layer of a second conductivity type and a first semiconductor layer of a first conductivity type over a growth substrate, the second semiconductor layer on one of a first main surface of the is arranged on the side facing away from the first semiconductor layer and a first main surface of the second semiconductor layer is arranged on the side of the growth substrate. The method further includes forming (S110) a first current distribution layer over that of the first semiconductor layer and forming (S120) a carrier element comprising an electrically conductive material on one side of the first main surface of the first semiconductor layer, the carrier element extends in the vertical direction along an edge of the first semiconductor layer and the electrically conductive material is connected to the second semiconductor layer. The method also includes detaching (S140) the growth substrate after forming the support member.

According to embodiments, the method further comprises forming (S125) a first contact element in electrical contact with the first current distribution layer and forming a second contact element in electrical contact with the conductive material of the carrier element, the first and the second contact element in each case on one side of the first main surface the first semiconductor layer are arranged. The method may also form (S130) a Include molding material between the first contact element and the second contact element, wherein the molding material is formed prior to detaching the growth substrate. The method may further comprise forming (S145) a transparent conductive layer over the first main surface of the second semiconductor layer, the transparent conductive layer being connected to the electrically conductive material of the carrier element and the second semiconductor layer.

Although specific embodiments have been illustrated and described herein, those skilled in the art will recognize that the specific embodiments shown and described may be replaced by a variety of alternative and / or equivalent configurations without departing from the scope of the invention. The application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is limited only by the claims and their equivalents.

LIST OF REFERENCE NUMBERS

10 optoelectronic semiconductor component

15 optoelectronic semiconductor chip

100 growth substrate

115 active area

120 first semiconductor layer

124 mirror layer

125 first power distribution layer

126 first connection area

127 first contact element

128 contact layer

130 second semiconductor layer

132 conductive material

133 contact layer

134 intermediate layer

135 support element

136 second connection area

137 second contact element

138 insulation layer

139 intermediate layer

140 molding material

141 insulation material

144 first main surface of the first semiconductor layer

145 first main surface of the second semiconductor layer 150 transparent electrode layer

152 second power distribution structure

Claims

1. Optoelectronic semiconductor component (10) with an optoelectronic semiconductor chip (15) which is suitable for emitting electromagnetic radiation (20), and

a first semiconductor layer (120) of a first conductivity type;

a second semiconductor layer (130) of a second conductivity type, and

has a first current distribution layer (125) where at

the first semiconductor layer (120) is arranged on a side facing away from a first main surface (145) of the second semiconductor layer (130),

electromagnetic radiation (20) emitted by the optoelectronic semiconductor chip (15) is output via the first main surface (145) of the second semiconductor layer (130),

the first current distribution layer (125) is arranged on the side of a first main surface (144) of the first semiconductor layer (120),

wherein the optoelectronic semiconductor component further comprises a carrier element (135), which comprises an electrically conductive material (132), is arranged on one side of the first main surface (144) of the first semiconductor layer (120) and extends in the vertical direction along an edge of the extends optoelectronic semiconductor chips (15), the electrically conductive material being connected to the second semiconductor layer (130),

wherein the optoelectronic semiconductor component (10) also has a transparent conductive layer (150) over the first main surface (145) of the second semiconductor layer (130), the transparent conductive layer (150) with the electrically conductive material (132) of the carrier gerelements (135) and the second semiconductor layer (130) is connected.

2. Optoelectronic semiconductor component (10) according to claim 1, in which the transparent conductive layer (150) is formed over the entire surface of the second semiconductor layer (130).

3. Optoelectronic semiconductor component (10) according to claim 1 or 2, in which a surface of the transparent conductive layer (150) is roughened.

4. Optoelectronic semiconductor component (10) according to claim 1, further with a second current distribution structure (152) which is arranged over the first main surface (145) of the second semiconductor layer (130) and with the second semiconductor layer (130) and the electrically conductive material (132) of the carrier element (135) is connected.

5. Optoelectronic semiconductor component (10) according to claim 4, in which the second current distribution structure (152) consists of a transparent material.

6. Optoelectronic semiconductor component (10) according to claim 4, in which the second current distribution structure (152) consists of an opaque material.

7. The optoelectronic semiconductor component according to one of the preceding claims, further comprising a metallic mirror layer (124) which is arranged between the second semiconductor layer (120) and the first current distribution layer (125).

8. The optoelectronic semiconductor component (10) according to one of the preceding claims, further comprising a first contact telement (127) which is connected to the first current distribution layer (125), and a second contact element (137) which is connected to the conductive material (132) of the carrier element (135), wherein the first and the second contact element are each arranged on one side of the first main surface (144) of the first semiconductor layer (120).

9. Optoelectronic semiconductor component (10) according to claim 8, further with a mold material between the first and the second contact element (127, 137).

10. Optoelectronic semiconductor component (10) according to claim 8 or 9, in which the first contact element (127) is arranged within half of an opening arranged in the carrier element (135).

11. Optoelectronic semiconductor component (10) according to one of the preceding claims, in which the first and the second semiconductor layer (120, 130) each contain GaN.

12. Optoelectronic semiconductor component (10) according to one of the preceding claims, in which the first conductivity type is p-type and the second conductivity type is n-type.

13. Optoelectronic semiconductor component (10) according to one of the preceding claims, in which the carrier element (135) consists of conductive material.

14. Optoelectronic semiconductor component (10) according to one of the preceding claims, in which a horizontal dimension measurement of the semiconductor chip is less than 100 μm.

15. A method for producing an optoelectronic semiconductor component (10), comprising:

Forming (S100) a second semiconductor layer of a second conductivity type and a first semiconductor layer of a first conductivity type over a growth substrate, the second semiconductor layer being arranged on a side facing away from a first main surface of the first semiconductor layer and a first main surface of the second semiconductor layer is arranged on the side of the growth substrate;

Forming (S110) a first current distribution layer over that of the first semiconductor layer;

Forming (S120) a carrier element, which comprises an electrically conductive material, on one side of the first main surface of the first semiconductor layer, the electrically conductive material extending in the vertical direction along an edge of the first semiconductor layer and the electrically conductive material on the edge of the first half conductor layer is connected to the second semiconductor layer;

Forming (S145) a transparent conductive layer over the first main surface of the second semiconductor layer, the transparent conductive layer being connected to the electrically conductive material of the carrier element and the second semiconductor layer; and

Peeling (S140) the growth substrate after forming the support member.

16. The method of claim 15, further comprising

Forming (S125) a first contact element in electrical contact with the first current distribution layer and forming a second contact element in electrical contact with the conductive material of the carrier element, wherein the first and second contact elements are each arranged on one side of the first main surface of the first semiconductor layer.

17. The method of claim 16, further comprising

Forming (S130) a molding material between the first contact element and the second contact element, the molding material being formed before the growth substrate is detached.