EP2732544A1 - Procédé de régulation d'une tension au point milieu - Google Patents

Procédé de régulation d'une tension au point milieu

Info

Publication number
EP2732544A1
EP2732544A1 EP12745420.5A EP12745420A EP2732544A1 EP 2732544 A1 EP2732544 A1 EP 2732544A1 EP 12745420 A EP12745420 A EP 12745420A EP 2732544 A1 EP2732544 A1 EP 2732544A1
Authority
EP
European Patent Office
Prior art keywords
switching
voltage
voltages
edges
switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP12745420.5A
Other languages
German (de)
English (en)
Inventor
Michael SPRENGER
Rodrigo Alvarez
Steffen Bernet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technische Universitaet Dresden
Semikron GmbH and Co KG
Semikron Elektronik GmbH and Co KG
Original Assignee
Technische Universitaet Dresden
Semikron GmbH and Co KG
Semikron Elektronik GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Technische Universitaet Dresden, Semikron GmbH and Co KG, Semikron Elektronik GmbH and Co KG filed Critical Technische Universitaet Dresden
Publication of EP2732544A1 publication Critical patent/EP2732544A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches

Definitions

  • the invention relates to a method for controlling a midpoint voltage in a 3L-NPC VSC, which results from a difference of two or more DC link capacitor voltages and which as an input a switching voltage with ON and OFF edges for switching on and off of switches in the current paths of the 3L NPC VSC is provided.
  • a three-phase self-guided three-point converter with impressed DC voltage (3L-NPC VSC: Three Level Neutral Point Clamped Voltage Source Converter) has a large
  • a technical challenge of the topology is the shared DC link and the associated DC link
  • the control of the midpoint voltage is largely realized today by the modulation of the inverter.
  • the inverter For carrier-based modulation methods, the
  • Switching signal edges are added, for example, in "Deadtime Description Semikron Application Manual
  • Diode bridges can be found in the Siemens AG brochure "SINAMICS Drives, SINAMICS GM150, SINAMICS SM150
  • Symmetrization also be realized circuit technology.
  • the invention is therefore based on the object
  • the object is achieved in a method for center control of the type mentioned in that the DC link capacitor voltages are measured and from these measured voltages the
  • Midpoint voltage is determined that, depending on the position of the midpoint voltage, a time shift of the on and / or Ausschaltflanken of the switching voltage, wherein the amount and the direction of the displacement of the position of the midpoint voltage are dependent.
  • Switches ⁇ to T 4 four associated switching voltages Signal 1 to signal 4.
  • the transistors used as switches in the 3L-NPC VSC can be, for example, insulated gate bipolar transistor IGBTs.
  • the switching edges of the switching voltages can already be shifted in a first shift by a time difference which corresponds to a dead time, or can be generated without this first shift.
  • the DC link capacitor voltages of the 3L NPC VSCs are determined, whereby such an intermediate circuit capacitor voltage U D ci or U D c2 can also be composed of a plurality of partial voltages. From these DC link capacitor voltages is the
  • the switching edges of all switching signals are not changed. Only in the event that the switching signal does not include a dead time, for example, a first shift corresponding to a mean dead time will occur for all switch-on.
  • the switching edges of two switching signals are left unchanged in the case of four switching signals signal 1 to signal 4 and the switching edges of two switching signals in one
  • the shift depends in its magnitude and direction on the value of the midpoint voltage.
  • the switching voltages of the signals 1 and 3 of the transistors i and T 3 remain unaffected by the method, while the switching edges of the switching voltages of the signals 2 and 4 are shifted for the transistors T 2 and T 4 .
  • Displacement affects the switching periods of the transistors T 2 and T 4 and causes a change in the
  • the method can also be used in multi-level topologies.
  • Switching voltage by a predetermined average time difference, which corresponds to a dead time T D are shifted. If the on and / or off edges of the switching signals have been shifted by the time difference, the dead time T D necessary for avoiding a dynamic short circuit is already contained in the edges of the switching voltage. In the event that this first shift of the switching edges has not yet occurred, this is observed by the method and this
  • Switching voltage can only be limited to the switch-on edges.
  • the time shift of the switching voltage which is shifted by a predetermined mean time difference, on and / or off edges of the switching voltage, taking into account a minimum permissible
  • Dead time T D; m i n takes place.
  • the shift of the on and / or off edges can only be up to one in the direction of a reduction of the time difference, which corresponds to a reduction of the dead time Minimum permissible dead time T D; m i n , otherwise a dynamic short-circuit can no longer be safely avoided.
  • the shifting of the edges of a switching voltage in a 3L NPC VSC operating with four switches in the current paths, which are controlled by four switching voltages, is carried out in two switching voltages, which belong to switches operating in a complementary manner.
  • the 3L NPC VSC are four
  • Switches which are each operated in pairs complementary ( ⁇ and T 3 or T 2 and T 4 ) arranged. These are controlled by means of four switching voltages assigned to the switches. For regulation affects the present
  • the displacement of the on and / or off edges of the switching voltages takes place the same in all phases.
  • the method can be applied to both single-phase and two-phase, three-phase 3L NPC VSC.
  • the method does not limit the number of phases. In any case, the
  • Signals signal 1 and 3 for the transistors i and T 3 remain unaffected by the method and in all phases a shift of the switching edges of the switching voltages of the Signals 2 and 4 for the transistors T 2 and T 4 done.
  • the shift of the switching edges of the switching voltages takes place in all phases both with the same direction or
  • the provision of the switching voltage in an upstream step by means of a carrier-based modulation method, a space vector modulation method or by a method for the prediction of
  • Modulation method a space vector modulation method or a method for predicting pulse patterns, as are known in the art, are used. These methods can generate the switching signals without regard to the actual midpoint voltage. In this case, the regulation is carried out exclusively by means of the present method.
  • these methods can generate the switching signals in consideration of the midpoint voltage such that by means of a shift of the switching edges of the
  • an intermediate circuit voltage can also be composed of several partial voltages, these always being related to the midpoint voltage.
  • 1 is a circuit example of a prior art 3L NPC VSC
  • Fig. 2 is a voltage-time diagram with the temporal
  • FIG. 3a shows a three-phase circuit with 3L-NPC full bridge
  • FIG. 3b shows a two-phase circuit with 3L-NPC full bridge
  • Fig. 9 is a schematic representation of a closed
  • Control circuit of a center control by means of a PI controller according to the invention
  • FIG. 1 shows an embodiment of a
  • a switch-on process of one of these switches i to T 4 is always triggered delayed by a dead time T D.
  • the illustrated voltages U DC i and U DC2 at the capacitances Ci and C 2 are the DC link capacitor voltages
  • FIG. 2 shows the example by means of a
  • Carrier method generated from a carrier and a reference signal switching voltages of two complementary switches i and T 3 and the delayed by a time difference of the dead time T D switching signals i 'and T 3 ' directly the gate drive unit, which controls the gate terminals of the transistors i to T 4 be supplied.
  • the term "Signal 1" used in the description here corresponds to the
  • the "signal 3" is the representation for the switch T 3 or T 3 ⁇ belonging.
  • the object of the invention is the variation of
  • Midpoint potential means that the voltage U DC i rises above the capacitance Ci shown in FIG. 1 and the voltage U DC 2 drops above the capacitance C 2 .
  • a lowering means that voltage U D ci decreases and the voltage U D c2 increases.
  • Energy flow direction determination is achieved by influencing the locking times of the complementarily driven active switches of a phase of a 3L NPC VSCs.
  • Symmetrization of the midpoint potential of a 3L NPC VSC relates to both three-phase designs, as shown in Figure 3a, as well as two-phase versions of
  • Midpoint current i M can be controlled.
  • Conductor mid-point voltage u AM is shown in FIGS. 5, 6, 7 and 8 by way of example for sine-delta modulation.
  • the voltage U A M is the voltage between the nodes "A" and "M” as shown by way of example in FIG. 4 c.
  • an additional dead time can be added to a deadtime base value in order to reduce the dead time
  • the dead times i and T 3 are increased in an exemplary manner in a three-phase converter in all three phases, in order to increase the center-point current. In this way it is ensured that dead time changes do not affect the phase-to-phase voltages or the phase voltages. In contrast, the dead times of the transistors T 2 and T 4 are increased to lower the mid-point current. Since the two dead times according to the method always have the same value, i and T 3 are combined in pairs to form a common dead time T 13 . The same applies to T 2 and T 4 too
  • This minimum value represents the smallest possible dead time T D; min at which it is still ensured that no dynamic branch short-circuit arises.
  • An exemplary embodiment of a possible control is shown in FIG. 9 in the form of a principal
  • This controller for example, a
  • This regulator 2 receives an input voltage, which is determined from the difference U D ci - U D c2.
  • the input of the controller 2 is operated with analog values.
  • analog-to-digital conversion there is an analog-to-digital conversion.
  • all values are to be understood as digital values, thus a digital value is output both at the output of the controller 2 and at the outputs T 2, 4 and ⁇ ; 3 .
  • Transistors T 2 and T 4 are not in this case
  • Negating circuit 4 connected limiting circuits 3 "limit" cause only for manipulated variables greater than zero volts, a time difference to shift the switching edges the switching signals is generated.
  • the output signals for T 2 , 4 and i, 3 represent the

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

Le but de l'invention concernant un procédé de régulation d'une tension au point milieu est de fournir un procédé permettant de réaliser une régulation simplifiée au point milieu, de réduire le nombre de composants logiciels et matériels, et par conséquent de le mettre en œuvre à moindres coûts. A cet effet, les tensions des condensateurs des circuits intermédiaires sont mesurées et la tension au point milieu est calculée à partir de ces tensions mesurées, les flancs de mise en circuit et/ou les flancs de mise hors circuit de la tension de commutation sont décalés dans le temps en fonction de la position de la tension au point milieu, l'amplitude et le sens du décalage dépendant de la position de la tension de commutation.
EP12745420.5A 2011-07-12 2012-07-12 Procédé de régulation d'une tension au point milieu Withdrawn EP2732544A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102011079013 2011-07-12
PCT/EP2012/063699 WO2013007788A1 (fr) 2011-07-12 2012-07-12 Procédé de régulation d'une tension au point milieu

Publications (1)

Publication Number Publication Date
EP2732544A1 true EP2732544A1 (fr) 2014-05-21

Family

ID=46639985

Family Applications (1)

Application Number Title Priority Date Filing Date
EP12745420.5A Withdrawn EP2732544A1 (fr) 2011-07-12 2012-07-12 Procédé de régulation d'une tension au point milieu

Country Status (2)

Country Link
EP (1) EP2732544A1 (fr)
WO (1) WO2013007788A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013112264A1 (de) * 2013-11-07 2015-05-07 Semikron Elektronik Gmbh & Co. Kg Ansteuersystem zur Ansteuerung von Brückenschaltungen mit symmetrisch geerdetem Zwischenkreis
DE102013112262A1 (de) 2013-11-07 2015-05-07 Semikron Elektronik Gmbh & Co. Kg Ansteuerschaltung für Drei-Level-Inverter
EP3076539A1 (fr) * 2015-04-01 2016-10-05 Siemens Aktiengesellschaft Modulation impulsion discontinu avec sur-modulation et réglage du point neutre dans un convertisseur trois-niveaux

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ZHOU JINGHUA ET AL: "A neutral-point potential control method for three-level inverters by injecting zero-sequence voltage", POWER ELECTRONICS FOR DISTRIBUTED GENERATION SYSTEMS (PEDG), 2010 2ND IEEE INTERNATIONAL SYMPOSIUM ON, IEEE, PISCATAWAY, NJ, USA, 16 June 2010 (2010-06-16), pages 309 - 313, XP031730449, ISBN: 978-1-4244-5669-7 *

Also Published As

Publication number Publication date
WO2013007788A1 (fr) 2013-01-17

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