EP2706829A2 - Printed wiring board, printed circuit board, and printed circuit board manufacturing method - Google Patents
Printed wiring board, printed circuit board, and printed circuit board manufacturing method Download PDFInfo
- Publication number
- EP2706829A2 EP2706829A2 EP13179343.2A EP13179343A EP2706829A2 EP 2706829 A2 EP2706829 A2 EP 2706829A2 EP 13179343 A EP13179343 A EP 13179343A EP 2706829 A2 EP2706829 A2 EP 2706829A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- pattern
- conductor
- conductive pattern
- surface layer
- semiconductor package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0207—Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/046—Surface mounting
- H05K13/0465—Surface mounting by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09772—Conductors directly under a component but not electrically connected to the component
Definitions
- the present invention relates to a printed wiring board having a semiconductor package including a heat sink mounted thereon, a printed circuit board including the printed wiring board, and a printed circuit board manufacturing method.
- a heat sink for dissipating generated heat is provided on a rear surface of a semiconductor package body. This is because, in recent years, as signal processing in a semiconductor package becomes faster, heat generated in the semiconductor package tends to increase, and it is necessary to efficiently dissipate heat in the semiconductor package.
- Japanese Patent Application Laid-Open No. 2006-80168 discloses a printed wiring board in which, for the purpose of efficiently dissipating heat generated in such a semiconductor package, a heat sink of the semiconductor package and a conductor pattern on a mounting surface of the printed wiring board are soldered.
- the conductor pattern on the mounting surface is required to be opposed to the heat sink of the semiconductor package and to be sized so as not to interfere with a pin of the semiconductor package. Further, an insulator used for the printed wiring board has a thermal conductivity which is lower than that of the conductor pattern, and thus, the conductor pattern is liable to store heat. Therefore, in Japanese Patent Application Laid-Open No. 2006-80168 , another conductor pattern for dissipating heat is provided on a surface opposite to the mounting surface of the printed wiring board, and through holes thermally connect the conductor pattern on the mounting surface and the conductor pattern on the opposite surface.
- the conductor pattern on the mounting surface is divided by a solder resist, and the through holes are arranged in a center area thereof which is not to be soldered.
- the solder resist is caused to function as a barrier to the molten solder in the reflow step in an attempt to prevent the solder from flowing in the through holes.
- the through holes are located so as to be opposed to the heat sink of the semiconductor package. Further, even after the reflow step is completed, residual heat remaining in the conductor pattern on the opposite surface tends to be conducted via the through holes to the conductor pattern on the mounting surface. As a result, the solder is melted by the residual heat conducted to the conductor pattern on the mounting surface, and when being pressed against the heat sink to flow, the solder crosses the solder resist and flows in the through holes. Therefore, the structure disclosed in Japanese Patent Application Laid-Open No. 2006-80168 cannot effectively eliminate poor soldering, and further improvement is required.
- a printed circuit board includes: a semiconductor package; a printed wiring board having the semiconductor package mounted on a first surface layer thereof, the printed wiring board including: a first conductor pattern formed in a region of the first surface layer on which the semiconductor package is to be mounted; a second conductor pattern placed in a second surface layer on a side opposite to the first surface layer; a first through hole piercing the first surface layer, an inner layer, and the second surface layer; a second through hole piercing the first surface layer, the inner layer, and the second surface layer; and a solder member placed between the semiconductor package and the printed wiring board, for joining a conductive member provided in the semiconductor package and the first conductor pattern together, in which: the first conductor pattern includes: a first plane-like conductive pattern; and a first pad-like conductive pattern which is surrounded by the first plane-like conductive pattern and is placed with a gap between the first pad-like conductive pattern and the first plane-like conductive pattern; the second conductor pattern includes:
- FIGS. 1A, 1B, 1C, and 1D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a first embodiment of the present invention.
- FIGS. 2A, 2B, and 2C are explanatory diagrams illustrating steps in a method of manufacturing the printed circuit board.
- FIGS. 3A, 3B, 3C, and 3D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a second embodiment of the present invention.
- FIGS. 4A, 4B, and 4C are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a third embodiment of the present invention.
- FIGS. 5A, 5B, and 5C are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a fourth embodiment of the present invention.
- FIGS. 6A, 6B, 6C, and 6D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a comparative example of the present invention.
- FIGS. 7A and 7B are explanatory diagrams illustrating steps in a method of manufacturing the printed circuit board according to the comparative example.
- FIGS. 1A to 1D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a first embodiment of the present invention.
- FIG. 1A is a sectional view of the printed circuit board
- FIG. 1B is a plan view of a first conductor pattern of a printed wiring board
- FIG. 1C is a plan view of an inner layer conductor pattern of the printed wiring board
- FIG. 1D is a plan view of a second conductor pattern of the printed wiring board.
- a printed circuit board 100 includes a printed wiring board 101 and a semiconductor package 102 mounted on the printed wiring board 101.
- the semiconductor package 102 is a QFP, QFN, or BGA semiconductor package.
- the semiconductor package 102 is illustrated as a QFP semiconductor package.
- the semiconductor package 102 includes a die 111 which is a semiconductor element and a heat source, a heat sink 112 which is thermally connected to the die 111, and leads 113 which are electrically connected to the die 111 through wires (not shown).
- the die 111, a part of the heat sink 112, and a part of the leads 113 are encapsulated with a mold resin 114.
- the printed wiring board 101 is a three-layer printed wiring board in which a surface layer 121 which is a first surface layer on which the semiconductor package 102 is mounted, a surface layer 122 which is a second surface layer on a side opposite to the surface layer 121, and an inner layer 123 between the surface layer 121 and the surface layer 122 are stacked with insulating layers therebetween. As the insulating layers, an insulator 137 is provided.
- the printed wiring board 101 includes a heat dissipation pattern 131 which is a first conductor pattern arranged in the surface layer 121, a heat dissipation pattern 132 which is a second conductor pattern arranged in the surface layer 122, and an inner layer conductor pattern 133 arranged in the inner layer 123.
- the printed wiring board 101 also includes a signal line pattern 134 which is arranged in the surface layer 121 and which is electrically connected to the leads 113 of the semiconductor package 102.
- the heat dissipation pattern 131 and the signal line pattern 134 are electrically insulated from each other by the insulator 137.
- These patterns 131, 132, 133, and 134 are formed of, for example, copper.
- the heat dissipation pattern 131 has a joint portion 131a which is placed in an opposed region R1 opposed to the heat sink 112 of the semiconductor package 102 and which is joined to the heat sink 112 with solder 103.
- the entire surface of the heat dissipation pattern 131 is the joint portion 131a.
- the joint portion 131a and the heat sink 112 are joined together with the solder 103.
- the outer periphery of the heat dissipation pattern 131 is surrounded by the leads 113 of the semiconductor package 102, and the heat dissipation pattern 131 is formed in a shape which is not brought into contact with the leads 113 (for example, a rectangular outer shape).
- the leads 113 of the semiconductor package 102 and the signal line pattern 134 are joined together with solder 104.
- the heat dissipation pattern 132 is a pattern having an area larger than that of the heat dissipation pattern 131.
- a through hole 141 as a first through hole and a through hole 142 as a second through hole are formed in the printed wiring board 101 to pierce the surface layer 121, the inner layer 123, and the surface layer 122.
- the through holes 141 and 142 are placed in the opposed region R1.
- a conductor film 151 as a first conductor film is provided on an inner wall of the through hole 141, while a conductor film 152 as a second conductor film is provided on an inner wall of the through hole 142.
- These conductor films 151 and 152 are formed of, for example, copper.
- the conductor film 151 is formed so as to extend from an end portion of the through hole 141 on the surface layer 121 side corresponding to the first surface layer side to an end portion of the through hole 141 on the surface layer 122 side corresponding to the second surface layer side.
- the conductor film 152 is formed so as to extend from an end portion of the through hole 142 on the surface layer 121 side to an end portion of the through hole 142 on the surface layer 122 side.
- the heat dissipation pattern 131 has, in the surface layer 121, a plane-like conductive pattern 161 (first plane-like conductive pattern) which is physically connected to the conductor film 151 in the through hole 141. Further, the heat dissipation pattern 131 has, in the surface layer 121, a pad-like conductive pattern 162 (first pad-like conductive pattern) which is physically connected to the conductor film 152 in the through hole 142. A clearance 163 is provided between the plane-like conductive pattern 161 and the pad-like conductive pattern 162, and the plane-like conductive pattern 161 and the pad-like conductive pattern 162 are not held in contact with each other in the surface layer 121.
- the pad-like conductive pattern 162 has an area smaller than that of the plane-like conductive pattern 161.
- the heat dissipation pattern 132 has, in the surface layer 122, a plane-like conductive pattern 171 (second plane-like conductive pattern) which is physically connected to the conductor film 152 in the through hole 142.
- the plane-like conductive pattern 171 is formed so as to extend beyond an outer peripheral region of the semiconductor package 102 when the printed circuit board 100 is seen from the semiconductor package 102 side.
- the heat dissipation pattern 132 has, in the surface layer 122, a pad-like conductive pattern 172 (second pad-like conductive pattern 172) which is physically connected to the conductor film 151 in the through hole 141.
- a clearance 173 is provided between the plane-like conductive pattern 171 and the pad-like conductive pattern 172, and the plane-like conductive pattern 171 and the pad-like conductive pattern 172 are not held in contact with each other in the surface layer 122.
- the pad-like conductive pattern 172 has an area smaller than that of the plane-like conductive pattern 171.
- the end portion of the conductor film 151 on the surface layer 121 side is physically connected in the surface layer 121 to the plane-like conductive pattern 161, and thus the conductor film 151 is electrically and thermally connected to the plane-like conductive pattern 161.
- a middle portion of the conductor film 151 is physically connected in the inner layer 123 to the inner layer conductor pattern 133, and thus the conductor film 151 is electrically and thermally connected to the inner layer conductor pattern 133.
- the end portion of the conductor film 151 on the surface layer 122 side is physically connected in the surface layer 122 to the pad-like conductive pattern 172, and thus the conductor film 151 is electrically and thermally connected to the pad-like conductive pattern 172.
- the end portion of the conductor film 152 on the surface layer 122 side is physically connected in the surface layer 122 to the plane-like conductive pattern 171, and thus the conductor film 152 is electrically and thermally connected to the plane-like conductive pattern 171.
- a middle portion of the conductor film 152 is physically connected in the inner layer 123 to the inner layer conductor pattern 133, and thus the conductor film 152 is electrically and thermally connected to the inner layer conductor pattern 133.
- the end portion of the conductor film 152 on the surface layer 121 side is physically connected in the surface layer 121 to the pad-like conductive pattern 162, and thus the conductor film 152 is electrically and thermally connected to the pad-like conductive pattern 162.
- the heat dissipation pattern 131 is formed in a pattern in which the plane-like conductive pattern 161 and the pad-like conductive pattern 162 are separated by the clearance 163, that is, a pattern in which the end portion of the conductor film 152 on the surface layer 121 side is separated. Further, the heat dissipation pattern 132 is formed in a pattern in which the plane-like conductive pattern 171 and the pad-like conductive pattern 172 are separated by the clearance 173, that is, a pattern in which the end portion of the conductor film 151 on the surface layer 122 side is separated.
- the end portion of the conductor film 151 in the through hole 141 on the surface layer 122 side is separated from the plane-like conductive pattern 171 by a gap, and hence, in the surface layer 122, heat in the plane-like conductive pattern 171 is less liable to be conducted to the end portion of the conductor film 151 on the surface layer 122 side.
- the end portion of the conductor film 152 in the through hole 142 on the surface layer 121 side is separated from the plane-like conductive pattern 161 by a gap, and hence, in the surface layer 121, heat in the conductor film 152 is less liable to be conducted to the plane-like conductive pattern 161.
- the clearances 163 and 173 As the clearances 163 and 173 become larger, the areas of the conductors of the printed wiring board 101 under the heat sink 112 become smaller, and the distance between the through hole 141 and the through hole 142 becomes larger. Therefore, as the clearances 163 and 173 become larger, the heat dissipation of the semiconductor package 102 during its operation is lowered. Therefore, it is desired that the clearances 163 and 173 have the width similar to the width of the signal line pattern 134.
- the conductor film 151 in the through hole 141 and the conductor film 152 in the through hole 142 be connected to each other via a solid pattern, and it is desired that the area of the solid pattern be as large as possible.
- the inner layer conductor pattern 133 is a conductor pattern placed in the inner layer 123, but it is preferred that the inner layer conductor pattern 133 be a solid conductor pattern.
- Exemplary solid conductor patterns include a power supply pattern to which a direct current power supply voltage is applied and a ground pattern to which a ground voltage (0 V) is applied.
- the inner layer conductor pattern 133 be any one of a power supply pattern and a ground pattern.
- the inner layer conductor pattern 133 is a ground pattern.
- the inner layer conductor pattern 133 is a ground pattern, and thus, it is not necessary to, for connection between the conductor film 151 and the conductor film 152, additionally provide a conductor pattern other than the ground pattern.
- the inner layer conductor pattern 133 is a power supply pattern, similarly, it is not necessary to additionally provide a conductor pattern.
- a ground terminal of the die 111 is electrically connected to the heat sink 112, and the heat sink 112 also serves as a ground terminal of the semiconductor package 102. Therefore, the heat sink 112 which is a ground terminal of the semiconductor package 102 is electrically connected to the inner layer conductor pattern 133 which is a ground pattern via the conductor film 151 in the through hole 141.
- a power supply terminal of the die 111 may be electrically connected to the heat sink 112 to cause the heat sink 112 to function as a power supply terminal of the semiconductor package 102. Also in this case, the heat sink 112 and the joint portion 131a may be joined together with the solder 103.
- FIGS. 2A to 2C are explanatory diagrams illustrating steps in the method of manufacturing the printed circuit board.
- FIG. 2A illustrates an application step
- FIG. 2B illustrates a mounting step
- FIG. 2C illustrates a reflow step.
- a solder paste 103A is applied to the joint portion 131a of the heat dissipation pattern 131 in the printed wiring board 101 (application step).
- a solder paste 104A is applied to portions corresponding to the leads 113 of the semiconductor package 102.
- the solder pastes 103A and 104A are applied to the surface layer 121 by screen printing using a mask (not shown).
- the semiconductor package 102 is mounted on the surface layer 121 (mounting step). At this time, the heat sink 112 of the semiconductor package 102 is brought into contact with the solder paste 103A, and at the same time, the leads 113 of the semiconductor package 102 are brought into contact with the solder paste 104A.
- the solder pastes 103A and 104A are heated under a state in which the heat sink 112 is held in contact with the solder paste 103A and the leads 113 are held in contact with the solder paste 104A (reflow step). This melts the solder pastes 103A and 104A. After the heating is completed, the joining together of the heat sink 112 and the joint portion 131a with the solder 103 is completed to obtain the printed circuit board 100. In the heating in the reflow step, the temperature of an outer peripheral surface of the printed circuit board 100 becomes higher than that of the inside thereof.
- the conductor film 151 in the through hole 141 and the conductor film 152 in the through hole 142 are connected to each other through the inner layer conductor pattern 133, and the thermal resistances of the conductor patterns 132 and 133 are higher than the thermal resistances of the conductor films 151 and 152 in the through holes and the thermal resistance to the outside air.
- FIGS. 6A to 6D are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the comparative example.
- FIG. 6A is a sectional view of the printed circuit board
- FIG. 6B is a plan view of a first conductor pattern of the printed wiring board
- FIG. 6C is a plan view of an inner layer conductor pattern of the printed wiring board
- FIG. 6D is a plan view of a second conductor pattern of the printed wiring board.
- a printed circuit board 1 is different from the printed circuit board 100 illustrated in FIGS. 1A to 1D in that the clearances 163 and 173 are not provided therein.
- a heat dissipation pattern 31 in the surface layer 121 is directly connected to the conductor films 151 and 152 in the respective through holes 141 and 142
- a heat dissipation pattern 32 in the surface layer 122 is directly connected to the conductor films 151 and 152 in the respective through holes 141 and 142.
- FIGS. 7A and 7B are explanatory diagrams illustrating steps in a method of manufacturing the printed circuit board according to the comparative example.
- FIG. 7A illustrates a mounting step and
- FIG. 7B illustrates a reflow step.
- a solder paste 3A fills the space between the heat sink 112 and the heat dissipation pattern 31.
- FIG. 7B the insides of the through holes 141 and 142 are heated by residual heat remaining in the heat dissipation pattern 32 to melt solder 3.
- the molten solder 3 flows in the through holes 141 and 142, and a soldered area between the heat sink 112 and the heat dissipation pattern 31 is reduced to cause poor soldering.
- the residual heat remaining in the plane-like conductive pattern 171 is conducted via the conductor film 152 in the through hole 142 to the pad-like conductive pattern 162.
- the heat is less liable to be conducted to the plane-like conductive pattern 161, and thus, the amount of the solder which is drawn in the through hole 142 can be reduced.
- the through holes 141 and 142 are placed in the opposed region R1, and thus, the through holes 141 and 142 are close to each other, and the thermal resistance in the inner layer conductor pattern 133 is lowered and heat can be efficiently dissipated from the semiconductor package 102.
- FIGS. 3A to 3D are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the second embodiment of the present invention.
- FIG. 3A is a sectional view of the printed circuit board
- FIG. 3B is a plan view of a first conductor pattern of the printed wiring board
- FIG. 3C is a plan view of an inner layer conductor pattern of the printed wiring board
- FIG. 3D is a plan view of a second conductor pattern of the printed wiring board.
- a printed circuit board 200 includes a printed wiring board 201 and a semiconductor package 102 which is similar to that according to the first embodiment and mounted on the printed wiring board 201.
- the printed wiring board 201 is a three-layer printed wiring board in which a surface layer 221 which is a first surface layer on which the semiconductor package 102 is mounted, a surface layer 222 which is a second surface layer on a side opposite to the surface layer 221, and an inner layer 223 between the surface layer 221 and the surface layer 222 are stacked with insulating layers therebetween. As the insulating layers, an insulator 237 is provided.
- the printed wiring board 201 includes a heat dissipation pattern 231 which is a first conductor pattern arranged in the surface layer 221, a heat dissipation pattern 232 which is a second conductor pattern arranged in the surface layer 222, and an inner layer conductor pattern 233 arranged in the inner layer 223.
- the printed wiring board 201 also includes a signal line pattern 234 which is arranged in the surface layer 221 and which is electrically connected to the leads 113 of the semiconductor package 102.
- the heat dissipation pattern 231 and the signal line pattern 234 are electrically insulated from each other by the insulator 237.
- These patterns 231, 232, 233, and 234 are formed of, for example, copper.
- the heat dissipation pattern 231 has a joint portion 231a which is placed in an opposed region R1 opposed to the heat sink 112 of the semiconductor package 102 and which is joined to the heat sink 112 with solder 203.
- the middle portion of the surface of the heat dissipation pattern 231 is the joint portion 231a.
- the joint portion 231a and the heat sink 112 are joined together with the solder 203.
- the outer periphery of the heat dissipation pattern 231 is surrounded by the leads 113 of the semiconductor package 102, and the heat dissipation pattern 231 is formed in a shape which is not brought into contact with the leads 113 (for example, a rectangular outer shape).
- the leads 113 of the semiconductor package 102 and the signal line pattern 234 are joined together with solder 204.
- the heat dissipation pattern 232 is a pattern having an area larger than that of the heat dissipation pattern 231.
- a through hole 241 as a first through hole, a through hole 242 as a second through hole, and through holes 243 and 244 as third through holes are formed in the printed wiring board 201 to pierce the surface layer 221, the inner layer 223, and the surface layer 222.
- a case in which one first through hole and one second through hole are formed and multiple third through holes are formed is described.
- a conductor film 251 as a first conductor film is provided on an inner wall of the through hole 241, while conductor films 252, 253, and 254 as second conductor films are provided on inner walls of the through holes 242, 243, and 244, respectively.
- These conductor films 251 to 254 are formed of, for example, copper.
- the conductor film 251 is formed so as to extend from an end portion of the through hole 241 on the surface layer 221 side corresponding to the first surface layer side to an end portion of the through hole 241 on the surface layer 222 side corresponding to the second surface layer side.
- the conductor film 252 is formed so as to extend from an end portion of the through hole 242 on the surface layer 221 side to an end portion of the through hole 242 on the surface layer 222 side.
- the conductor film 253 is formed so as to extend from an end portion of the through hole 243 on the surface layer 221 side to an end portion of the through hole 243 on the surface layer 222 side.
- the conductor film 254 is formed so as to extend from an end portion of the through hole 244 on the surface layer 221 side to an end portion of the through hole 244 on the surface layer 222 side.
- the heat dissipation pattern 231 has, in the surface layer 221, a solid conductor pattern 261 which is physically connected to the conductor films 251, 253, and 254 in the respective through holes 241, 243, and 244. Further, the heat dissipation pattern 231 has, in the surface layer 221, a conductor land 262 which is physically connected to the conductor film 252 in the through hole 242. A clearance 263 is provided between the conductor pattern 261 and the conductor land 262, and the conductor pattern 261 and the conductor land 262 are not held in contact with each other in the surface layer 221.
- the conductor land 262 has an area smaller than that of the conductor pattern 261.
- the heat dissipation pattern 232 has, in the surface layer 222, a solid conductor pattern 271 which is physically connected to the conductor films 252, 253, and 254 in the respective through holes 242, 243, and 244. Further, the heat dissipation pattern 232 has, in the surface layer 222, a conductor land 272 which is physically connected to the conductor film 251 in the through hole 241. A clearance 273 is provided between the conductor pattern 271 and the conductor land 272, and the conductor pattern 271 and the conductor land 272 are not held in contact with each other in the surface layer 222.
- the conductor land 272 has an area smaller than that of the conductor pattern 271.
- the end portion of the conductor film 251 on the surface layer 221 side is physically connected in the surface layer 221 to the conductor pattern 261, and thus the conductor film 251 is electrically and thermally connected to the conductor pattern 261.
- a middle portion of the conductor film 251 is physically connected in the inner layer 223 to the inner layer conductor pattern 233, and thus the conductor film 251 is electrically and thermally connected to the inner layer conductor pattern 233.
- the end portion of the conductor film 251 on the surface layer 222 side is physically connected in the surface layer 222 to the conductor land 272, and thus the conductor film 251 is electrically and thermally connected to the conductor land 272.
- the end portion of the conductor film 252 on the surface layer 222 side is physically connected in the surface layer 222 to the conductor pattern 271, and thus the conductor film 252 is electrically and thermally connected to the conductor pattern 271.
- a middle portion of the conductor film 252 is physically connected in the inner layer 223 to the inner layer conductor pattern 233, and thus the conductor film 252 is electrically and thermally connected to the inner layer conductor pattern 233.
- the end portion of the conductor film 252 on the surface layer 221 side is physically connected in the surface layer 221 to the conductor land 262, and thus the conductor film 252 is electrically and thermally connected to the conductor land 262.
- the heat dissipation pattern 231 is formed in a pattern in which the conductor pattern 261 and the conductor land 262 are separated by the clearance 263, that is, a pattern in which the end portion of the conductor film 252 on the surface layer 221 side is separated.
- the heat dissipation pattern 232 is formed in a pattern in which the conductor pattern 271 and the conductor land 272 are separated by the clearance 273, that is, a pattern in which the end portion of the conductor film 251 on the surface layer 222 side is separated.
- the end portion of the conductor film 251 in the through hole 241 on the surface layer 222 side is separated from the conductor pattern 271 by a gap, and, in the surface layer 222, heat in the conductor pattern 271 is less liable to be conducted to the end portion of the conductor film 251 on the surface layer 222 side.
- the end portion of the conductor film 252 in the through hole 242 on the surface layer 221 side is separated from the conductor pattern 261 by a gap, and, in the surface layer 221, heat in the conductor film 252 is less liable to be conducted to the conductor pattern 261.
- the through holes 241 and 242 are placed in the opposed region R1, and the through holes 243 and 244 are placed in a region R2 other than the opposed region. Therefore, in the application step in the manufacturing steps of the printed circuit board 200, a solder paste is applied onto the through holes 241 and 242, but a solder paste is not applied onto the through holes 243 and 244.
- the possibility that the solder paste is drawn in the through holes 243 and 244 is low, and thus, both ends of the conductor films 253 and 254 in the respective through holes 243 and 244 are connected to the conductor patterns 261 and 271, respectively.
- the conductor films 251 to 254 in the respective through holes 241 to 244 be connected to one another via a solid pattern, and it is desired that the area of the solid pattern be as large as possible.
- the inner layer conductor pattern 233 is a conductor pattern placed in the inner layer 223, but it is preferred that the inner layer conductor pattern 233 be a solid conductor pattern.
- Exemplary solid conductor patterns include a power supply pattern to which a direct current power supply voltage is applied and a ground pattern to which a ground voltage (0 V) is applied. It is preferred that the inner layer conductor pattern 233 be any one of a power supply pattern and a ground pattern.
- the inner layer conductor pattern 233 is a ground pattern.
- the inner layer conductor pattern 233 is a ground pattern, and thus, it is not necessary to, for connection among the conductor films 251 to 254, additionally provide a conductor pattern other than the ground pattern.
- the inner layer conductor pattern 233 is a power supply pattern, similarly, it is not necessary to additionally provide a conductor pattern.
- a ground terminal of the die 111 is electrically connected to the heat sink 112, and the heat sink 112 also serves as a ground terminal of the semiconductor package 102. Therefore, the heat sink 112 which is a ground terminal of the semiconductor package 102 is electrically connected to the inner layer conductor pattern 233 which is a ground pattern via the conductor film 251 in the through hole 241.
- a power supply terminal of the die 111 may be electrically connected to the heat sink 112 to cause the heat sink 112 to function as a power supply terminal of the semiconductor package 102. Also in this case, the heat sink 112 and the joint portion 231a may be joined together with the solder 203.
- the residual heat remaining in the conductor pattern 271 is conducted via the conductor film 252 in the through hole 242 to the conductor land 262, but, due to the presence of the clearance 263, the heat is less liable to be conducted to the conductor pattern 261, and thus, the amount of the solder which is drawn in the through hole 242 can be reduced.
- steady heat generated when the semiconductor package 102 is operated is conducted to the solder 203, the conductor pattern 261 of the heat dissipation pattern 231, the conductor film 251, the inner layer conductor pattern 233, the conductor film 252, and the conductor pattern 271 of the heat dissipation pattern 232 in this order.
- heat conducted to the conductor pattern 261 of the heat dissipation pattern 231 is conducted to the conductor pattern 271 of the heat dissipation pattern 232 via the conductor films 253 and 254 in the respective through holes 243 and 244. Heat conducted to the conductor pattern 271 is dissipated from the conductor pattern 271 into the outside air. Therefore, heat dissipation of the semiconductor package 102 during its operation is not impaired.
- the through holes 241 and 242 are placed in the opposed region R1, and thus, the through holes 241 and 242 are close to each other, and the thermal resistance in the inner layer conductor pattern 233 is lowered and heat can be efficiently dissipated from the semiconductor package 102.
- the heat dissipation is further improved compared with the case of the above-mentioned first embodiment.
- the through hole 242 is formed in the opposed region R1, but the through hole 242 may be omitted and the through holes 243 and 244 which are the third through holes may be formed only in the region R2.
- FIGS. 4A to 4C are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the third embodiment of the present invention.
- FIG. 4A is a plan view of a first conductor pattern of a printed wiring board
- FIG. 4B is a plan view of an inner layer conductor pattern of the printed wiring board
- FIG. 4C is a plan view of a second conductor pattern of the printed wiring board.
- the clearance 163 corresponding to the through hole 142 is circular and the clearance 173 corresponding to the through hole 141 is circular, but the present invention is not limited thereto.
- square clearances 363 and 373 illustrated in FIGS. 4A and 4C may be included. Specifically, it is enough that the clearances divide the plane-like conductive pattern 161 from the pad-like conductive pattern 162, and the plane-like conductive pattern 171 from the pad-like conductive pattern 172.
- the clearances may have any shape including a triangle, other than a circle and a square.
- FIGS. 5A to 5C are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the fourth embodiment of the present invention.
- FIG. 5A is a plan view of a first conductor pattern of a printed wiring board
- FIG. 5B is a plan view of an inner layer conductor pattern of the printed wiring board
- FIG. 5C is a plan view of a second conductor pattern of the printed wiring board.
- the number of the first through holes may be one or more. Further, the number of the second through holes may be one or more. It is preferred that the second through hole(s) be placed in the opposed region R1, but the second through hole(s) may be placed in the region R2 ( FIGS. 3A to 3D ) other than the opposed region R1.
- the ratio between the number of the first through hole(s) and the number of the second through hole(s) be 1:1, but the present invention is not limited thereto.
- FIGS. 5A to 5C a case in which the ratio between the number of the first through holes and the number of the second through holes is 1:2 is illustrated.
- the ratio between the number of through holes 441 as the first through holes and the number of through holes 442 and 443 as the second through holes may be 1:2.
- a heat dissipation pattern 431 has, in a first surface layer, a solid conductor pattern 461 which is physically connected to a conductor film in the through hole 441. Further, the heat dissipation pattern 431 has, in the first surface layer, conductor lands 462 and 463 which are physically connected to conductor films in the through holes 442 and 443, respectively. A clearance 464 is provided between the conductor pattern 461 and the conductor lands 462 and 463, and hence the conductor pattern 461 and the conductor lands 462 and 463 are not held in contact with each other in the first surface layer.
- the conductor lands 462 and 463 have areas smaller than that of the conductor pattern 461.
- a heat dissipation pattern 432 has, in a second surface layer, a solid conductor pattern 471 which is physically connected to the conductor films in the respective through holes 442 and 443. Further, the heat dissipation pattern 432 has, in the second surface layer, a conductor land 472 which is physically connected to the conductor film in the through hole 441. A clearance 473 is provided between the conductor pattern 471 and the conductor land 472, and hence the conductor pattern 471 and the conductor land 472 are not held in contact with each other in the second surface layer.
- the conductor land 472 has an area smaller than that of the conductor pattern 471.
- an inner layer conductor pattern 433 is physically connected in an inner layer to the conductor films in the through holes 441, 442, and 443.
- the clearance 464 may be shared by the multiple through holes 442 and 443.
- the printed wiring board is a three-layer printed wiring board
- the printed wiring board may have four or more layers.
- the second conductor pattern is formed in a pattern in which the end portion of the first conductor film on the second surface layer side is separated, and thus, conduction of heat due to the heating in the reflow step from the second conductor pattern to the first conductor film can be effectively reduced to inhibit temperature rise of the first conductor film. Therefore, inflow of the solder to the first through hole can be inhibited to reduce occurrence of poor soldering.
- heat generated of the semiconductor package during its operation is conducted to the solder, the first conductor pattern, the first conductor film, the inner layer conductor pattern, the second conductor film, and the second conductor pattern in this order, and is dissipated from the second conductor pattern into the outside air. Therefore, heat dissipation when the semiconductor package is operated is not impaired.
- a printed wiring board including a first heat dissipation pattern placed in one surface layer on which a semiconductor package is to be mounted, a second heat dissipation pattern placed in the other surface layer, and an inner layer conductor pattern placed in an inner layer, in which through holes are formed in the printed wiring board;
- the first heat dissipation pattern has a joint portion which is placed in an opposed region opposed to a heat sink of the semiconductor package and which is joined to the heat sink with solder; at least one of the through holes is placed in the opposed region; and the second heat dissipation pattern is formed in a pattern in which an end portion of a conductor film in the one of the through holes on the other surface layer side is separated.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
- The present invention relates to a printed wiring board having a semiconductor package including a heat sink mounted thereon, a printed circuit board including the printed wiring board, and a printed circuit board manufacturing method.
- In a semiconductor package such as an IC which is mounted on a printed wiring board, a heat sink for dissipating generated heat is provided on a rear surface of a semiconductor package body. This is because, in recent years, as signal processing in a semiconductor package becomes faster, heat generated in the semiconductor package tends to increase, and it is necessary to efficiently dissipate heat in the semiconductor package. Japanese Patent Application Laid-Open No.
2006-80168 - The conductor pattern on the mounting surface is required to be opposed to the heat sink of the semiconductor package and to be sized so as not to interfere with a pin of the semiconductor package. Further, an insulator used for the printed wiring board has a thermal conductivity which is lower than that of the conductor pattern, and thus, the conductor pattern is liable to store heat. Therefore, in Japanese Patent Application Laid-Open No.
2006-80168 - By the way, in a reflow step of soldering the heat sink and the conductor pattern on the mounting surface, if molten solder is drawn in the through holes, poor soldering is caused, which results in lowered mountability of the semiconductor package and lowered heat dissipation.
- Therefore, in Japanese Patent Application Laid-Open No.
2006-80168 - However, even if the conductor pattern for dissipating heat is divided and the through holes are provided in the center area thereof which is not to be soldered as in the structure disclosed in Japanese Patent Application Laid-Open No.
2006-80168 2006-80168 - Accordingly, it is an object of the present invention to provide a printed wiring board, a printed circuit board, and a printed circuit board manufacturing method which reduce the occurrence of poor soldering.
- A printed circuit board according to one embodiment of the present invention, includes: a semiconductor package; a printed wiring board having the semiconductor package mounted on a first surface layer thereof, the printed wiring board including: a first conductor pattern formed in a region of the first surface layer on which the semiconductor package is to be mounted; a second conductor pattern placed in a second surface layer on a side opposite to the first surface layer; a first through hole piercing the first surface layer, an inner layer, and the second surface layer; a second through hole piercing the first surface layer, the inner layer, and the second surface layer; and a solder member placed between the semiconductor package and the printed wiring board, for joining a conductive member provided in the semiconductor package and the first conductor pattern together, in which: the first conductor pattern includes: a first plane-like conductive pattern; and a first pad-like conductive pattern which is surrounded by the first plane-like conductive pattern and is placed with a gap between the first pad-like conductive pattern and the first plane-like conductive pattern; the second conductor pattern includes: a second plane-like conductive pattern; and a second pad-like conductive pattern which is surrounded by the second plane-like conductive pattern and is placed with a gap between the second pad-like conductive pattern and the second plane-like conductive pattern; the first plane-like conductive pattern and the second pad-like conductive pattern are connected to each other via the first through hole; and the second plane-like conductive pattern and the first pad-like conductive pattern are connected to each other via the second through hole.
- Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings.
-
FIGS. 1A, 1B, 1C, and 1D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a first embodiment of the present invention. -
FIGS. 2A, 2B, and 2C are explanatory diagrams illustrating steps in a method of manufacturing the printed circuit board. -
FIGS. 3A, 3B, 3C, and 3D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a second embodiment of the present invention. -
FIGS. 4A, 4B, and 4C are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a third embodiment of the present invention. -
FIGS. 5A, 5B, and 5C are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a fourth embodiment of the present invention. -
FIGS. 6A, 6B, 6C, and 6D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a comparative example of the present invention. -
FIGS. 7A and 7B are explanatory diagrams illustrating steps in a method of manufacturing the printed circuit board according to the comparative example. - Embodiments of the present invention are described in detail below with reference to the attached drawings.
-
FIGS. 1A to 1D are explanatory diagrams illustrating a schematic structure of a printed circuit board according to a first embodiment of the present invention.FIG. 1A is a sectional view of the printed circuit board,FIG. 1B is a plan view of a first conductor pattern of a printed wiring board,FIG. 1C is a plan view of an inner layer conductor pattern of the printed wiring board, andFIG. 1D is a plan view of a second conductor pattern of the printed wiring board. - As illustrated in
FIG. 1A , a printedcircuit board 100 includes a printedwiring board 101 and asemiconductor package 102 mounted on the printedwiring board 101. In the first embodiment, thesemiconductor package 102 is a QFP, QFN, or BGA semiconductor package. InFIGS. 1A to 1D , thesemiconductor package 102 is illustrated as a QFP semiconductor package. - The
semiconductor package 102 includes adie 111 which is a semiconductor element and a heat source, aheat sink 112 which is thermally connected to the die 111, andleads 113 which are electrically connected to the die 111 through wires (not shown). The die 111, a part of theheat sink 112, and a part of theleads 113 are encapsulated with amold resin 114. - The printed
wiring board 101 is a three-layer printed wiring board in which asurface layer 121 which is a first surface layer on which thesemiconductor package 102 is mounted, asurface layer 122 which is a second surface layer on a side opposite to thesurface layer 121, and aninner layer 123 between thesurface layer 121 and thesurface layer 122 are stacked with insulating layers therebetween. As the insulating layers, aninsulator 137 is provided. - The printed
wiring board 101 includes aheat dissipation pattern 131 which is a first conductor pattern arranged in thesurface layer 121, aheat dissipation pattern 132 which is a second conductor pattern arranged in thesurface layer 122, and an innerlayer conductor pattern 133 arranged in theinner layer 123. The printedwiring board 101 also includes asignal line pattern 134 which is arranged in thesurface layer 121 and which is electrically connected to theleads 113 of thesemiconductor package 102. In the first embodiment, theheat dissipation pattern 131 and thesignal line pattern 134 are electrically insulated from each other by theinsulator 137. Thesepatterns - The
heat dissipation pattern 131 has ajoint portion 131a which is placed in an opposed region R1 opposed to theheat sink 112 of thesemiconductor package 102 and which is joined to theheat sink 112 withsolder 103. In the first embodiment, the entire surface of theheat dissipation pattern 131 is thejoint portion 131a. Thejoint portion 131a and theheat sink 112 are joined together with thesolder 103. The outer periphery of theheat dissipation pattern 131 is surrounded by theleads 113 of thesemiconductor package 102, and theheat dissipation pattern 131 is formed in a shape which is not brought into contact with the leads 113 (for example, a rectangular outer shape). Note that, the leads 113 of thesemiconductor package 102 and thesignal line pattern 134 are joined together withsolder 104. Theheat dissipation pattern 132 is a pattern having an area larger than that of theheat dissipation pattern 131. - A through
hole 141 as a first through hole and a throughhole 142 as a second through hole are formed in the printedwiring board 101 to pierce thesurface layer 121, theinner layer 123, and thesurface layer 122. In the first embodiment, a case in which one first through hole and one second through hole are formed is described. In the first embodiment, the throughholes - A
conductor film 151 as a first conductor film is provided on an inner wall of the throughhole 141, while aconductor film 152 as a second conductor film is provided on an inner wall of the throughhole 142. Theseconductor films - The
conductor film 151 is formed so as to extend from an end portion of the throughhole 141 on thesurface layer 121 side corresponding to the first surface layer side to an end portion of the throughhole 141 on thesurface layer 122 side corresponding to the second surface layer side. Similarly, theconductor film 152 is formed so as to extend from an end portion of the throughhole 142 on thesurface layer 121 side to an end portion of the throughhole 142 on thesurface layer 122 side. - In the first embodiment, as illustrated in
FIG. 1B , theheat dissipation pattern 131 has, in thesurface layer 121, a plane-like conductive pattern 161 (first plane-like conductive pattern) which is physically connected to theconductor film 151 in the throughhole 141. Further, theheat dissipation pattern 131 has, in thesurface layer 121, a pad-like conductive pattern 162 (first pad-like conductive pattern) which is physically connected to theconductor film 152 in the throughhole 142. Aclearance 163 is provided between the plane-likeconductive pattern 161 and the pad-likeconductive pattern 162, and the plane-likeconductive pattern 161 and the pad-likeconductive pattern 162 are not held in contact with each other in thesurface layer 121. The pad-likeconductive pattern 162 has an area smaller than that of the plane-likeconductive pattern 161. - Further, in the first embodiment, as illustrated in
FIG. 1D , theheat dissipation pattern 132 has, in thesurface layer 122, a plane-like conductive pattern 171 (second plane-like conductive pattern) which is physically connected to theconductor film 152 in the throughhole 142. The plane-likeconductive pattern 171 is formed so as to extend beyond an outer peripheral region of thesemiconductor package 102 when the printedcircuit board 100 is seen from thesemiconductor package 102 side. Further, theheat dissipation pattern 132 has, in thesurface layer 122, a pad-like conductive pattern 172 (second pad-like conductive pattern 172) which is physically connected to theconductor film 151 in the throughhole 141. Aclearance 173 is provided between the plane-likeconductive pattern 171 and the pad-likeconductive pattern 172, and the plane-likeconductive pattern 171 and the pad-likeconductive pattern 172 are not held in contact with each other in thesurface layer 122. The pad-likeconductive pattern 172 has an area smaller than that of the plane-likeconductive pattern 171. - In other words, as illustrated in
FIG. 1B , the end portion of theconductor film 151 on thesurface layer 121 side is physically connected in thesurface layer 121 to the plane-likeconductive pattern 161, and thus theconductor film 151 is electrically and thermally connected to the plane-likeconductive pattern 161. As illustrated inFIG. 1C , a middle portion of theconductor film 151 is physically connected in theinner layer 123 to the innerlayer conductor pattern 133, and thus theconductor film 151 is electrically and thermally connected to the innerlayer conductor pattern 133. Further, as illustrated inFIG. 1D , the end portion of theconductor film 151 on thesurface layer 122 side is physically connected in thesurface layer 122 to the pad-likeconductive pattern 172, and thus theconductor film 151 is electrically and thermally connected to the pad-likeconductive pattern 172. - In addition, as illustrated in
FIG. 1D , the end portion of theconductor film 152 on thesurface layer 122 side is physically connected in thesurface layer 122 to the plane-likeconductive pattern 171, and thus theconductor film 152 is electrically and thermally connected to the plane-likeconductive pattern 171. As illustrated inFIG. 1C , a middle portion of theconductor film 152 is physically connected in theinner layer 123 to the innerlayer conductor pattern 133, and thus theconductor film 152 is electrically and thermally connected to the innerlayer conductor pattern 133. Further, as illustrated inFIG. 1D , the end portion of theconductor film 152 on thesurface layer 121 side is physically connected in thesurface layer 121 to the pad-likeconductive pattern 162, and thus theconductor film 152 is electrically and thermally connected to the pad-likeconductive pattern 162. - The
heat dissipation pattern 131 is formed in a pattern in which the plane-likeconductive pattern 161 and the pad-likeconductive pattern 162 are separated by theclearance 163, that is, a pattern in which the end portion of theconductor film 152 on thesurface layer 121 side is separated. Further, theheat dissipation pattern 132 is formed in a pattern in which the plane-likeconductive pattern 171 and the pad-likeconductive pattern 172 are separated by theclearance 173, that is, a pattern in which the end portion of theconductor film 151 on thesurface layer 122 side is separated. - In this way, the end portion of the
conductor film 151 in the throughhole 141 on thesurface layer 122 side is separated from the plane-likeconductive pattern 171 by a gap, and hence, in thesurface layer 122, heat in the plane-likeconductive pattern 171 is less liable to be conducted to the end portion of theconductor film 151 on thesurface layer 122 side. Further, the end portion of theconductor film 152 in the throughhole 142 on thesurface layer 121 side is separated from the plane-likeconductive pattern 161 by a gap, and hence, in thesurface layer 121, heat in theconductor film 152 is less liable to be conducted to the plane-likeconductive pattern 161. - As the
clearances wiring board 101 under theheat sink 112 become smaller, and the distance between the throughhole 141 and the throughhole 142 becomes larger. Therefore, as theclearances semiconductor package 102 during its operation is lowered. Therefore, it is desired that theclearances signal line pattern 134. - From the viewpoint of the heat dissipation of the
semiconductor package 102 during its operation, it is preferred that theconductor film 151 in the throughhole 141 and theconductor film 152 in the throughhole 142 be connected to each other via a solid pattern, and it is desired that the area of the solid pattern be as large as possible. Specifically, it is enough that the innerlayer conductor pattern 133 is a conductor pattern placed in theinner layer 123, but it is preferred that the innerlayer conductor pattern 133 be a solid conductor pattern. Exemplary solid conductor patterns include a power supply pattern to which a direct current power supply voltage is applied and a ground pattern to which a ground voltage (0 V) is applied. It is preferred that the innerlayer conductor pattern 133 be any one of a power supply pattern and a ground pattern. In the first embodiment, the innerlayer conductor pattern 133 is a ground pattern. In this way, the innerlayer conductor pattern 133 is a ground pattern, and thus, it is not necessary to, for connection between theconductor film 151 and theconductor film 152, additionally provide a conductor pattern other than the ground pattern. Note that, when the innerlayer conductor pattern 133 is a power supply pattern, similarly, it is not necessary to additionally provide a conductor pattern. - In the first embodiment, a ground terminal of the
die 111 is electrically connected to theheat sink 112, and theheat sink 112 also serves as a ground terminal of thesemiconductor package 102. Therefore, theheat sink 112 which is a ground terminal of thesemiconductor package 102 is electrically connected to the innerlayer conductor pattern 133 which is a ground pattern via theconductor film 151 in the throughhole 141. - Note that, when the inner
layer conductor pattern 133 is a power supply pattern, a power supply terminal of thedie 111 may be electrically connected to theheat sink 112 to cause theheat sink 112 to function as a power supply terminal of thesemiconductor package 102. Also in this case, theheat sink 112 and thejoint portion 131a may be joined together with thesolder 103. - Next, a method of manufacturing the printed
circuit board 100 is described.FIGS. 2A to 2C are explanatory diagrams illustrating steps in the method of manufacturing the printed circuit board.FIG. 2A illustrates an application step,FIG. 2B illustrates a mounting step, andFIG. 2C illustrates a reflow step. - As illustrated in
FIG. 2A , asolder paste 103A is applied to thejoint portion 131a of theheat dissipation pattern 131 in the printed wiring board 101 (application step). In this application step, asolder paste 104A is applied to portions corresponding to theleads 113 of thesemiconductor package 102. In this application step, the solder pastes 103A and 104A are applied to thesurface layer 121 by screen printing using a mask (not shown). - Next, as illustrated in
FIG. 2B , thesemiconductor package 102 is mounted on the surface layer 121 (mounting step). At this time, theheat sink 112 of thesemiconductor package 102 is brought into contact with thesolder paste 103A, and at the same time, theleads 113 of thesemiconductor package 102 are brought into contact with thesolder paste 104A. - Next, as illustrated in
FIG. 2C , the solder pastes 103A and 104A are heated under a state in which theheat sink 112 is held in contact with thesolder paste 103A and theleads 113 are held in contact with thesolder paste 104A (reflow step). This melts the solder pastes 103A and 104A. After the heating is completed, the joining together of theheat sink 112 and thejoint portion 131a with thesolder 103 is completed to obtain the printedcircuit board 100. In the heating in the reflow step, the temperature of an outer peripheral surface of the printedcircuit board 100 becomes higher than that of the inside thereof. - In the first embodiment, after the reflow step, direct conduction of residual heat remaining in the plane-like
conductive pattern 171 of theheat dissipation pattern 132 to theconductor film 151 in the throughhole 141 is reduced by theclearance 173. Further, theconductor film 151 in the throughhole 141 and theconductor film 152 in the throughhole 142 are connected to each other through the innerlayer conductor pattern 133, and the thermal resistances of theconductor patterns conductor films conductive pattern 171 of theheat dissipation pattern 132 is dissipated into the outside air, and the rest of the residual heat is conducted to theconductor film 152 in the throughhole 142. Almost none of the heat conducted to theconductor film 152 is conducted to the innerlayer conductor pattern 133, and thus, conduction of the residual heat remaining in the plane-likeconductive pattern 171 to theconductor film 151 in the throughhole 141 is inhibited. - This inhibits temperature rise in the through
hole 141, and thus, melting of the solder in the vicinity of the throughhole 141 can be inhibited. Therefore, inflow of molten solder to the throughhole 141 can be inhibited. - Further, residual heat remaining in the plane-like
conductive pattern 171 of theheat dissipation pattern 132 is conducted via theconductor film 152 in the throughhole 142 to the pad-likeconductive pattern 162 in thesurface layer 121. However, theclearance 163 is provided, and thus, conduction of the residual heat to the plane-likeconductive pattern 161 is inhibited. Therefore, thesolder 103 is molten only in the vicinity of the pad-likeconductive pattern 162, and the amount of the solder which is drawn in the throughhole 142 is reduced compared with a conventional case. - Therefore, occurrence of poor soldering because of a gap caused between the
heat sink 112 and theheat dissipation pattern 131 can be reduced. - Next, a printed circuit board according to a comparative example of the present invention without the
clearances FIGS. 6A to 6D are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the comparative example.FIG. 6A is a sectional view of the printed circuit board,FIG. 6B is a plan view of a first conductor pattern of the printed wiring board,FIG. 6C is a plan view of an inner layer conductor pattern of the printed wiring board, andFIG. 6D is a plan view of a second conductor pattern of the printed wiring board. A printedcircuit board 1 is different from the printedcircuit board 100 illustrated inFIGS. 1A to 1D in that theclearances heat dissipation pattern 31 in thesurface layer 121 is directly connected to theconductor films holes heat dissipation pattern 32 in thesurface layer 122 is directly connected to theconductor films holes -
FIGS. 7A and 7B are explanatory diagrams illustrating steps in a method of manufacturing the printed circuit board according to the comparative example.FIG. 7A illustrates a mounting step andFIG. 7B illustrates a reflow step. - Before the reflow step, as illustrated in
FIG. 7A , asolder paste 3A fills the space between theheat sink 112 and theheat dissipation pattern 31. After the reflow step is completed, as illustrated inFIG. 7B , the insides of the throughholes heat dissipation pattern 32 to meltsolder 3. Themolten solder 3 flows in the throughholes heat sink 112 and theheat dissipation pattern 31 is reduced to cause poor soldering. In this way, in the printedcircuit board 1 according to the comparative example, poor soldering of thesolder 3 occurs, and thus, heat generated in thedie 111 is conducted to theheat sink 112, but the heat conducted to theheat sink 112 cannot be efficiently conducted to theheat dissipation pattern 31. As a result, thesemiconductor package 102 stores heat. - As described above, according to the first embodiment, after the reflow step in the manufacturing steps is completed, heat conduction from the plane-like
conductive pattern 171 of theheat dissipation pattern 132 to theconductor film 151 in the throughhole 141 can be prevented to inhibit temperature rise inside the throughhole 141. Therefore, the solder can be prevented from being drawn in the throughhole 141. - Further, the residual heat remaining in the plane-like
conductive pattern 171 is conducted via theconductor film 152 in the throughhole 142 to the pad-likeconductive pattern 162. However, due to the presence of theclearance 163, the heat is less liable to be conducted to the plane-likeconductive pattern 161, and thus, the amount of the solder which is drawn in the throughhole 142 can be reduced. - Therefore, occurrence of poor soldering between the
heat sink 112 and thejoint portion 131a can be reduced. - Further, steady heat generated when the
semiconductor package 102 is operated is conducted to thesolder 103, the plane-likeconductive pattern 161 of theheat dissipation pattern 131, theconductor film 151, the innerlayer conductor pattern 133, theconductor film 152, and the plane-likeconductive pattern 171 of theheat dissipation pattern 132 in this order. Heat conducted to the plane-likeconductive pattern 171 is dissipated from the plane-likeconductive pattern 171 into the outside air. Therefore, heat dissipation of thesemiconductor package 102 during its operation is not impaired. - Further, the through
holes holes layer conductor pattern 133 is lowered and heat can be efficiently dissipated from thesemiconductor package 102. - Next, a printed circuit board according to a second embodiment of the present invention is described.
FIGS. 3A to 3D are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the second embodiment of the present invention.FIG. 3A is a sectional view of the printed circuit board,FIG. 3B is a plan view of a first conductor pattern of the printed wiring board,FIG. 3C is a plan view of an inner layer conductor pattern of the printed wiring board, andFIG. 3D is a plan view of a second conductor pattern of the printed wiring board. - As illustrated in
FIG. 3A , a printedcircuit board 200 includes a printedwiring board 201 and asemiconductor package 102 which is similar to that according to the first embodiment and mounted on the printedwiring board 201. - The printed
wiring board 201 is a three-layer printed wiring board in which asurface layer 221 which is a first surface layer on which thesemiconductor package 102 is mounted, asurface layer 222 which is a second surface layer on a side opposite to thesurface layer 221, and aninner layer 223 between thesurface layer 221 and thesurface layer 222 are stacked with insulating layers therebetween. As the insulating layers, aninsulator 237 is provided. - The printed
wiring board 201 includes aheat dissipation pattern 231 which is a first conductor pattern arranged in thesurface layer 221, aheat dissipation pattern 232 which is a second conductor pattern arranged in thesurface layer 222, and an innerlayer conductor pattern 233 arranged in theinner layer 223. The printedwiring board 201 also includes asignal line pattern 234 which is arranged in thesurface layer 221 and which is electrically connected to theleads 113 of thesemiconductor package 102. In the second embodiment, theheat dissipation pattern 231 and thesignal line pattern 234 are electrically insulated from each other by theinsulator 237. Thesepatterns - The
heat dissipation pattern 231 has ajoint portion 231a which is placed in an opposed region R1 opposed to theheat sink 112 of thesemiconductor package 102 and which is joined to theheat sink 112 withsolder 203. In the second embodiment, the middle portion of the surface of theheat dissipation pattern 231 is thejoint portion 231a. Thejoint portion 231a and theheat sink 112 are joined together with thesolder 203. The outer periphery of theheat dissipation pattern 231 is surrounded by theleads 113 of thesemiconductor package 102, and theheat dissipation pattern 231 is formed in a shape which is not brought into contact with the leads 113 (for example, a rectangular outer shape). Note that, theleads 113 of thesemiconductor package 102 and thesignal line pattern 234 are joined together withsolder 204. Theheat dissipation pattern 232 is a pattern having an area larger than that of theheat dissipation pattern 231. - A through
hole 241 as a first through hole, a throughhole 242 as a second through hole, and throughholes wiring board 201 to pierce thesurface layer 221, theinner layer 223, and thesurface layer 222. In the second embodiment, a case in which one first through hole and one second through hole are formed and multiple third through holes are formed is described. - A
conductor film 251 as a first conductor film is provided on an inner wall of the throughhole 241, whileconductor films holes conductor films 251 to 254 are formed of, for example, copper. - The
conductor film 251 is formed so as to extend from an end portion of the throughhole 241 on thesurface layer 221 side corresponding to the first surface layer side to an end portion of the throughhole 241 on thesurface layer 222 side corresponding to the second surface layer side. Similarly, theconductor film 252 is formed so as to extend from an end portion of the throughhole 242 on thesurface layer 221 side to an end portion of the throughhole 242 on thesurface layer 222 side. Further, theconductor film 253 is formed so as to extend from an end portion of the throughhole 243 on thesurface layer 221 side to an end portion of the throughhole 243 on thesurface layer 222 side. Further, theconductor film 254 is formed so as to extend from an end portion of the throughhole 244 on thesurface layer 221 side to an end portion of the throughhole 244 on thesurface layer 222 side. - As illustrated in
FIG. 3B , theheat dissipation pattern 231 has, in thesurface layer 221, asolid conductor pattern 261 which is physically connected to theconductor films holes heat dissipation pattern 231 has, in thesurface layer 221, aconductor land 262 which is physically connected to theconductor film 252 in the throughhole 242. Aclearance 263 is provided between theconductor pattern 261 and theconductor land 262, and theconductor pattern 261 and theconductor land 262 are not held in contact with each other in thesurface layer 221. Theconductor land 262 has an area smaller than that of theconductor pattern 261. - Further, as illustrated in
FIG. 3D , theheat dissipation pattern 232 has, in thesurface layer 222, asolid conductor pattern 271 which is physically connected to theconductor films holes heat dissipation pattern 232 has, in thesurface layer 222, aconductor land 272 which is physically connected to theconductor film 251 in the throughhole 241. Aclearance 273 is provided between theconductor pattern 271 and theconductor land 272, and theconductor pattern 271 and theconductor land 272 are not held in contact with each other in thesurface layer 222. Theconductor land 272 has an area smaller than that of theconductor pattern 271. - In other words, as illustrated in
FIG. 3B , the end portion of theconductor film 251 on thesurface layer 221 side is physically connected in thesurface layer 221 to theconductor pattern 261, and thus theconductor film 251 is electrically and thermally connected to theconductor pattern 261. As illustrated inFIG. 3C , a middle portion of theconductor film 251 is physically connected in theinner layer 223 to the innerlayer conductor pattern 233, and thus theconductor film 251 is electrically and thermally connected to the innerlayer conductor pattern 233. Further, as illustrated inFIG. 3D , the end portion of theconductor film 251 on thesurface layer 222 side is physically connected in thesurface layer 222 to theconductor land 272, and thus theconductor film 251 is electrically and thermally connected to theconductor land 272. - Further, as illustrated in
FIG. 3D , the end portion of theconductor film 252 on thesurface layer 222 side is physically connected in thesurface layer 222 to theconductor pattern 271, and thus theconductor film 252 is electrically and thermally connected to theconductor pattern 271. As illustrated inFIG. 3C , a middle portion of theconductor film 252 is physically connected in theinner layer 223 to the innerlayer conductor pattern 233, and thus theconductor film 252 is electrically and thermally connected to the innerlayer conductor pattern 233. Further, as illustrated inFIG. 3B , the end portion of theconductor film 252 on thesurface layer 221 side is physically connected in thesurface layer 221 to theconductor land 262, and thus theconductor film 252 is electrically and thermally connected to theconductor land 262. - In this way, the
heat dissipation pattern 231 is formed in a pattern in which theconductor pattern 261 and theconductor land 262 are separated by theclearance 263, that is, a pattern in which the end portion of theconductor film 252 on thesurface layer 221 side is separated. Further, theheat dissipation pattern 232 is formed in a pattern in which theconductor pattern 271 and theconductor land 272 are separated by theclearance 273, that is, a pattern in which the end portion of theconductor film 251 on thesurface layer 222 side is separated. - In this way, the end portion of the
conductor film 251 in the throughhole 241 on thesurface layer 222 side is separated from theconductor pattern 271 by a gap, and, in thesurface layer 222, heat in theconductor pattern 271 is less liable to be conducted to the end portion of theconductor film 251 on thesurface layer 222 side. Further, the end portion of theconductor film 252 in the throughhole 242 on thesurface layer 221 side is separated from theconductor pattern 261 by a gap, and, in thesurface layer 221, heat in theconductor film 252 is less liable to be conducted to theconductor pattern 261. - In the second embodiment, among the through
holes holes holes circuit board 200, a solder paste is applied onto the throughholes holes - In the second embodiment, the possibility that the solder paste is drawn in the through
holes conductor films holes conductor patterns - From the viewpoint of the heat dissipation of the
semiconductor package 102 during its operation, it is preferred that theconductor films 251 to 254 in the respective throughholes 241 to 244 be connected to one another via a solid pattern, and it is desired that the area of the solid pattern be as large as possible. Specifically, it is enough that the innerlayer conductor pattern 233 is a conductor pattern placed in theinner layer 223, but it is preferred that the innerlayer conductor pattern 233 be a solid conductor pattern. Exemplary solid conductor patterns include a power supply pattern to which a direct current power supply voltage is applied and a ground pattern to which a ground voltage (0 V) is applied. It is preferred that the innerlayer conductor pattern 233 be any one of a power supply pattern and a ground pattern. In the second embodiment, the innerlayer conductor pattern 233 is a ground pattern. In this way, the innerlayer conductor pattern 233 is a ground pattern, and thus, it is not necessary to, for connection among theconductor films 251 to 254, additionally provide a conductor pattern other than the ground pattern. Note that, when the innerlayer conductor pattern 233 is a power supply pattern, similarly, it is not necessary to additionally provide a conductor pattern. - In the second embodiment, a ground terminal of the
die 111 is electrically connected to theheat sink 112, and theheat sink 112 also serves as a ground terminal of thesemiconductor package 102. Therefore, theheat sink 112 which is a ground terminal of thesemiconductor package 102 is electrically connected to the innerlayer conductor pattern 233 which is a ground pattern via theconductor film 251 in the throughhole 241. - Note that, when the inner
layer conductor pattern 233 is a power supply pattern, a power supply terminal of thedie 111 may be electrically connected to theheat sink 112 to cause theheat sink 112 to function as a power supply terminal of thesemiconductor package 102. Also in this case, theheat sink 112 and thejoint portion 231a may be joined together with thesolder 203. - As described above, according to the second embodiment, after the reflow step in the manufacturing steps is completed, heat conduction from the
conductor pattern 271 of theheat dissipation pattern 232 to theconductor film 251 in the throughhole 241 can be prevented to inhibit temperature rise inside the throughhole 241. Therefore, the solder can be prevented from being drawn in the throughhole 241. - Further, the residual heat remaining in the
conductor pattern 271 is conducted via theconductor film 252 in the throughhole 242 to theconductor land 262, but, due to the presence of theclearance 263, the heat is less liable to be conducted to theconductor pattern 261, and thus, the amount of the solder which is drawn in the throughhole 242 can be reduced. - Therefore, occurrence of poor soldering between the
heat sink 112 and thejoint portion 231a can be reduced. - Further, steady heat generated when the
semiconductor package 102 is operated is conducted to thesolder 203, theconductor pattern 261 of theheat dissipation pattern 231, theconductor film 251, the innerlayer conductor pattern 233, theconductor film 252, and theconductor pattern 271 of theheat dissipation pattern 232 in this order. Alternatively, heat conducted to theconductor pattern 261 of theheat dissipation pattern 231 is conducted to theconductor pattern 271 of theheat dissipation pattern 232 via theconductor films holes conductor pattern 271 is dissipated from theconductor pattern 271 into the outside air. Therefore, heat dissipation of thesemiconductor package 102 during its operation is not impaired. - Further, the through
holes holes layer conductor pattern 233 is lowered and heat can be efficiently dissipated from thesemiconductor package 102. - Further, not only the through
hole 242 is placed in the opposed region R1, but also the throughholes - Note that, in the second embodiment, a case is described in which the through
hole 242 is formed in the opposed region R1, but the throughhole 242 may be omitted and the throughholes - Next, a printed circuit board according to a third embodiment of the present invention is described.
FIGS. 4A to 4C are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the third embodiment of the present invention.FIG. 4A is a plan view of a first conductor pattern of a printed wiring board,FIG. 4B is a plan view of an inner layer conductor pattern of the printed wiring board, andFIG. 4C is a plan view of a second conductor pattern of the printed wiring board. - In the above-mentioned first embodiment, a case is described in which the
clearance 163 corresponding to the throughhole 142 is circular and theclearance 173 corresponding to the throughhole 141 is circular, but the present invention is not limited thereto. As in the third embodiment,square clearances FIGS. 4A and 4C may be included. Specifically, it is enough that the clearances divide the plane-likeconductive pattern 161 from the pad-likeconductive pattern 162, and the plane-likeconductive pattern 171 from the pad-likeconductive pattern 172. The clearances may have any shape including a triangle, other than a circle and a square. - Next, a printed circuit board according to a fourth embodiment of the present invention is described.
FIGS. 5A to 5C are explanatory diagrams illustrating a schematic structure of the printed circuit board according to the fourth embodiment of the present invention.FIG. 5A is a plan view of a first conductor pattern of a printed wiring board,FIG. 5B is a plan view of an inner layer conductor pattern of the printed wiring board, andFIG. 5C is a plan view of a second conductor pattern of the printed wiring board. - The number of the first through holes may be one or more. Further, the number of the second through holes may be one or more. It is preferred that the second through hole(s) be placed in the opposed region R1, but the second through hole(s) may be placed in the region R2 (
FIGS. 3A to 3D ) other than the opposed region R1. - Further, with regard to the heat dissipation effect of the
semiconductor package 102, it is desired that the ratio between the number of the first through hole(s) and the number of the second through hole(s) be 1:1, but the present invention is not limited thereto. InFIGS. 5A to 5C , a case in which the ratio between the number of the first through holes and the number of the second through holes is 1:2 is illustrated. As illustrated inFIGS. 5A to 5C , the ratio between the number of throughholes 441 as the first through holes and the number of throughholes - In the fourth embodiment, as illustrated in
FIG. 5A , aheat dissipation pattern 431 has, in a first surface layer, asolid conductor pattern 461 which is physically connected to a conductor film in the throughhole 441. Further, theheat dissipation pattern 431 has, in the first surface layer, conductor lands 462 and 463 which are physically connected to conductor films in the throughholes clearance 464 is provided between theconductor pattern 461 and the conductor lands 462 and 463, and hence theconductor pattern 461 and the conductor lands 462 and 463 are not held in contact with each other in the first surface layer. The conductor lands 462 and 463 have areas smaller than that of theconductor pattern 461. - Further, in the fourth embodiment, as illustrated in
FIG. 5C , aheat dissipation pattern 432 has, in a second surface layer, asolid conductor pattern 471 which is physically connected to the conductor films in the respective throughholes heat dissipation pattern 432 has, in the second surface layer, aconductor land 472 which is physically connected to the conductor film in the throughhole 441. Aclearance 473 is provided between theconductor pattern 471 and theconductor land 472, and hence theconductor pattern 471 and theconductor land 472 are not held in contact with each other in the second surface layer. Theconductor land 472 has an area smaller than that of theconductor pattern 471. - Further, an inner
layer conductor pattern 433 is physically connected in an inner layer to the conductor films in the throughholes - When there are multiple through holes (in this case, the second through holes) as the through
holes FIG. 5A , theclearance 464 may be shared by the multiple throughholes - Note that, the present invention is not limited to the embodiments described above, and various modifications can be made by those with an ordinary skill in the art within the technical idea of the present invention.
- In the above-mentioned first to fourth embodiments, cases in which a conductor land which is connected to a conductor film in a through hole is formed and a heat dissipation pattern has a conductor pattern and a conductor land which are separated from each other are described. However, the conductor land may be omitted. In this case, a heat dissipation pattern and an end portion of a conductor film in a through hole are directly separated from each other.
- Further, in the above-mentioned first to fourth embodiments, cases in which the printed wiring board is a three-layer printed wiring board are described, but the printed wiring board may have four or more layers.
- According to the present invention, the second conductor pattern is formed in a pattern in which the end portion of the first conductor film on the second surface layer side is separated, and thus, conduction of heat due to the heating in the reflow step from the second conductor pattern to the first conductor film can be effectively reduced to inhibit temperature rise of the first conductor film. Therefore, inflow of the solder to the first through hole can be inhibited to reduce occurrence of poor soldering.
- Further, heat generated of the semiconductor package during its operation is conducted to the solder, the first conductor pattern, the first conductor film, the inner layer conductor pattern, the second conductor film, and the second conductor pattern in this order, and is dissipated from the second conductor pattern into the outside air. Therefore, heat dissipation when the semiconductor package is operated is not impaired.
- While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
Provided is a printed wiring board including a first heat dissipation pattern placed in one surface layer on which a semiconductor package is to be mounted, a second heat dissipation pattern placed in the other surface layer, and an inner layer conductor pattern placed in an inner layer, in which through holes are formed in the printed wiring board; the first heat dissipation pattern has a joint portion which is placed in an opposed region opposed to a heat sink of the semiconductor package and which is joined to the heat sink with solder; at least one of the through holes is placed in the opposed region; and the second heat dissipation pattern is formed in a pattern in which an end portion of a conductor film in the one of the through holes on the other surface layer side is separated.
Claims (8)
- A printed wring board (101, 201) for mounting a semiconductor package (102) thereon, comprising:a first conductor pattern (131, 231, 431) formed in a region of a first surface layer (121, 221) on which the semiconductor package (102) is to be mounted;a second conductor pattern (132, 232, 432) placed in a second surface layer (122, 222) on a side opposite to the first surface layer (121, 221);a first through hole (141, 241, 441) piercing the first surface layer (121, 221) and the second surface layer (122, 222); anda second through hole (142, 242, 442, 443) piercing the first surface layer (121, 221) and the second surface layer (122, 222), wherein:the first conductor pattern (131, 231, 431) comprises:a first plane-like conductive pattern (161, 261, 461);
anda first pad-like conductive pattern (162, 262, 462, 463) which is surrounded by the first plane-like conductive pattern (161, 261, 461) and is placed with a gap (163, 263, 464) between the first pad-like conductive pattern (162, 262, 462, 463) and the first plane-like conductive pattern (161, 261, 461);the second conductor pattern (132, 232, 432) comprises:a second plane-like conductive pattern (171, 271, 471); anda second pad-like conductive pattern (172, 272, 472) which is surrounded by the second plane-like conductive pattern (171, 271, 471) and is placed with a gap (173, 273, 473) between the second pad-like conductive pattern (172, 272, 472) and the second plane-like conductive pattern (171, 271, 471);the first plane-like conductive pattern (161, 261, 461) and the second pad-like conductive pattern (172, 272, 472) are connected to each other via the first through hole (141, 241, 441); andthe second plane-like conductive pattern (171, 271, 471) and the first pad-like conductive pattern (162, 262, 462, 463) are connected to each other via the second through hole (142, 242, 442, 443). - The printed wiring board (101, 201) according to claim 1, wherein the first plane-like conductive pattern (161, 261, 461) is larger than the first pad-like conductive pattern (162, 262, 462, 463), and the second plane-like conductive pattern (171, 271, 471) is larger than the second pad-like conductive pattern (172, 272, 472).
- The printed wiring board (101, 201) according to claim 1 or 2, wherein the first plane-like conductive pattern (161, 261, 461) is formed in a region on which the semiconductor package (102) is to be mounted.
- The printed wiring board (101, 201) according to any one of claims 1 to 3, wherein:the first plane-like conductive pattern (161, 261, 461) and the first pad-like conductive pattern (162, 262, 462, 463) are formed in a region on which the semiconductor package (102) is to be mounted; andthe second plane-like conductive pattern (171, 271) is formed so as to extend beyond an outer peripheral region of the region on which the semiconductor package (102) is to be mounted when the printed wiring board (101, 201) is seen from the first surface layer (121, 221) side.
- The printed wiring board (101, 201) according to claim 1, wherein:an inner layer conductor pattern (133, 233) is formed in a region of an inner layer (123, 223) between the first surface layer (121, 221) and the second surface layer (122, 222); andthe first plane-like conductive pattern (161, 261, 461) and the second plane-like conductive pattern (171, 271, 471) are connected to each other via the first through hole (141, 241, 441), the inner layer conductor pattern (123, 223), and the second through hole (142, 242, 442, 443).
- The printed wiring board (101, 201) according to claim 5, wherein the inner layer conductor pattern (133, 233) comprises any one of a power supply pattern electrically connected to a power supply terminal of the semiconductor package (102) and a ground pattern electrically connected to a ground terminal of the semiconductor package (102).
- A printed circuit board (100), comprising:a semiconductor package (102) mounted on the printed wiring board (101, 201) according to any one of claims 1 to 6; anda solder member (103) placed between the semiconductor package (102) and the printed wiring board (101, 201), for joining a conductive member (112) provided in the semiconductor package (102) and the first conductor pattern (131, 231) together.
- A method of manufacturing a printed circuit board (100), comprising:applying a solder paste (103A) to the first conductor pattern (131, 231, 431) of the printed wiring board (101, 201) according to claim 1;placing the semiconductor package (102) so that a conductive member (112) of the semiconductor package (102) formed on a surface opposed to the printed wiring board (101, 201) is located on the solder paste (103A), and, by heating the solder paste (103A), to move the solder paste (103A) placed between the first pad-like conductive pattern (162, 262, 462, 463) of the first conductor pattern (131, 231, 431) and the conductive member (112) into the second through hole (142, 242, 442, 443) under a state in which a connected state between the first plane-like conductive pattern (161, 261, 461) of the first conductor pattern (131, 231, 431) and the conductive member (112) is maintained via the solder paste; andcooling the heated solder paste (103A).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012175887A JP6021504B2 (en) | 2012-08-08 | 2012-08-08 | Printed wiring board, printed circuit board, and printed circuit board manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2706829A2 true EP2706829A2 (en) | 2014-03-12 |
EP2706829A3 EP2706829A3 (en) | 2014-06-11 |
Family
ID=48917430
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP13179343.2A Withdrawn EP2706829A3 (en) | 2012-08-08 | 2013-08-06 | Printed wiring board, printed circuit board, and printed circuit board manufacturing method |
Country Status (4)
Country | Link |
---|---|
US (1) | US9282634B2 (en) |
EP (1) | EP2706829A3 (en) |
JP (1) | JP6021504B2 (en) |
CN (1) | CN103582292B (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9674940B2 (en) * | 2014-08-14 | 2017-06-06 | Samsung Electronics Co., Ltd. | Electronic device and semiconductor package with thermally conductive via |
TWI554174B (en) * | 2014-11-04 | 2016-10-11 | 上海兆芯集成電路有限公司 | Circuit substrate and semiconductor substrate |
JP2016213308A (en) * | 2015-05-08 | 2016-12-15 | キヤノン株式会社 | Printed circuit board and printed wiring board |
US9706639B2 (en) * | 2015-06-18 | 2017-07-11 | Samsung Electro-Mechanics Co., Ltd. | Circuit board and method of manufacturing the same |
US9883582B2 (en) | 2015-11-20 | 2018-01-30 | Hamilton Sundstrand Corporation | Circuit boards and circuit board assemblies |
CN107683016A (en) * | 2017-11-21 | 2018-02-09 | 生益电子股份有限公司 | A kind of quick heat radiating PCB |
FI128166B (en) * | 2017-12-14 | 2019-11-29 | Netmens Solutions Oy | Improved heat dissipation in a LED lamp |
CN108877545B (en) * | 2018-06-29 | 2020-12-22 | 上海天马有机发光显示技术有限公司 | Display device |
CN113366591A (en) * | 2019-02-27 | 2021-09-07 | 住友电工印刷电路株式会社 | Printed wiring board |
JP2021052082A (en) * | 2019-09-25 | 2021-04-01 | キオクシア株式会社 | Module substrate and printed-circuit board |
CN111148341B (en) * | 2020-01-11 | 2021-05-25 | 苏州浪潮智能科技有限公司 | PCB with back drilling added in E-PAD area of device and manufacturing method thereof |
DE102020202598A1 (en) * | 2020-02-28 | 2021-09-02 | Siemens Mobility GmbH | Method of making an electrical assembly |
CN215420882U (en) * | 2021-02-05 | 2022-01-04 | 芯海科技(深圳)股份有限公司 | Circuit board assembly and electronic equipment |
JP2022120923A (en) * | 2021-02-08 | 2022-08-19 | 株式会社アイシン | circuit board |
WO2024075864A1 (en) * | 2022-10-05 | 2024-04-11 | 엘지전자 주식회사 | Printed circuit board and soldering method therefor |
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JP2006080168A (en) | 2004-09-07 | 2006-03-23 | Nec Access Technica Ltd | Heat dissipation structure of printed wiring board |
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JPH085581Y2 (en) * | 1990-11-27 | 1996-02-14 | 株式会社ピーエフユー | Multilayer printed wiring board |
DE69225896T2 (en) * | 1992-12-15 | 1998-10-15 | Sgs Thomson Microelectronics | Carrier for semiconductor packages |
JP2699898B2 (en) | 1994-11-30 | 1998-01-19 | 日本電気株式会社 | Multilayer printed wiring board and method of manufacturing the same |
US6288906B1 (en) * | 1998-12-18 | 2001-09-11 | Intel Corporation | Multiple layer printed circuit board having power planes on outer layers |
US6710433B2 (en) * | 2000-11-15 | 2004-03-23 | Skyworks Solutions, Inc. | Leadless chip carrier with embedded inductor |
KR100432715B1 (en) | 2001-07-18 | 2004-05-24 | 엘지전자 주식회사 | Manufacturing method of PCB, PCB and package thereby |
KR100970105B1 (en) * | 2001-11-30 | 2010-07-20 | 아지노모토 가부시키가이샤 | Method of laminating circuit board and method of forming insulation layer, multilayer printed wiring board and production method therefor and adhesion film for multilayer printed wiring board |
JP2005340233A (en) * | 2004-05-24 | 2005-12-08 | Hitachi Kokusai Electric Inc | Electronic circuit substrate |
JP2008300538A (en) | 2007-05-30 | 2008-12-11 | Toshiba Corp | Printed circuit board, manufacturing method of printed circuit board, and electronic equipment |
US7808788B2 (en) * | 2007-06-29 | 2010-10-05 | Delphi Technologies, Inc. | Multi-layer electrically isolated thermal conduction structure for a circuit board assembly |
JP5024009B2 (en) | 2007-12-10 | 2012-09-12 | 日本電気株式会社 | Electronic circuit mounting method and mounting structure |
JP2011108814A (en) | 2009-11-17 | 2011-06-02 | Oki Electric Industry Co Ltd | Method of bonding surface mounting electronic component, and electronic device |
US8609995B2 (en) * | 2010-07-22 | 2013-12-17 | Ngk Spark Plug Co., Ltd. | Multilayer wiring board and manufacturing method thereof |
US8669777B2 (en) * | 2010-10-27 | 2014-03-11 | Seagate Technology Llc | Assessing connection joint coverage between a device and a printed circuit board |
-
2012
- 2012-08-08 JP JP2012175887A patent/JP6021504B2/en not_active Expired - Fee Related
-
2013
- 2013-07-29 US US13/953,496 patent/US9282634B2/en not_active Expired - Fee Related
- 2013-08-06 EP EP13179343.2A patent/EP2706829A3/en not_active Withdrawn
- 2013-08-06 CN CN201310337875.6A patent/CN103582292B/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006080168A (en) | 2004-09-07 | 2006-03-23 | Nec Access Technica Ltd | Heat dissipation structure of printed wiring board |
Also Published As
Publication number | Publication date |
---|---|
JP2014036085A (en) | 2014-02-24 |
US9282634B2 (en) | 2016-03-08 |
JP6021504B2 (en) | 2016-11-09 |
US20140043783A1 (en) | 2014-02-13 |
CN103582292A (en) | 2014-02-12 |
CN103582292B (en) | 2016-10-12 |
EP2706829A3 (en) | 2014-06-11 |
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