EP2616827A1 - Vorrichtung zur betriebsparameter-überwachung integrierter schaltkreise und integrierter schaltkreis mit betriebsparameter-überwachung - Google Patents
Vorrichtung zur betriebsparameter-überwachung integrierter schaltkreise und integrierter schaltkreis mit betriebsparameter-überwachungInfo
- Publication number
- EP2616827A1 EP2616827A1 EP11767623.9A EP11767623A EP2616827A1 EP 2616827 A1 EP2616827 A1 EP 2616827A1 EP 11767623 A EP11767623 A EP 11767623A EP 2616827 A1 EP2616827 A1 EP 2616827A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- operating parameter
- operating
- monitoring
- input signals
- parameter monitoring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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- 230000001419 dependent effect Effects 0.000 claims abstract description 31
- 230000000052 comparative effect Effects 0.000 claims abstract 7
- 230000006399 behavior Effects 0.000 claims description 8
- 238000012806 monitoring device Methods 0.000 claims description 8
- 230000003111 delayed effect Effects 0.000 claims description 6
- 230000004044 response Effects 0.000 claims description 3
- 230000002123 temporal effect Effects 0.000 claims description 3
- 101100412394 Drosophila melanogaster Reg-2 gene Proteins 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 6
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- 230000008859 change Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 102100025840 Coiled-coil domain-containing protein 86 Human genes 0.000 description 1
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- 238000012545 processing Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3016—Delay or race condition test, e.g. race hazard test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31721—Power aspects, e.g. power supplies for test circuits, power saving during test
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0218—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31725—Timing aspects, e.g. clock distribution, skew, propagation delay
Definitions
- the invention generally relates to an apparatus for operating parameter monitoring of integrated ones
- the operating parameters are in particular the
- Voltage supply a defined state can be achieved, usually a voltage monitor IC
- the commonly used voltage monitors contain analog circuits for monitoring the
- the core voltage for the FPGA Cyclon III from Altera is given.
- the permissible range is according to the data sheet (manufacturer information):
- the voltage monitors have to be adapted or calculated to the circuit. Voltage monitors whose undefined range is less than that in the above
- Example given require higher tolerance requirements, which increases the manufacturing cost.
- the invention is therefore based on the object, a
- Integrated circuits or modules are, for example, microprocessors ⁇ C ( ⁇ ; Microprocessor), CPLDs Complex Programming Logic Device (CPLD), FPGA's (Field Programmable Gate Array), ASIC's (Application Specific Integrated Circuit), DSP's
- the digital circuits or integrated circuits or modules need not be present directly as real modules, they can also be in a abs Statren
- Hardware description language such as VHDL (Very High Speed Integrated Circuit Description
- the invention accordingly provides a device for
- a signal is generated that indicates that a predetermined threshold of the at least one
- the two input signals are generated by at least two operating-parameter-dependent devices and are delayed in their switching behavior depending on the instantaneous value of the at least one operating parameter.
- To the two operating parameters dependent devices is a
- Delay element has a value such that when exceeding the predetermined threshold of
- the predicate can indicate this inequality and thus exceed the threshold of the at least one
- the invention also relates to an integrated circuit with a
- Predictive element indicates an exceeding of the threshold of the switching time.
- the device according to the invention thus monitors in general whether the, even by
- the device may accordingly also be more generally referred to as a switching time monitoring device are designated, wherein the comparison element indicates the exceeding or falling below a threshold of the switching time.
- inventive device for operating parameter monitoring integrated circuits is the one
- the time delay should be selected so that upon reaching the limit value of the operating parameter to be monitored, the setup time of an operating-parameter-dependent device just
- the setup time is no longer complied with and at the output of the operating parameter-dependent device changes the switching state.
- the setup time of the other operating-parameter-dependent devices should be better adhered to, so that when exceeding the
- Limit value does not change this value yet.
- the temporal distance to each other can be very short, as long as the output when exceeding the predetermined limit the operating parameters still an unequal switching state between the two signals is present. This ensures reliable display of the operating parameter overshoot.
- the generation of the two input signals takes place in response to a common clock, which at the two
- operating parameter monitoring is by means of another delay element of the clock path of the common clock of the two
- the operating parameter monitoring is performed in a logic circuit, a microprocessor, a digital signal processor, a CPLD, in an FPGA and / or in an ASIC or comparable integrated circuit or generally in a PLD implemented. So that can mentioned circuits are operated more reliable than before, since when exceeding the operating parameters, a signal for further processing is available that indicates this overshoot.
- the implementation can be done internally or externally. Accordingly, the device according to the invention can be implemented according to an embodiment of the invention in one of the aforementioned integrated circuits, or externally to one of these integrated circuits
- operating parameter-dependent delay elements can be realized by means of D flip-flops. These give the signal at its input is synchronous to the clock also applied to them again. Depending on the temperature of the IC, the output has a delay.
- the flip-flop serves as a measuring instrument or as
- the comparison element has an exclusive-OR link or an exclusive-or-functionality.
- the operating parameter monitoring device is the device for providing a derived clock by a frequency divider for the Clock signals formed. It is from the common clock by frequency divider, for example by means of a
- a voltage monitor for example implemented in an IC. This can be active when the inventive
- Operating parameter monitoring is no longer active.
- the operating parameter monitoring according to the invention is preferably responsible for the area directly below the limits of the operating parameters, while the
- inventive device with at least twice
- Parallel arrangement is constructed. This can be a
- an operating parameter monitoring can be set up with two different triggering thresholds.
- Tripping threshold can activate the signal and if both circuits detect a valid operating range the signal can be withdrawn.
- more than two elements can be interconnected. In other words, in a development of the invention, a circuit with at least two according to the invention
- the circuit may be part of an integrated circuit, or at least one integrated circuit
- Bet wiebsparameter- monitoring devices according to the invention are monitored.
- Memory functionality includes the signal that the
- the device according to the invention comprises a memory, in particular in the form of another
- Memory module with memory functionality to the signal indicating that a given threshold of the
- FIG. 1a shows an integrated circuit together with a device for operating parameter monitoring according to the prior art in a basic circuit.
- the behavior of the IC is thus undefined in a certain range outside the allowable or predetermined operating parameters, as outlined in the graph on the right.
- Fig. Lb shows an integrated circuit together with a device according to the invention for
- Fig. 2a shows an embodiment of a basic logic circuit for operating parameter monitoring
- Fig. 2b shows the waveform diagram of the basic logic circuit shown in Fig. 2a for
- Fig. 2c shows the waveform diagram of the basic logic circuit shown in Fig. 2a for
- FIG. 3a shows a further exemplary embodiment of a basic logic circuit for operating parameter monitoring of integrated circuits.
- the lower and upper limits of an operating parameter are simultaneously monitored.
- Fig. 3b shows the waveform diagram of the basic logic circuit shown in Fig. 3a for
- Fig. 3c shows the signal waveform diagram of the basic logic circuit shown in Fig. 3a for
- FIG. 4 shows a further exemplary embodiment of a basic logic circuit for operating parameter monitoring of integrated circuits.
- Fig. 4 are two
- FIG. 1 a shows an integrated circuit 1 together with a supply voltage monitoring device 2 according to the prior art. Both components are applied to a printed circuit board 3. Exceeds the
- Circuit 1 is shown as a dashed line.
- the area 9 is the area in which the integrated circuit 1 operates in an inadmissible operating range, but this is not recognized by the supply voltage monitoring 2. In this area, the functionally correct working of the integrated circuit 1 can not be guaranteed. If an IC is operated out of range
- the registers contained therein switch more slowly. This leads to longer signal propagation times, as a result of which the setup times (also referred to as "setup time") for a subsequent register can not be adhered to, resulting in incorrect behavior.
- Fig. 1b shows an integrated one
- Circuit 1 in which an inventive device for operating parameter monitoring 10 is implemented, in a basic circuit. It will be in one
- Input signals S2, S3 compared.
- the input signals S2, S3 are dependent on two operating parameters
- Components of the integrated circuit brings the Advantage that the monitoring is as closely as possible exposed to the same conditions as the actual function of the integrated circuit. For example, it can be much hotter in the IC than outside, including the
- Supply voltage may be in IC Due to
- Voltage drops on the supply path may be different than external.
- Each IC may be due to
- the manufacturing tolerances, the temperature and the supply voltage generally determine together the limit of a correct function of a
- Operational parameters can thus independent of the nature of the operating parameters or the presence of
- Input signals S2, S3 are currently still in phase with each other. If, however, a delay element 14 is introduced into the operating parameter monitor 10 (in FIG for example, before the operating-parameter-dependent
- Input signals S2, S3 are no longer in phase. If the delay value is chosen such that the setup time of this operating-parameter-dependent device 13 in the
- This signal can now be further evaluated, for example as a reset signal or as a signal for circuits which the
- a delay line almost arbitrarily predetermined, it can be chosen such that one of the input signals S2 or S3 changes its state if and only if the limit of
- Fig. 2a shows an embodiment of such
- a frequency divider 18 is provided, which is realized by a register Reg 1.
- the register used in the illustrated example is a D flip-flop.
- a register (Reg 1 in Fig. 2a) from a clock 15
- a second clock signal (Sl.l in Fig. 2a) generated at half frequency.
- the second clock signal Sl.l is from two registers Reg 2, Reg 3, and the two
- the register Reg 3 or the operating parameter-dependent device 13 is via a long connection or a delay line 14 connected to the register Reg 1, so that in the lower permissible operating range its setup time (ts3 in Fig. 2b) is just kept.
- the register Reg 2 or the operating-parameter-dependent device 12 via a shorter connection with Reg 1 register
- the XOR exclusive gate In response to the clock signal, the XOR exclusive gate.
- the comparison result S4 is stored by register 4 Reg 4 and can be used as a reset signal.
- the registers are used as measurement registers, i. they serve as a measure of the remaining registers of the integrated circuit with those
- the registers switch faster and the signal propagation times shorten.
- the register 12 (Reg 2) is connected in such a way that in the upper permissible operating range its hold time (also hold time; Engl. Hold-time called) just yet can be met. If the permissible operating range is exceeded, the hold time is violated.
- Fig. 3b shows the signals in case of operation just below the allowable upper
- the hold time th2 is barely
- Fig. 3c shows the signals in the case of operation above the allowable upper operating range. The hold time th2 is violated and the output of register 2
- Delay element 16 designed significantly longer than the other registers (see Fig. 3a in comparison to Fig. 2a).
- Delay elements 14 and 16 which delay the output signals of both operating-parameter-dependent devices 12, 13 differently, can simultaneously monitor the upper and lower predetermined limits of the operating parameter and can thus replace the circuit of FIG. 2a.
- the principle of the device according to FIG. 3a is therefore based on the fact that with the
- Delay element 14 and the further delay element 16 the input signals of the comparison element 11 relative to each other and to the clock 15 are delayed so that when a first upper threshold of the operating parameter or one of the input signals (S2, S3) to, by the clock signal (Sl. l) the comparison element (11) predetermined times, its switching state due to predetermined time delay changes, and at
- Delay element 14, 16 the clock inputs Cl of
- both can be
- Operating parameter monitoring can be influenced by designing the monitoring circuit to trip early accordingly.
- Circuit with the less sensitive trigger threshold (Bl in Figure 4) can activate the reset and when both circuits (Bl and B2 in Figure 4) a permissible
- Detect operating range can resist the reset
- the invention can be used and used in all digital and / or logic circuits.
- circuit can be easily modified to operate with negative hold times.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102010045278A DE102010045278A1 (de) | 2010-09-14 | 2010-09-14 | Vorrichtung zur Betriebsparameter-Überwachung integrierter Schaltkreise und integrierter Schaltkreis mit Betriebsparameter-Überwachung |
PCT/EP2011/004602 WO2012034682A1 (de) | 2010-09-14 | 2011-09-14 | Vorrichtung zur betriebsparameter-überwachung integrierter schaltkreise und integrierter schaltkreis mit betriebsparameter-überwachung |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2616827A1 true EP2616827A1 (de) | 2013-07-24 |
EP2616827B1 EP2616827B1 (de) | 2018-12-12 |
Family
ID=44785799
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP11767623.9A Active EP2616827B1 (de) | 2010-09-14 | 2011-09-14 | Vorrichtung zur betriebsparameter-überwachung integrierter schaltkreise und integrierter schaltkreis mit betriebsparameter-überwachung |
Country Status (5)
Country | Link |
---|---|
US (1) | US8917108B2 (de) |
EP (1) | EP2616827B1 (de) |
CN (1) | CN103119455B (de) |
DE (1) | DE102010045278A1 (de) |
WO (1) | WO2012034682A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9606563B2 (en) * | 2014-04-08 | 2017-03-28 | Texas Instruments Deutschland Gmbh | Bandgap reference voltage failure detection |
US9897651B2 (en) * | 2016-03-03 | 2018-02-20 | Qualcomm Incorporated | Ultra-fast autonomous clock monitoring circuit for safe and secure automotive applications |
US10254323B2 (en) * | 2016-06-30 | 2019-04-09 | General Electric Company | Passive wireless monitoring of individual capacitor cans |
EP3432014A1 (de) * | 2017-07-19 | 2019-01-23 | Siemens Aktiengesellschaft | Verfahren und system zur prädiktiven wartung von integrierten schaltungen |
CN111398775B (zh) * | 2019-01-03 | 2024-02-06 | 瑞昱半导体股份有限公司 | 电路运行速度检测电路 |
US11386250B2 (en) * | 2020-01-28 | 2022-07-12 | Synopsys, Inc. | Detecting timing violations in emulation using field programmable gate array (FPGA) reprogramming |
CN113640656B (zh) * | 2021-07-30 | 2024-04-09 | 深圳速跃芯仪科技有限公司 | 基于延时的数字测试码型生成方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5890100A (en) * | 1997-08-19 | 1999-03-30 | Advanced Micro Devices, Inc. | Chip temperature monitor using delay lines |
US7592824B2 (en) * | 2003-02-26 | 2009-09-22 | Rambus Inc. | Method and apparatus for test and characterization of semiconductor components |
US7355435B2 (en) * | 2005-02-10 | 2008-04-08 | International Business Machines Corporation | On-chip detection of power supply vulnerabilities |
US7275011B2 (en) * | 2005-06-30 | 2007-09-25 | International Business Machines Corporation | Method and apparatus for monitoring integrated circuit temperature through deterministic path delays |
-
2010
- 2010-09-14 DE DE102010045278A patent/DE102010045278A1/de not_active Withdrawn
-
2011
- 2011-09-14 WO PCT/EP2011/004602 patent/WO2012034682A1/de active Application Filing
- 2011-09-14 US US13/822,126 patent/US8917108B2/en active Active
- 2011-09-14 CN CN201180044113.6A patent/CN103119455B/zh active Active
- 2011-09-14 EP EP11767623.9A patent/EP2616827B1/de active Active
Non-Patent Citations (1)
Title |
---|
See references of WO2012034682A1 * |
Also Published As
Publication number | Publication date |
---|---|
US8917108B2 (en) | 2014-12-23 |
WO2012034682A1 (de) | 2012-03-22 |
DE102010045278A1 (de) | 2012-03-15 |
EP2616827B1 (de) | 2018-12-12 |
CN103119455A (zh) | 2013-05-22 |
US20130222006A1 (en) | 2013-08-29 |
CN103119455B (zh) | 2015-11-25 |
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