EP2569805A1 - Composant à semi-conducteur comprenant une couche présentant de nombreux trous, pour une mise en contact optimale d'émetteurs, et procédé permettant sa réalisation - Google Patents

Composant à semi-conducteur comprenant une couche présentant de nombreux trous, pour une mise en contact optimale d'émetteurs, et procédé permettant sa réalisation

Info

Publication number
EP2569805A1
EP2569805A1 EP11717511A EP11717511A EP2569805A1 EP 2569805 A1 EP2569805 A1 EP 2569805A1 EP 11717511 A EP11717511 A EP 11717511A EP 11717511 A EP11717511 A EP 11717511A EP 2569805 A1 EP2569805 A1 EP 2569805A1
Authority
EP
European Patent Office
Prior art keywords
defect
semiconductor
rich
semiconductor layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11717511A
Other languages
German (de)
English (en)
Inventor
Evelyn Schmich
Matthias HÖRTEIS
Stefan Glunz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Publication of EP2569805A1 publication Critical patent/EP2569805A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a semiconductor component made of a semiconductor material, which has a defect-rich semiconductor layer arranged on a surface of the semiconductor component with a defect concentration of at least 10 3 defects per cm 2 .
  • the present invention likewise relates to a method for producing the abovementioned semiconductor component, in which a semiconductor layer is applied to the semiconductor material by physical or chemical vapor deposition and sintered in a further working step, for example during the vapor deposition or subsequently. Following this, the desired defect concentration is set in the applied semiconductor layer.
  • the emitter for Si solar cells is manufactured in the industry by diffusion. In this production method, the possibilities to optimally adapt the doping profile are limited.
  • high surface doping is necessary. Particularly with conventional screen-printing pastes, phosphorus dopants are required on the surface of more than 10 20 cm -3 . Such a high surface doping, however, causes the
  • the silver crystallites formed during firing are a measure of the quality of the contact and it is assumed that there is a connection between the doping concentration at the surface and the number of Ag crystallites.
  • the growth of Ag crystallites is favored at high doping concentrations. Due to the existing industrial emitters at high doping at the surface of the profile and the surface concentration of the emitter is largely determined by the diffusion temperature (Renewable Energy Policy Network for the 21st Century, "Renewable Energy Global Status Report", 2007).
  • a semiconductor component made of a semiconductor material which has a defective semiconductor layer arranged on at least one surface of the semiconductor component and having a defect concentration of at least 10 3 defects per cm 2 .
  • defects in the defect-rich semiconductor layer are understood to mean irregularities in the arrangement of the atoms, ie a deviation from a microcrystalline arrangement of the atoms.
  • defects are crystal defects, such as Dislocations, stacking faults, inclusions of doping, but also damage to a regular structure, which may arise, for example, by mechanical, physical and / or chemical removal of a corresponding layer.
  • the defect concentration is at least 10 3 defects per cm 2 , ie, preferably, the surface of the arranged on the surface of the semiconductor device semiconductor layer on the defects.
  • the defects can be formed over the entire layer thickness of the defect-rich semiconductor layer.
  • defects in the surface are advantageous for the contact formation, since these can serve as nuclei for the growth of crystallites.
  • the essential advantages of the present invention are that a high doping, ie a high doping concentration on the surface of a corresponding semiconductor device, can be avoided, at the same time enabling excellent contacting.
  • the defect concentration is at least 10 4 defects per cm 2 , preferably at least 10 5 defects per cm 2 , particularly preferably at least 10 6 defects per cm 2 .
  • the defect-rich semiconductor layer has a layer thickness between 1 and 100 nm, in particular between 1 and 20 nm.
  • the defect-rich semiconductor layer may be doped, wherein the doping concentration is at least 10 19 doping atoms per cm 3 , preferably at least 10 20 doping atoms per cm 3 .
  • the preferred maximum doping concentration is 10 21 doping atoms per cm 3 .
  • the doping element is preferably selected from the group consisting of P, B, Al, Ga, In, As, Sb, Bi and / or combinations thereof.
  • Preferred base materials of the defect-rich half are conductor layer thereby selected from the group consisting of amorphous Sil 'ICIUM, nano-crystalline silicon, microcrystalline silicon, SiC, SiO x, SiN x, ⁇ 1 2 0 3, Ti0 2, transparent conductive oxides (TCO) , in particular indium tin oxide (ITO) and / or ZnO: Al and combinations thereof.
  • amorphous Sil 'ICIUM nano-crystalline silicon, microcrystalline silicon, SiC, SiO x, SiN x, ⁇ 1 2 0 3, Ti0 2, transparent conductive oxides (TCO) , in particular indium tin oxide (ITO) and / or ZnO: Al and combinations thereof.
  • the defect-rich semiconductor layer is thus arranged on a semiconductor device.
  • the region of the semiconductor device on which the defect-rich semiconductor layer is deposited represents an emitter; this region of the semiconductor device preferably has a doping, in particular an n-doping.
  • This thus directly below the defect-rich semiconductor layer disposed region of the semiconductor device has the above-mentioned case, preferably a doping concentration between 10 18 and 10 22 Dotie ⁇ approximately atoms per cm 3, with the proviso that if the broken rich semiconductor layer is doped, the doping concentration of the below the defect rich
  • Semiconductor layer arranged region ie the Emit- ters, is lower than that of the defective semiconductor layer.
  • the defect-rich layer on the back of the semiconductor device i. the emitter opposite side of the semiconductor device, is deposited.
  • the surface of the defect-rich semiconductor layer is provided with an antireflection coating.
  • the semiconductor device has electrical contacts that are related to the defect-rich semiconductor layer in electrical ⁇ shear connection.
  • the defect-rich semiconductor layer may be formed over the entire surface of the entire semiconductor device or only at the points at which the semiconductor device is to be contacted, ie below the contact points, i. the connection points between the semiconductor device and the contacts.
  • the invention also provides a method for producing a semiconductor component described above, in which a defect-rich semiconductor layer is produced on a semiconductor material over the whole area or locally by a) applying a semiconductor layer to the semiconductor material by a physical or chemical vapor deposition, or b) semiconductor particles are applied to the surface of the semiconductor material and sintered in a further working step, or c) the defect concentration of a semiconductor layer located on a semiconductor substrate is adjusted by mechanical action and / or action by increasing the temperature.
  • the aforementioned operations may be carried out alone or in combination, e.g. successively, be executed. It can e.g. two or all three operations are performed to produce the defect-rich layer.
  • the setting of the defect concentrate ion of the previously applied semiconductor layer of a semiconductor material is achieved by the action of laser radiation, for example an infrared laser, in particular a Nd-YAG laser, by local temperature increase.
  • an antireflection coating can be applied to the defect-rich
  • Semiconductor layer can be applied. Likewise, it is possible for the defective semiconductor layer to be contacted by separating contacts and contacting them with the defect-rich layer in the manner known from the prior art.
  • FIG. 1 shows a component according to the invention, which is mounted on the
  • Front side over the entire surface has a defect-rich layer for improved contact
  • Figure 2 shows an inventive component in which the defect-rich layer is formed only in the region of the contacts.
  • Defective layers are layers preferably between 1 and 100 nm, preferably between 1 and 20 nm, which consist, for example, of amorphous silicon, nanocrystalline silicon or microcrystalline silicon or have crystal defects, such as dislocations, stacking faults, inclusions of dopants , Defective layers are those with more than 1000 defects per cm 2 , in particular layers with more than 10 6 defects per cm 2 .
  • These layers are e.g. applied by CVD or PVD method targeted on the emitter.
  • Layer can also be made by deliberately damaging the surface of the emitter, e.g. by treatment with a laser, a plasma or chemical surface treatment (chemical etching, electrochemical etching).
  • the damage to the surface can be carried out deliberately or be the result of a manufacturing step.
  • the goal is to have a layer on the surface that has as many crystal defects as possible and at simultaneous doping has the highest possible Oberflä ⁇ Chen concentration of the doping atoms
  • nickel is electrodeposited as a contact metal, thus its adhesion is significantly improved due to the laser damage compared to adhesion to an undamaged surface.
  • the layer e.g. with CVD on a high-impedance emitter (diffused or also produced with CVD), which significantly improves the contactability of the emitter.
  • the layer may e.g. pass directly in situ after deposition of an emitter. Furthermore, this layer can also be selectively deposited.
  • This thin (1-100 nm) and ideally highly doped layer (N D > 10 20 cm -3 ) is produced either on a diffused or epitaxially moderately doped (lxlO 17 - 10 20 cm “3 ) emitter, which promotes contact formation
  • lxlO 17 - 10 20 cm “3 ) emitter which promotes contact formation
  • the density of silver crystals through which charge transport takes place Thickness, doping and quality (passivability and passivation properties) of the layer can be varied.
  • the defect-rich layer can be produced on conventional emitters. This has the advantage that a lower doping of the conventional emitter is necessary and this is therefore more blue-sensitive. Furthermore, the passivability is improved when the defects on the surface are simultaneously saturated, with e.g. Hydrogen from the antireflective nitride.
  • Epitaxial emitters are an alternative to conventional diffused emitters in which the
  • Emitter profile can be designed as desired. It is thus very easy to produce moderately doped emitters which increase the current of the solar cell. The deposition of the emitter volume and the highly doped defect-rich layer can be completely in situ.
  • This defect-rich layer can be both planar, i. all over, as well as selectively, i. locally limited.
  • the selective layer is generated in the last case only under the contacts and allows good contact there. The area between the contact remains unaffected by the layer and can therefore be passivated by conventional methods.
  • the generation of the defect-rich layer can also be applied to backside emitters.
  • the defect-rich layer can be deposited by means of CVD. This results in amorphous, nano- or microcrystalline layers. The deposition of the layer takes place very quickly depending on the temperature
  • Silicon nanoparticles can be applied to a low-doped emitter surface-selectively or selectively in a printing step which sinters in a tempering step and thus forms a defect-rich layer.
  • silicon nanomaterials are already used in the so-called.
  • Defective layers can be created by a laser causing damage to the semiconductor. Laser systems are commercially available. The process sequence for producing the defect-rich semiconductor layer is shown below:
  • the moderately doped emitter volume is made by diffusion or epitaxy. Subsequently, a thin and possibly highly doped defect-rich layer is produced. Then the antireflection coating is applied and the contacts are printed. The contact arises after a tempering fire step.
  • FIG. 1 shows a first variant of a semiconductor component 1 according to the invention.
  • the component has a substrate 3, for example may be a silicon wafer.
  • this substrate On the surface of the wafer, this substrate has an emitter 4, ie a region in which an n-doping of the wafer is formed.
  • this emitter layer On this emitter layer is now a defect-rich semiconductor layer according to the invention
  • the defect-rich semiconductor layer has a higher average
  • the component 1 has electrical contacts 6 at two locations, via which the component 1 can be electrically contacted.
  • the contacts 6 are in direct contact with the defect-rich semiconductor layer.
  • the contacting can take place over the entire support surface of the contacts 6 on the semiconductor layer 2 or only locally limited.
  • the semiconductor element 1 can be e.g. in that initially a defect-rich semiconductor layer 2 is deposited on the substrate 3 (see above). On this, the semiconductor layer 2 having substrate, the antireflective layer 5 is deposited, then to which a contact paste for the production of the contacts 6 is applied. After application of the contact paste, the cells are fired so that the paste sinters through the antireflection layer 5 and contacts the defect-rich layer 2.
  • FIG. 2 shows an alternative embodiment of the component 1 according to the invention.
  • the component differs from the embodiment according to FIG. 1 in that the defect-rich semiconductor layer 2 is not formed on the emitter over the entire surface, but only locally at the points at which contacting of the semiconductor component is to take place via the contacts 6.
  • the defect-rich semiconductor layer 2 in this case represents the local link between the contacts 6 and the emitters 4.
  • the defect-rich semiconductor layer 2 Due to the defect-rich semiconductor layer 2, a significantly improved contacting of the semiconductor component 1, for example a solar cell, is possible. In addition, the metal-semiconductor junction and the contact resistance ⁇ is improved.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

La présente invention concerne un composant à semi-conducteur qui se compose d'un matériau semi-conducteur et comprend sur une surface une couche de semi-conducteur présentant de nombreux trous avec une concentrations en trous d'au moins 103 trous par cm2. L'invention a également pour objet un procédé pour réaliser ledit composant à semi-conducteur, une couche de semi-conducteur étant appliquée sur le matériau semi-conducteur par dépôt physique ou chimique en phase gazeuse et frittée au cours d'une autre étape du procédé, exécutée par ex. à la suite ou pendant ledit dépôt. Il s'ensuit la régulation de la concentration en trous souhaitée dans la couche de semi-conducteur appliquée.
EP11717511A 2010-05-11 2011-05-05 Composant à semi-conducteur comprenant une couche présentant de nombreux trous, pour une mise en contact optimale d'émetteurs, et procédé permettant sa réalisation Withdrawn EP2569805A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102010020175A DE102010020175A1 (de) 2010-05-11 2010-05-11 Halbleiterbauteil mit defektreicher Schicht zur optimalen Kontaktierung von Emittern sowie Verfahren zu dessen Herstellung
PCT/EP2011/002244 WO2011141142A1 (fr) 2010-05-11 2011-05-05 Composant à semi-conducteur comprenant une couche présentant de nombreux trous, pour une mise en contact optimale d'émetteurs, et procédé permettant sa réalisation

Publications (1)

Publication Number Publication Date
EP2569805A1 true EP2569805A1 (fr) 2013-03-20

Family

ID=44626150

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11717511A Withdrawn EP2569805A1 (fr) 2010-05-11 2011-05-05 Composant à semi-conducteur comprenant une couche présentant de nombreux trous, pour une mise en contact optimale d'émetteurs, et procédé permettant sa réalisation

Country Status (3)

Country Link
EP (1) EP2569805A1 (fr)
DE (1) DE102010020175A1 (fr)
WO (1) WO2011141142A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102012104289A1 (de) * 2012-05-16 2013-11-21 Roth & Rau Ag Heterokontakt-Solarzelle und Verfahren zu deren Herstellung
JP2015142079A (ja) * 2014-01-30 2015-08-03 シャープ株式会社 光電変換装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4235376A1 (de) * 1991-10-19 1993-04-22 Hahn Meitner Kernforsch Verfahren zur herstellung einer solarzelle
US6552414B1 (en) * 1996-12-24 2003-04-22 Imec Vzw Semiconductor device with selectively diffused regions
DE19915666A1 (de) * 1999-04-07 2000-10-19 Fraunhofer Ges Forschung Verfahren und Vorrichtung zur selektiven Kontaktierung von Solarzellen
US6274471B1 (en) * 1999-06-04 2001-08-14 Taiwan Semiconductor Manufacturing Company Method for making high-aspect-ratio contacts on integrated circuits using a borderless pre-opened hard-mask technique
DE102008019402A1 (de) * 2008-04-14 2009-10-15 Gebr. Schmid Gmbh & Co. Verfahren zur selektiven Dotierung von Silizium sowie damit behandeltes Silizium-Substrat
KR100974221B1 (ko) * 2008-04-17 2010-08-06 엘지전자 주식회사 레이저 어닐링을 이용한 태양전지의 선택적 에미터형성방법 및 이를 이용한 태양전지의 제조방법

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2011141142A1 *

Also Published As

Publication number Publication date
DE102010020175A1 (de) 2011-11-17
WO2011141142A8 (fr) 2012-01-12
WO2011141142A1 (fr) 2011-11-17

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