EP2560066B1 - Verfahren zum Einstellen einer Referenzspannung auf Basis eines Bandgap-Schaltkreises - Google Patents

Verfahren zum Einstellen einer Referenzspannung auf Basis eines Bandgap-Schaltkreises Download PDF

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EP2560066B1
EP2560066B1 EP20110177618 EP11177618A EP2560066B1 EP 2560066 B1 EP2560066 B1 EP 2560066B1 EP 20110177618 EP20110177618 EP 20110177618 EP 11177618 A EP11177618 A EP 11177618A EP 2560066 B1 EP2560066 B1 EP 2560066B1
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Prior art keywords
band
voltage
gap
resistor
temperature
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French (fr)
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EP2560066A1 (de
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Yves Théoduloz
Richard Stary
Petr Drechsler
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EM Microelectronic Marin SA
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EM Microelectronic Marin SA
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Priority to US13/584,125 priority patent/US8994356B2/en
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

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  • the invention relates to a method for adjusting a reference voltage of an electronic circuit provided with a band-gap stage.
  • the invention also relates to an electronic circuit for implementing the method of adjusting a reference voltage.
  • such a band-gap type electronic circuit 1 is composed of a diode, such as a bipolar transistor N1 mounted in the form of a diode, which is crossed by a direct current Ic generated by a current source Sc to define a voltage diode V BE .
  • a diode such as a bipolar transistor N1 mounted in the form of a diode, which is crossed by a direct current Ic generated by a current source Sc to define a voltage diode V BE .
  • V BE voltage diode voltage
  • the current source Sc and the diode-connected bipolar transistor N1 are connected in series between two terminals of a DC supply voltage.
  • a generator 2 of a voltage KU T is also provided, the voltage K ⁇ U T of which varies inversely with the diode voltage V BE .
  • This voltage K ⁇ U T is added in an adder 3 to the diode voltage to provide a reference voltage V REF , which is equal to V BE + K ⁇ U T.
  • the factor K is thus adapted so as to obtain a reference voltage V REF independent of the temperature. For this, it is necessary that dV BE / dT be equal to -K ⁇ dU T / dT.
  • the reference voltage V REF which may be a band-gap voltage, is of a value substantially equal to 1.22 V at 0 ° C.
  • the thermodynamic voltage U T which is equal to k ⁇ T / q, is approximately 23.5 mV at 0 ° C, where k is the Boltzmann constant, T is the temperature in Kelvin, and q is the charge of an electron in absolute value.
  • a default value of the factor K to have a reference voltage V REF independent of the temperature is fixed during the design of the electronic circuit.
  • This factor K influences the absolute reference voltage, as well as the temperature dependence of the first order.
  • the variation of the factor K also influences the temperature stability. Since the method of manufacturing such an electronic circuit may vary for adjustment of the reference voltage, it may result in suboptimal temperature stability. This leads to a variation of one electronic circuit to another with a reference voltage, which is not entirely independent of the temperature, which is a drawback.
  • the patent application US 2006/0043957 A1 which describes such an electronic circuit provided with a band-gap type stage.
  • it is particularly described a way to adjust the temperature coefficient. To do this, it is performed measurements of the voltage at different temperatures to calculate the slope and thus adjust the reference voltage generated.
  • This band-gap stage therefore provides a precise reference voltage following various measurements of adjustment of the temperature coefficient.
  • the adjustment method requires several measurement steps in order to derive the precise adjustment parameters of the reference voltage, which is a drawback.
  • the adjustment of the reference voltage is highly dependent on variations in the manufacturing parameters of the electronic circuit, which constitutes another drawback.
  • the purpose of the invention is therefore to overcome the drawbacks of the state of the art by providing a method of adjusting a reference voltage on the basis of an electronic circuit provided with a band-gap stage, which is simple to implement.
  • the method makes it possible to easily adjust the reference voltage generated independently of the variations of the manufacturing parameters of said electronic circuit, and by suppressing the temperature dependence of the first order.
  • the invention relates to a method of adjusting a reference voltage of an electronic circuit provided with a band-gap type stage, which comprises the characteristics defined in the independent claim 1 or the independent claim 2 .
  • An advantage of the method of adjusting a reference voltage according to the invention lies in the fact that a band-gap voltage is measured at two different temperatures for two resistance values trimmed by two binary words.
  • the appropriate calibration binary word of one or two configurable band-gap resistors is determined based on the four band-gap voltage values to obtain a band-gap voltage independent of the temperature.
  • Another advantage of the method of adjusting a reference voltage is that the level of the reference voltage can thus be adjusted precisely in a second step on the basis of the adjusted band gap voltage.
  • the reference voltage adapted to the desired level is also independent of any temperature variation.
  • the invention also relates to an electronic circuit provided with a band-gap stage for implementing the method for adjusting a reference voltage, which comprises the characteristics defined in the independent claim 7.
  • the figure 2 represents an embodiment of an electronic circuit, which comprises at least a band-gap first stage 11 to provide a band-gap voltage V1, and a second adaptation stage 12 of the reference voltage V REF on the basis of band-gap voltage V1.
  • the band gap voltage V1 is adjusted to be independent of any variation in temperature.
  • the reference voltage V REF can be adapted to a desired level for the supply of other electronic components.
  • the tension Band gap V1 can also be used as a reference voltage for other electronic components. This reference voltage does not vary in temperature, if the band-gap voltage has been adjusted in the first stage according to the adjustment method of the present invention, as explained below.
  • the electronic circuit with the band-gap first stage it can be provided at least one current source P1, a resistor R1 a configurable by a binary word M1, and a diode-shaped element, such as a bipolar transistor mounted diode N1.
  • the current source, the resistor and the junction diode are connected in series between two terminals of a not shown power supply source.
  • the current source P1 is preferably connected to the high potential terminal of the supply voltage source, while the diode N1 is preferably connected to the low potential terminal of the supply voltage source.
  • the band-gap voltage V1 which can define, in this case, a reference voltage, is therefore supplied to the connection node between the current source P1 and the configurable resistor R1a.
  • this band-gap voltage can also be supplied to the connection node between the current source P1 and the diode N1, if the configurable resistor R1a is directly connected to the low voltage terminal of the supply voltage source.
  • This band gap voltage V1 is thus the addition of the diode voltage of the transistor N1 and the voltage generated by the current flowing through the resistor R1 a.
  • the electronic circuit is generally formed in a semiconductor substrate, such as silicon Si or gallium arsenide GaAs.
  • a semiconductor substrate such as silicon Si or gallium arsenide GaAs.
  • the process adjusting the reference voltage makes it possible to determine the appropriate binary word M1 for configuring the resistor R1a.
  • the method for adjusting the reference voltage or band gap voltage V1 makes it possible to suppress the first-order temperature dependence as briefly explained with reference to FIG. figure 1 by adapting the factor K.
  • band-gap voltage V1 must be measured at a first temperature T1 and at a second temperature T2 in a temperature range enabling operation of the electronic circuit.
  • This temperature range can be for example between -40 ° C to at least 85 ° C depending on the technology used to achieve the integration of the electronic circuit.
  • a first temperature T1 at 0 ° C. and a second temperature T2 at 60 ° C. can be selected, but other temperatures can also be chosen for the adjustment method according to the invention.
  • the two measurement temperatures T1 and T2 can be chosen on either side of a median temperature value in the operating temperature range of the electronic circuit. This also minimizes the effects of the second order (bell effect). In principle, they must also be sufficiently far apart from each other without approaching each limit of the temperature range so as to avoid amplifying measuring inaccuracies.
  • the band-gap voltage V1 is measured at both temperatures at a first resistance value R1a and a second resistance value. First two band-gap voltage values V1 are advantageously measured at the first temperature T1 for the two resistance values R1 a successively configured by the two binary words M1. Then two second band-gap voltage values V1 are measured at the second temperature T2 for the two resistance values R1 a successively configured by the two binary words M1.
  • the four values of the band-gap voltage can be stored in means storing a microprocessor unit, which can be integrated in the same integrated circuit as the electronic circuit or simply connected to the electronic circuit.
  • This file can be reused when testing the two band-gap voltage values at the second temperature T2 so as to allow the final calculation of the factor K.
  • the production test stores the measurement results of the two band-gap voltage values at the first temperature associated with each circuit. Under these conditions, it is not necessary to provide the electronic circuit with a non-volatile memory.
  • two values of the band gap voltage V1 can be measured with the first resistance value R1a configured by a first binary word M1, at the two measurement temperatures T1 and T2. Then, two other values of the band gap voltage V1 can also be measured with the second resistance value R1 a configured by a second binary word M1 at the two temperatures T1 and T2.
  • the four values of the band gap voltage V1 can be stored in the storage means of the microprocessor unit.
  • the band gap voltage V1 is independent of any variation in temperature. This makes it possible to adjust the temperature stability of the first order.
  • the binary word M1 configuring the configurable resistors can be a binary word of at least 4 bits, and preferably can be 7 bits or more.
  • the current I supplied by the current source can also be adapted as a function of the value of the band-gap voltage to have a band-gap voltage level V1 determined taking into account the value of the configured resistor R1 a.
  • the reference voltage V REF can be adapted in the second stage 12 of the electronic circuit.
  • This reference voltage V REF can be precisely adjusted to a higher value or a lower value for example to 0.8 V, or also to a value identical to that of the band gap voltage V1, as explained in more detail below.
  • the band-gap voltage adapted in the first stage 11 of the electronic circuit may be different from one circuit to the other of the same circuit board of integrated circuits or different integrated circuit boards, it is necessary to adapt the reference voltage desired in the second stage 12.
  • the first band-gap stage 11 is first composed of a current source P1, which is produced by means of a PMOS transistor P1.
  • the source of the PMOS transistor P1 is connected to a high potential terminal of a not shown power supply source, while the drain is connected to a first configurable resistor R1a and a second configurable resistor R1b.
  • the gate of this PMOS transistor P1 is controlled by an output voltage of a first operational amplifier A1 of a current control loop.
  • a controlled current I is supplied by this PMOS transistor P1 to the first and second configurable resistors R1a and R1b.
  • a first current I a passes through the first resistor R1 has while a second current I b passes through the second resistor R1 b.
  • the band-gap voltage V1 of the first stage output 11 is defined at the connection node between the PMOS transistor P1 and each configurable resistor R1a and R1b.
  • the first resistor R1 a is connected on one side to the drain of the PMOS transistor P1 and on the other hand to a first diode, which is preferably a first diode-connected bipolar transistor N1.
  • This first transistor mounted diode N1 is composed of n bipolar elementary transistors.
  • This first bipolar transistor may be a PNP transistor with the base and the collector connected to the low potential terminal of the supply voltage source.
  • the PMOS transistor P1, the first resistor R1a and the first diode-connected bipolar transistor N1 are connected in series between the terminals of the supply voltage source.
  • the second resistor R1b is connected on one side to the drain of the PMOS transistor P1 and on the other hand to a complementary resistor R2, which is then connected to a second diode.
  • This second diode is preferably a second bipolar transistor mounted diode N2.
  • This second diode-mounted transistor N2 is composed of m bipolar elementary transistors.
  • This second bipolar transistor may be a PNP transistor with the base and the collector connected to the low potential terminal of the supply voltage source.
  • the PMOS transistor P1, the second resistor R1b, the complementary resistor R2 and the second diode-connected bipolar transistor N2 are connected in series between the terminals of the supply voltage source.
  • the number m of bipolar elementary transistors of the second branch is greater than the number n of elementary bipolar transistors of the first branch.
  • the number n of elementary bipolar transistors for the diode N1 may be chosen equal to 1
  • the number m of elementary bipolar transistors of the diode N2 may be chosen equal to 24. This choice comes from a good pairing sought with central symmetry during the placement of the elementary transistors on the integrated circuit of the electronic circuit.
  • the bipolar elementary transistor of the diode N1 is disposed in the center of the 24 elementary bipolar transistors of the diode N2 to give a structure in the form of a square.
  • the two configurable resistors R1a and R1b may be similar and configured by the same binary word M1 provided through a configuration bus connected to the microprocessor unit.
  • Each configurable resistor can be composed in series of a base resistor and a resistor network.
  • the resistors of the network can be short-circuited each by means of a respective switch activated by a respective bit of the binary word M1.
  • the values of a part of the resistances of the network may be weighted by power of 2 or be each of the same value, for example chosen between 15 and 20 kOhm.
  • each configurable resistor can vary from 1.8 MOhm (base resistance) to 4.03 MOhm.
  • each configurable resistor which is adjusted for example to the design, can be set at 2.94 MOhm.
  • the complementary resistance R2 may be of a fixed value of the order of 420 kOhm. Naturally, other values of resistances can be provided so as to obtain a band gap voltage V1 of the order of 1.22 V at 0 ° C.
  • first and second bipolar transistors mounted in PNP-type diode N1 and N2 it may be envisaged to use first and second bipolar transistors mounted in NPN-type diode N1 and N2.
  • the emitter of each transistor is connected to the low voltage terminal of the supply voltage source, while the base and the collector are connected to the first resistor R1 a for the first transistor and to the resistor complementary R2 for the second transistor.
  • the current I which is supplied by the PMOS transistor P1 to the resistors R1a, R1b, R2 and to the diodes N1 and N2, is determined in the current control loop.
  • the positive input of the first operational amplifier A1 receives a first comparison voltage value Vp at the connection node between the first configurable resistor R1 a and the first PNP transistor mounted in diode N1.
  • the negative input of the first operational amplifier A1 receives a second comparison voltage value Vm at the connection node between the second configurable resistor R1b and the complementary resistor R2.
  • the output of this first operational amplifier A1 controls the gate of the PMOS transistor P1 so as to control the current passing through the first configurable resistor R1a and the current Ib passing through the second configurable resistor R1b.
  • the first stage 11 which provides band-gap voltage V1 thus makes it possible to adjust the temperature stability of the first order.
  • the second stage 12 makes it possible to adjust the value of the desired reference voltage V REF without modifying the temperature stability by means of a simple adjustment of the offset, as explained hereinafter in more detail.
  • the factor K for adjusting the first-order temperature stability is therefore R1a ⁇ In (m / n) / R2.
  • the variation of the band gap voltage V1 as a function of the temperature is represented by the lines pb and p m .
  • the slope of the line p m for a maximum value of the configurable resistors is a positive slope, which means that the band-gap voltage increases with an increase in temperature.
  • the configurable resistors For a minimum value of the configurable resistors, it is possible to measure a first band gap voltage value V 1LT1 at a first temperature T1, and a second band gap voltage value V 1LT2 at a second temperature T2.
  • the slope of the line p b for a minimum value of the configurable resistors is a negative slope, which means that the band-gap voltage decreases with an increase in temperature.
  • band-gap voltage V1 For the adjustment of the factor K, it is therefore sufficient to measure two band-gap voltage values V1 at two different temperatures. This makes it possible to be able to determine the appropriate binary word M1 for configuring the resistors R1a and R1b of the figure 2 , in order to obtain a value of band-gap voltage V1 independent of the temperature.
  • the band-gap voltage V1 independent of the temperature is shown by the line p n in broken lines at the figure 3 . This line p n is parallel to the axis x relative to the temperature.
  • the configurable resistors are configured between the minimum and maximum values. They are configured at a first resistive value by a first binary word and at a second resistive value by a second binary word.
  • the first resistive value may for example be greater than the second resistive value.
  • the first straight line p 1 relative to the first resistive value is represented with a positive slope, while the second right p 2 is represented with a negative slope.
  • a first band-gap voltage value V 11T1 can be measured at the first temperature T1 with the first resistive value of the configurable resistors.
  • a first band-gap voltage value V 12T1 can be measured at the first temperature T1 with the second resistive value of the configurable resistors.
  • a second band-gap voltage value V 11 T2 can be measured at the second temperature T2 with the first resistive value of the configurable resistors.
  • a second band-gap voltage value V 12T2 can be measured at the second temperature T2 with the second resistive value of the configurable resistors.
  • the four band-gap voltage values are stored in storage means of the microprocessor unit for the determination of the appropriate binary word.
  • Differential nonlinearity focuses on the adjustment steps.
  • This differential non-linearity is the ratio between each adjustment step and the theoretical pitch.
  • For a theoretical step (LSB 1) of the succession of 0, 1, 2 to 15, a succession of 0, 1.1, 1.9, 3.2 is measured up to 15 for example.
  • DNL differential non-linearity
  • the differential non-linearity (DNL) of this system is the maximum absolute value between all the DNL (i) steps that are defined by the formula (f (i) - f (i-1)) / LSB-1.
  • the integral nonlinearity (INL) of this system is the absolute maximum value between all INL (i).
  • the differential non-linearity of such a system is bad, it means that the steps have a distribution around the theoretical value with a wide standard deviation.
  • Bad integral non-linearity means that the adjustment curve gradually deviates from the theoretical curve.
  • the average value of the steps is not equal to the theoretical value of the steps. It also means that on this portion, the average value of the DNL (i) is not equal to 0.
  • each configurable resistor R1a and R1b can have a value of 1.8 MOhm.
  • each configurable resistor R1a and R1b can have a value of 4.03 MOhm.
  • an optimal K factor does not necessarily give an optimal result in absolute value. This is due in particular to variations in the manufacturing process of the electronic circuit.
  • the adjustment of the absolute value of the reference voltage V REF at the output of the electronic circuit is carried out by the second stage 12.
  • a second operational amplifier A2 is connected as a voltage follower to receive the band voltage as input. -gap V1 of the first stage 11.
  • This voltage follower makes it possible not to influence the adaptation of the band gap voltage V1 in the first stage 11.
  • a third configurable resistor R3 is provided to enable the voltage to be lowered before the amplification unit.
  • This third resistor R3 is connected between the output of the voltage follower A2 and the low potential terminal of the supply voltage source.
  • the third resistor R3 comprises a bottom part and a top part, which can be configured by means of a second matching bit word M2 supplied through an offset bus.
  • This binary word can also be a binary word of at least 4 bits, preferably 7 bits or higher.
  • the lower part of the third resistor R3 may be equal to 1.66 MOhm, while the upper part may be configured by the binary word to vary from 0 to 720 kOhm.
  • the amplification unit comprises a third operational amplifier A3, whose positive input is connected to an intermediate portion configured of the third resistor R3.
  • This amplification unit is gain-fixed by fourth and fifth resistors R4 and R5.
  • the fourth resistor R4 is connected between the negative input and the output of the third operational amplifier A3.
  • This fourth resistance can be chosen at a value of 862 kOhm.
  • the fifth resistor R5 is connected between the negative input of the third operational amplifier and the low potential terminal of the supply voltage source.
  • This fifth resistor R5 can be chosen at a value of 1.57 MOhm. According to this configuration of the electronic circuit, no voltage is defined negative.
  • the third amplifier A3 must be mounted with a positive gain.
  • the third operational amplifier A3 can be mounted as a voltage follower without the fourth and fifth resistors.
  • the upper part of the third resistor R3 can be adjusted for example to the design to a value of 363 kOhm.
  • the band-gap voltage V1 may be greater than the desired reference voltage V REF , it is necessary to have an overall gain of the second stage smaller than 1.
  • the band-gap voltage V1 may be of the order of 1.22 V, while the reference voltage V REF can be set to 0.8 V. To do this, the band gap voltage V1 is reduced by the resistive divider formed by the third configurable resistor R3 before entering the unit. of final amplification with the third amplifier A3 of the second stage.
  • the method of adjusting the reference voltage in the second stage 12 can be done in several ways depending on the chosen design of the second stage. If the differential and integral linearities of the second stage adjustment set are good ( ⁇ 1 LSB), this adjustment of the reference voltage can be done simply. It can be measured a minimum value and a maximum value. Then it can be calculated the binary adjustment word M2, so that it is proportional to the difference between the two measures min and max, and the target value sought. If there is only differential linearity that is good, the adjustment of the reference voltage can be done with the use of a dichotomy method. On the other hand, if the linearity is not guaranteed, it is necessary to carry out a refined search following the execution of the process by dichotomy.
  • the adjustment bit word M2 must be determined to configure the third resistor R3 to obtain the desired target value.
  • This binary adjustment word M2 may of course be different from an electronic circuit to another electronic circuit, since the stabilized band-gap voltage V1 at the output of the first stage may be different from one circuit to the other.
  • the current source can be connected to the low potential terminal of the supply voltage source, while the series arrangement of the junction diode with the configurable first-stage band-gap resistor can be connected to the potential high terminal of the supply voltage source.
  • the first and second configurable resistors of the first band gap stage of the electronic circuit can each be separately configured to a different resistive value.

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Claims (16)

  1. Verfahren zum Einstellen einer Referenzspannung (VREF) einer elek-tronischen Schaltung, die mit einer Stufe (11) des Bandlückentyps versehen ist, wobei die Stufe (11) des Bandlückentyps in einer Reihenschaltung zwischen zwei Anschlüssen einer Versorgungsspannungsquelle wenigstens eine Stromquelle (P1), einen ersten konfigurierbaren Widerstand (R1a) und eine erste Diode (N1) umfasst, wobei die Stufe des Bandlückentyps eine Bandlückenspannung (V1) liefert, die durch die Spannung definiert ist, die durch den durch den konfigurierbaren Widerstand und die Diode fließenden Strom erzeugt wird, wobei die Referenzspannung auf der Grundlage der von der Stufe des Bandlückentyps gelieferten Bandlückenspannung erhalten wird, wobei das Verfahren die Schritte umfasst, die darin bestehen:
    eine erste Bandlückenspannung (V11T1) mit einem ersten Widerstandswert, der durch ein erstes binäres Wort (M1) konfiguriert wird, bei einer ersten Temperatur (T1), die in einem Betriebstemperaturbereich der elektronischen Schaltung gewählt ist, zu messen,
    eine zweite Bandlückenspannung (V12T1) mit einem zweiten Widerstandswert, der durch ein zweites binäres Wort (M1) konfiguriert wird, bei der ersten Temperatur (T1) zu messen,
    eine dritte Bandlückenspannung (V11T2) mit dem ersten Widerstandswert, der durch das erste binäre Wort (M1) konfiguriert wird, bei einer zweiten Temperatur (T2), die von der ersten Temperatur verschieden ist und in dem Betriebstemperaturbereich der elektronischen Schaltung liegt, zu messen,
    eine vierte Bandlückenspannung (V12T2) mit dem zweiten Widerstandswert, der durch das zweite binäre Wort (M1) konfiguriert wird, bei der zweiten Temperatur (T2) zu messen, und
    ein geeignetes binäres Wort (M1), um den konfigurierbaren Widerstand zu konfigurieren, auf der Grundlage der vier gemessenen Bandlückenspannungswerte zu bestimmen, um eine von der Temperaturveränderung unabhängige Bandlückenspannung zu erhalten.
  2. Verfahren zum Einstellen einer Referenzspannung (VREF) einer elektronischen Schaltung, die mit einer Stufe (11) des Bandlückentyps versehen ist, wobei die Stufe (11) des Bandlückentyps in einer Reihenschaltung zwischen zwei Anschlüssen einer Versorgungsspannungsquelle wenigstens eine Stromquelle (P1), einen ersten konfigurierbaren Widerstand (R1a) und eine erste Diode (N1) umfasst, wobei die Stufe des Bandlückentyps eine Bandlückenspannung (V1) liefert, die durch die Spannung definiert ist, die durch den durch den konfigurierbaren Widerstand und die Diode fließenden Strom erzeugt wird, wobei die Referenzspannung auf der Grundlage der von der Stufe des Bandlückentyps gelieferten Bandlückenspannung erhalten wird, wobei das Verfahren die Schritte umfasst, die darin bestehen:
    eine erste Bandlückenspannung (V11T1) mit einem ersten Widerstand, der durch ein erstes binäres Wort (M1) konfiguriert wird, bei einer ersten Temperatur (T1), die in einem Betriebstemperaturbereich der elektronischen Schaltung gewählt ist, zu messen,
    eine zweite Bandlückenspannung (V11T2) mit dem ersten Widerstandswert, der durch das erste binäre Wort (M1) konfiguriert wird, bei einer zweiten Temperatur (T2), die von der ersten Temperatur verschieden ist und in dem Betriebstemperaturbereich der elektronischen Schaltung liegt, zu messen,
    eine dritte Bandlückenspannung (V12T1) mit einem zweiten Widerstandwert, der durch ein zweites binäres Wort (M1) konfiguriert wird, bei der ersten Temperatur (T1) zu messen,
    eine vierte Bandlückenspannung (V12T2) mit dem zweiten Widerstandswert, der durch das zweite binäre Wort (M1) konfiguriert wird, bei der zweiten Temperatur (T2) zu messen und
    ein geeignetes binäres Wort (M1), um den konfigurierbaren Widerstand zu konfigurieren, auf der Grundlage der vier gemessenen Bandlückenspannungswerte zu bestimmen, um eine von der Temperaturveränderung unabhängige Bandlückenspannung zu erhalten.
  3. Verfahren nach einem der Ansprüche 1 und 2, dadurch gekennzeichnet, dass die erste, die zweite, die dritte und die vierte gemessene Bandlückenspannung nacheinander in Speichermitteln einer Mikroprozessoreinheit gespeichert werden.
  4. Verfahren nach einem der Ansprüche 1 und 2, dadurch gekennzeichnet, dass die erste Messtemperatur (T1) und die zweite Messtemperatur (T2) beiderseits einer mittleren Temperatur des Betriebstemperaturbereichs der elektronischen Schaltung gewählt werden.
  5. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das geeignete binäre Wort (M1), um den konfigurierbaren Widerstand (R1a) zu konfigurieren, auf der Grundlage der Formel für das binäre Wort mit i Bits M ⁢ 1 ⁢ i - 1 : 0 = 2 i - 1 ⋅ V 12 ⁢ T ⁢ 1 - V 12 ⁢ T ⁢ 2 / V 11 ⁢ T ⁢ 2 - V 12 ⁢ T ⁢ 2 - V 11 ⁢ T ⁢ 1 + V 12 ⁢ T ⁢ 1
    Figure imgb0004
    bestimmt wird, wobei V11T1 die Bandlückenspannung ist, die bei dem ersten Widerstandswert des konfigurierbaren Widerstands und bei der ersten Temperatur (T1) gemessen wird, V11T2 die Bandlückenspannung ist, die bei dem ersten Widerstandswert des konfigurierbaren Widerstands und bei der zweiten Temperatur (T2) gemessen wird, V12T1 die Bandlückenspannung ist, die bei dem zweiten Widerstandswert des konfigurierbaren Widerstands und bei der ersten Temperatur (T1) gemessen wird, und V12T2 die Bandlückenspannung ist, die bei dem zweiten Widerstandswert des konfigurierbaren Widerstands und bei der zweiten Temperatur (T2) gemessen wird.
  6. Verfahren nach einem der vorhergehenden Ansprüche, wobei die elektronische Schaltung eine zweite Stufe (12) umfasst, um den Pegel der Referenzspannung (VREF) auf der Grundlage der Bandlückenspannung (V1) anzupassen, wobei diese zweite Stufe einen zweiten Operationsverstärker (A2), der als Spannungsfolger angeschlossen ist, um am Eingang die Bandlückenspannung der ersten Stufe (11) des Bandlückentyps zu empfangen, einen dritten konfigurierbaren Widerstand (R3), der durch ein zweites binäres Wort (M2) konfiguriert werden kann und zwischen einen Ausgang des zweiten Operationsverstärkers (A2) und einen Anschluss mit niedrigem Potenzial einer Versorgungsspannungsquelle geschaltet ist, und eine Verstärkungseinheit, die mit einem konfigurierten Zwischenabschnitt des dritten Widerstands verbunden ist, umfasst, um am Ausgang die angepasste Referenzspannung (VREF) zu liefern, dadurch gekennzeichnet, dass die Referenzspannung angepasst wird, nachdem die Bandlückenspannung (V1) in der ersten Stufe (11) des Bandlückentyps angepasst worden ist, indem der dritte Widerstand (R3) durch ein zweites binäres Wort mittels eines Dichotomieverfahrens konfiguriert worden ist, derart, dass das zweite binäre Wort (M2), um den dritten Widerstand zu konfigurieren, bestimmt wird.
  7. Elektronische Schaltung für die Ausführung des Verfahrens zum Einstellen einer Referenzspannung (VREF) nach einem der vorhergehenden Ansprüche, wobei die Referenzspannung auf der Grundlage einer Bandlückenspannung (V1) erhalten wird, die von einer ersten Stufe (11) des Bandlückentyps geliefert wird, dadurch gekennzeichnet, dass die erste Stufe des Bandlückentyps in einer Reihenschaltung zwischen zwei Anschlüssen einer Versorgungsspannungsquelle eine Stromquelle (P1) umfasst, die verbunden ist mit einem ersten Zweig, der einen ersten konfigurierbaren Widerstand (R1a) in Reihe mit einer ersten Diode (N1) enthält, und mit einem zweiten Zweig, der einen zweiten konfigurierbaren Widerstand (R1b) enthält, der mit einem komplementären Widerstand (R2) in Reihe mit einer zweiten Diode (N2) verbunden ist, wobei die Bandlückenspannung an einen Verbindungsknoten zwischen der Stromquelle und jedem Zweig geliefert wird.
  8. Elektronische Schaltung nach Anspruch 7, dadurch gekennzeichnet, dass die Stromquelle aus einem MOS-Transistor (P1) gebildet ist, dessen Gate durch eine Ausgangsspannung eines ersten Operationsverstärkers (A1) einer Stromsteuerschleife in dem MOS-Transistor gesteuert wird, dass ein positiver Eingang des ersten Operationsverstärkers (A1) mit einem Verbindungsknoten zwischen dem ersten konfigurierbaren Widerstand (R1a) und der ersten Diode (N1) verbunden ist, um eine erste Vergleichsspannung (Vp) zu empfangen, und dass ein negativer Eingang des ersten Operationsverstärkers (A1) mit einem Verbindungsknoten zwischen dem zweiten konfigurierbaren Widerstand (R1 b) und dem komplementären Widerstand (R2) verbunden ist, um eine zweite Vergleichsspannung (Vm) zu empfangen.
  9. Elektronische Schaltung nach einem der Ansprüche 7 und 8, dadurch gekennzeichnet, dass jeder konfigurierbare Widerstand (R1a, R1b) durch ein entsprechendes binäres Wort konfiguriert wird.
  10. Elektronische Schaltung nach Anspruch 9, dadurch gekennzeichnet, dass die zwei konfigurierbaren Widerstände (R1a, R1b) durch dasselbe erste binäre Wort konfiguriert werden.
  11. Elektronische Schaltung nach Anspruch 7, dadurch gekennzeichnet, dass die erste Diode (N1) ein erster Bipolartransistor ist, der als Diode geschaltet ist, und dass die zweite Diode (N2) ein zweiter Bipolartransistor ist, der als Diode geschaltet ist.
  12. Elektronische Schaltung nach Anspruch 11, dadurch gekennzeichnet, dass jeder als Diode geschaltete Bipolartransistor ein PNP-Transistor ist.
  13. Elektronische Schaltung nach Anspruch 11, dadurch gekennzeichnet, dass der erste als Diode geschaltete Bipolartransistor (N1) aus n elementaren Bipolartransistoren gebildet ist und dass der zweite als Diode geschaltete Bipolartransistor (N2) aus m elementaren Bipolartransistoren gebildet ist, wobei die ganze Zahl m größer ist als die ganze Zahl n, die wenigstens 1 beträgt.
  14. Elektronische Schaltung nach Anspruch 13, dadurch gekennzeichnet, dass die elektronische Schaltung eine integrierte Schaltung ist, dass der erste als Diode geschaltete Bipolartransistor (N1) einen elementaren Bipolartransistor enthält und dass der zweite als Diode geschaltete Bipolartransistor (N2) 24 elementare Bipolartransistoren enthält, die um den elementaren Bipolartransistor der ersten Diode verwirklicht sind, um eine Struktur mit quadratischer Form zu bilden.
  15. Elektronische Schaltung nach Anspruch 7, dadurch gekennzeichnet, dass sie eine zweite Stufe (12) umfasst, um den Pegel der Referenzspannung (VREF) auf der Grundlage der Bandlückenspannung (V1) anzupassen, wobei diese zweite Stufe einen zweiten Operationsverstärker (A2), der als Spannungsfolger angeschlossen ist, um am Eingang die Bandlückenspannung der ersten Stufe (11) zu empfangen, einen dritten konfigurierbaren Widerstand (R3), der durch ein zweites binäres Wort (M2) konfiguriert werden kann und zwischen einen Ausgang des zweiten Operationsverstärkers (A2) und einen Anschluss mit niedrigem Potenzial der Versorgungsspannungsquelle geschaltet ist, und eine Verstärkungseinheit, die mit einem konfigurierten Zwischenabschnitt des dritten Widerstands verbunden ist, umfasst, um am Ausgang die angepasste Referenzspannung zu liefern.
  16. Elektronische Schaltung nach Anspruch 15, dadurch gekennzeichnet, dass eine Verstärkungseinheit einen dritten Operationsverstärker (A3), wovon ein positiver Eingang mit einem konfigurierten Zwischenabschnitt des dritten Widerstands (R3) verbunden ist, einen vierten Widerstand (R4), der zwischen einen negativen Eingang und einen Ausgang des dritten Operationsverstärkers (A3) geschaltet ist, und einen fünften Widerstand (R5), der zwischen den negativen Eingang des dritten Operationsverstärkers und einen Anschluss mit niedrigem Potenzial der Versorgungsspannungsquelle geschaltet ist, umfasst, wobei der vierte und der fünfte Widerstand ermöglichen, den Verstärkungsfaktor des dritten Operationsverstärkers (A3) festzulegen.
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US7164259B1 (en) * 2004-03-16 2007-01-16 National Semiconductor Corporation Apparatus and method for calibrating a bandgap reference voltage
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