EP2506239A1 - Procédé d'actionnement de panneau d'affichage à plasma et dispositif d'affichage à plasma - Google Patents

Procédé d'actionnement de panneau d'affichage à plasma et dispositif d'affichage à plasma Download PDF

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Publication number
EP2506239A1
EP2506239A1 EP11734498A EP11734498A EP2506239A1 EP 2506239 A1 EP2506239 A1 EP 2506239A1 EP 11734498 A EP11734498 A EP 11734498A EP 11734498 A EP11734498 A EP 11734498A EP 2506239 A1 EP2506239 A1 EP 2506239A1
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Prior art keywords
subfield
pulse
sustain
scan
electrode
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Application number
EP11734498A
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German (de)
English (en)
Inventor
Yuichi Sakai
Hidehiko Shoji
Naoyuki Tomioka
Takahiko Origuchi
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Panasonic Corp
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Panasonic Corp
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Publication of EP2506239A1 publication Critical patent/EP2506239A1/fr
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/065—Waveforms comprising zero voltage phase or pause
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
    • G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery

Definitions

  • the present invention relates to a driving method for a plasma display panel, and a plasma display apparatus including the plasma display panel that are used for a wall-mounted television or a large monitor.
  • an AC surface discharge panel i.e. a typical plasma display panel (hereinafter, simply referred to as "panel")
  • a large number of discharge cells are formed between a front substrate and a rear substrate facing each other.
  • a front substrate With the front substrate, a plurality of display electrode pairs, each including a scan electrode and a sustain electrode, is formed in parallel with each other on a front glass substrate.
  • a dielectric layer and a protective layer are formed so as to cover these display electrode pairs.
  • a plurality of parallel data electrodes is formed on a rear glass substrate.
  • a dielectric layer is formed so as to cover these data electrodes.
  • a plurality of barrier ribs is formed in parallel with the data electrodes. Phosphor layers are formed on the surface of the dielectric layer and on the side faces of the barrier ribs.
  • the front substrate and the rear substrate are opposed to each other and sealed together such that the display electrode pairs three-dimensionally intersect the data electrodes.
  • a discharge gas containing xenon at a partial pressure ratio of 5% for example, is sealed, and discharge cells are formed in the parts where the display electrode pairs face the data electrodes.
  • a gas discharge generates ultraviolet rays in each discharge cell, and the ultraviolet rays excite the phosphors of red (R) color, green (G) color, and blue (B) color such that the phosphors of the respective colors emit light for color image display.
  • a typically used method for driving the panel is a subfield method.
  • gradations are displayed by dividing one field into a plurality of subfields and causing light emission or no light emission in each discharge cell in each subfield.
  • Each subfield has an initializing period, an address period, and a sustain period.
  • initializing waveforms are applied to the respective scan electrodes so as to cause an initializing discharge in the respective discharge cells.
  • This operation forms wall charge necessary for the subsequent address operation in the respective discharge cells, and generates priming particles (excitation particles for generating a discharge) for generating an address discharge stably.
  • a scan pulse is applied sequentially to the scan electrodes, and an address pulse is applied selectively to the data electrodes in response to the signals of an image to be displayed.
  • This operation causes an address discharge between the scan electrodes and the data electrodes in the discharge cells to be lit and forms wall charge in the discharge cells (hereinafter, these operations being also generically referred to as "addressing").
  • a number of sustain pulses predetermined for each subfield are applied alternately to the display electrode pairs, each including a scan electrode and a sustain electrode.
  • This operation causes a sustain discharge in the discharge cells having undergone the address discharge, and causes the phosphor layers of the discharge cells to emit light.
  • causing a discharge cell to be lit by a sustain discharge is also referred to as "lighting", and causing a discharge cell not to be lit as "non-lighting”.
  • the respective discharge cells are lit at luminances corresponding to the luminance weight predetermined for each subfield.
  • the respective discharge cells of the panel are lit at luminances corresponding to the gradation values of the image signals for image display in the image display area of the panel.
  • a plasma display apparatus includes a scan electrode driver circuit, a sustain electrode driver circuit, and a data electrode driver circuit. Applying driving voltage waveforms to the respective electrodes allows image display on the panel.
  • the data electrode driver circuit is a driver circuit for applying an address pulse corresponding to an image signal to each data electrode and causing an address discharge in each discharge cell.
  • the electric power consumption of the data electrode driver circuit exceeds the allowed value (maximum rating) of a circuit element constituting the data electrode driver circuit, a malfunction occurs in the data electrode driver circuit. This can hinder a normal address operation and impair the image display quality.
  • a circuit element having a high rated value is used.
  • such a circuit element is relatively expensive and one of major factors in increasing costs in the plasma display apparatus.
  • Patent Literature 1 As a method for suppressing the electric power consumption of the data electrode driver circuit without degrading the image display quality, the following method is proposed (see Patent Literature 1, for example). In this method, the order of address pluses applied to the data electrodes is changed, and the charge/discharge current flowing in charge/discharge of the data electrodes is reduced so as to limit the electric power consumption of the data electrode driver circuit.
  • a technique for controlling the number of sustain pulses in the sustain periods is also disclosed (see Patent Literature 2, for example).
  • one field is formed of eight subfields, i.e. the first subfield through the eighth subfield (hereinafter, the first subfield being simply referred to as "the first SF", and the second subfield being simply referred to as "the second SF").
  • the number of sustain pulses in the first SF is 1
  • the number of sustain pulses in the second SF is 2
  • the numbers of sustain pulses in the third SF through the eighth SF are 4, 8, 16, 32, 64, and 128, respectively.
  • the numbers of sustain pulses in the first SF through the eighth SF are changed to two times the numbers, i.e.
  • luminance magnification By changing the number of sustain pulses in each subfield from one time to two times, three times, and four times (hereinafter, this magnification being simply referred to as "luminance magnification") in this manner, the number of light emissions in each sustain period can be controlled. Thus, a dark image can be displayed brightly when the luminance magnification is increased, and the electric power consumption can be suppressed when the luminance magnification is decreased.
  • the panel has a plurality of discharge cells, each of the discharge cells has a display electrode pair and a data electrode, the display electrode pair includes a scan electrode and a sustain electrode, and the panel is driven in a manner such that a plurality of subfields forms one field, each of the subfields includes an address period where a scan pulse is applied to the scan electrodes and an address pulse is applied to the data electrodes, and a sustain period where sustain pulses corresponding in number to a luminance weight are applied to the display electrode pairs.
  • the luminance weight is set for each subfield such that the subfield having the heaviest luminance weight and the subfield having the second heaviest luminance weight do not occur consecutively.
  • a subfield where generation of the sustain pulses is stopped is set.
  • the state where the subfield without generation of the sustain pulses does not occur is set as normal operation.
  • the pulse width of the address pulse and the pulse width of the scan pulse are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the immediately succeeding subfield in normal operation.
  • This method can reduce the electric power consumption and cause a stable address discharge in the subfield immediately succeeding the subfield where generation of the sustain pulses is stopped even in a panel having high definition and a large screen size.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the subfield immediately succeeding these consecutive subfields may be extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the subfield in normal operation.
  • a plasma display apparatus of the present invention includes the following elements:
  • This configuration can reduce the electric power consumption and cause a stable address discharge in the subfield immediately succeeding the subfield where generation of the sustain pulses is stopped even in a panel having high definition and a large screen size.
  • Fig. 1 is an exploded perspective view showing a structure of panel 10 for use in a plasma display apparatus in accordance with the exemplary embodiment of the present invention.
  • a plurality of display electrode pairs 24, each including scan electrode 22 and sustain electrode 23, is formed on glass front substrate 21.
  • Dielectric layer 25 is formed so as to cover scan electrodes 22 and sustain electrodes 23.
  • Protective layer 26 is formed over dielectric layer 25.
  • protective layer 26 is formed of a material predominantly composed of magnesium oxide (MgO).
  • MgO has proven performance as a panel material, and has a large secondary electron emission coefficient and excellent durability when neon (Ne)-xenon (Xe) gas is sealed.
  • a plurality of data electrodes 32 is formed on rear substrate 31.
  • Dielectric layer 33 is formed so as to cover data electrodes 32, and mesh barrier ribs 34 are formed on the dielectric layer.
  • phosphor layers 35 for emitting light of red (R) color, green (G) color, and blue (B) color are formed.
  • Front substrate 21 and rear substrate 31 face each other such that display electrode pairs 24 intersect data electrodes 32 with a small discharge space sandwiched between the electrodes.
  • the outer peripheries of the substrates are sealed with a sealing material, such as a glass frit.
  • a neon-xenon mixture gas for example, is sealed as a discharge gas.
  • a discharge gas at a xenon partial pressure of approximately 15% is used.
  • the discharge space is partitioned into a plurality of compartments by barrier ribs 34.
  • Discharge cells are formed in the intersecting parts of display electrode pairs 24 and data electrodes 32. These discharge cells cause discharge and emit light (lit), so that a color image is displayed on panel 10.
  • the discharge cell for emitting the red light is referred to as an R discharge ell, that for emitting the green light as a G discharge cell, and that for emitting the blue light as a B discharge cell.
  • the structure of panel 10 is not limited to the above, and may include barrier ribs in a stripe pattern, for example.
  • the xenon partial pressure may be further increased so as to enhance the emission efficiency, and another mixture ratio may be used.
  • Fig. 2 is an electrode array diagram of panel 10 for use in the plasma display apparatus in accordance with the exemplary embodiment of the present invention.
  • Panel 10 has n scan electrode SC1-scan electrode SCn (scan electrodes 22 in Fig. 1 ) and n sustain electrode SU1-sustain electrode SUn (sustain electrodes 23 in Fig. 1 ) both long in the row direction (line direction), and m data electrode D1-data electrode Dm (data electrodes 32 in Fig. 1 ) long in the column direction.
  • the plasma display apparatus of this exemplary embodiment displays gradations by a subfield method.
  • the subfield method one field is divided into a plurality of subfields along a temporal axis, and a luminance weight is set for each subfield.
  • Each subfield has an initializing period, an address period, and a sustain period.
  • An image is displayed on panel 10 by controlling the light emission or no light emission in each discharge cell in each subfield.
  • the luminance weight represents a ratio of the magnitudes of luminance displayed in the respective subfields.
  • sustain pulses corresponding in number to the luminance weight are generated.
  • the luminance of the light emission in the subfield having the luminance weight "8" is approximately eight times as high as that in the subfield having the luminance weight "1", and is approximately four times as high as that in the subfield having the luminance weight "2".
  • the luminance weights of the respective subfields are set not only in ascending order (the luminance weight increasing from the first SF to the tenth SF in this order), but the luminance weight increases from the first SF to the sixth SF in this order and thereafter from the seventh SF to the tenth SF in this order. That is, the luminance weights are set to the respective subfields such that the subfield having the largest luminance weight and the subfield having the second largest luminance weight do not occur consecutively.
  • the subfields having high luminance weights are concentrated in the second half of a field.
  • the subfields having high emission luminances are distributed in the field.
  • an all-cell initializing operation is performed, and in the initializing periods of the other subfields, a selective initializing operation is performed.
  • the all-cell initializing operation causes an initializing discharge in all the discharge cells.
  • the selective initializing operation causes an initializing discharge selectively in a discharge cell having undergone a sustain discharge in the sustain period of the immediately preceding subfield.
  • the light emission unrelated to image display is only the light emission caused by the discharge in the all-cell initializing operation in the first SF. Therefore, the luminance of black level, i.e. the luminance of the black display area where no sustain discharge occurs, is only the weak light emission in the all-cell initializing operation.
  • an image of high contrast can be displayed on panel 10.
  • sustain pulses corresponding in number to the luminance weight of each subfield multiplied by a predetermined proportionality factor are applied to each of display electrode pairs 24.
  • This proportionality factor is a luminance magnification.
  • sustain pulses corresponding in number to the luminance weight of each subfield multiplied by a predetermined luminance magnification are applied to each of scan electrodes 22 and sustain electrodes 23. Therefore, for instance, when the luminance magnification is 2, in the sustain period of a subfield having the luminance weight "2", four sustain pulses are applied to each of scan electrodes 22 and sustain electrodes 23. Thus, the number of sustain pulses generated in the sustain period is 8.
  • the number of subfields forming one field, and the luminance weights of the respective subfields are not limited to the above values.
  • the subfield structure may be switched based on an image signal, for example.
  • Fig. 3 is a chart showing driving voltage waveforms applied to the respective electrodes of panel 10 for use in the plasma display apparatus in accordance with the exemplary embodiment of the present invention.
  • Fig. 3 shows driving voltage waveforms applied to the following electrodes: scan electrode SC1 for undergoing an address operation first in the address periods; scan electrode SCn for undergoing an address operation last in the address periods; sustain electrode SU1-sustain electrode SUn; and data electrode D1-data electrode Dm.
  • Fig. 3 shows driving voltage waveforms having different waveform shapes to be applied to scan electrode SC1-scan electrode SCn in the initializing periods of two subfields. These two subfields are the first subfield (the first SF), i.e. an all-cell initializing subfield, and the second subfield (the second SF), i.e. a selective initializing subfield.
  • the driving voltage waveforms in the other subfields are substantially similar to those in the second SF except for the number of sustain pulses in the sustain period.
  • Scan electrode SCi, sustain electrode SUi, and data electrode Dk in the following description are the electrodes selected from the respective electrodes, based on image data (data representing light emission and no light emission in each subfield).
  • voltage 0 (V) is applied to each of data electrode D1-data electrode Dm and sustain electrode SU1-sustain electrode SUn.
  • Voltage Vi1 is applied to scan electrode SC1-scan electrode SCn.
  • Voltage Vi1 is set to a voltage lower than a discharge start voltage with respect to sustain electrode SU1-sustain electrode SUn.
  • a ramp waveform voltage gently rising from voltage Vi1 toward voltageVi2 is applied to scan electrode SC1-scan electrode SCn.
  • this ramp waveform voltage is referred to as "ramp voltage L1".
  • Voltage Vi2 is set to a voltage exceeding the discharge start voltage with respect to sustain electrode SU1-sustain electrode SUn.
  • the examples of the gradient of this ramp voltage L1 include a numerical value of approximately 1.3 V/ ⁇ sec.
  • This weak discharge reduces the negative wall voltage on scan electrode SC1-scan electrode SCn and the positive wall voltage on sustain electrode SU1-sustain electrode SUn, and adjusts the positive wall voltage on data electrode D1-data electrode Dm to a value appropriate for the address operation. In this manner, the all-cell initializing operation for causing an initializing discharge in all the discharge cells is completed.
  • all-cell initializing period the period during which the all-cell initializing operation is performed.
  • the driving voltage waveform for causing the all-cell initializing operation is referred to as "all-cell initializing waveform”.
  • a scan pulse at voltage Va is sequentially applied to scan electrode SC1-scan electrode SCn.
  • An address pulse at positive voltage Vd is applied to data electrode Dk corresponding to a discharge cell to be lit among data electrode D1-data electrode Dm.
  • an address discharge is caused selectively in the respective discharge cells.
  • voltage Ve2 is applied to sustain electrode SU1-sustain electrode SUn
  • voltage Vc is applied to scan electrode SC1-scan electrode SCn.
  • a scan pulse at negative voltage Va is applied to scan electrode SC1 in the first line, which undergoes an address operation first.
  • an address pulse at positive voltage Vd is applied to data electrode Dk of a discharge cell to be lit in the first line among data electrode D1-data electrode Dm.
  • the voltage difference in the intersecting part of data electrode Dk and scan electrode SC1 is obtained by adding the difference between the wall voltage on data electrode Dk and the wall voltage on scan electrode SC1 to a difference in externally applied voltage (voltage Vd-voltage Va).
  • Vd-voltage Va the voltage difference between data electrode Dk and scan electrode SC1 exceeds the discharge start voltage, and a discharge occurs between data electrode Dk and scan electrode SC1.
  • the voltage difference between sustain electrode SU1 and scan electrode SC1 is obtained by adding the difference between the wall voltage on sustain electrode SU1 and the wall voltage on scan electrode SC1 to a difference in externally applied voltage (voltageVe2-voltageVa).
  • voltageVe2-voltageVa a difference in externally applied voltage
  • setting voltage Ve2 to a voltage value slightly lower than the discharge start voltage can make the state where a discharge is likely to occur but does not actually occurs between sustain electrode SU1 and scan electrode SC1.
  • a discharge occurring between data electrode Dk and scan electrode SC1 can trigger a discharge between the areas of sustain electrode SU1 and scan electrode SC1 intersecting data electrode Dk.
  • an address discharge occurs in the discharge cell to be lit.
  • Positive wall voltage accumulates on scan electrode SC1
  • negative wall voltage accumulates on sustain electrode SU1.
  • Negative wall voltage also accumulates on data electrode Dk.
  • address operation is performed so as to cause an address discharge in the discharge cells to be lit in the first line and accumulate wall voltage on the respective electrodes.
  • the voltage in the intersecting parts of scan electrode SC1 and data electrodes 32 applied with no address pulse does not exceed the discharge start voltage, and thus no address discharge occurs.
  • a scan pulse is applied to scan electrode SC2, which undergoes an address operation second, and an address pulse is applied to data electrode Dk corresponding to a discharge cell to be lit in the line for undergoing an address operation second.
  • an address discharge occurs and an address operation is performed.
  • the above address operation is repeated sequentially until the operation reaches the discharge cells in the n-th line, and the address period is completed. In this manner, in the address period, an address discharge is caused selectively in the discharge cells to be lit so as to form wall charge in the discharge cells.
  • sustain pulses equal in number to the luminance weight multiplied by the predetermined luminance magnification are applied alternately to scan electrode SC1-scan electrode SCn and sustain electrode SU1-sustain electrode SUn. Thereby, the sustain discharge is continued in the discharge cells having undergone the address discharge in the address period.
  • an up-ramp waveform voltage gently rising from voltage 0 (V) toward voltage Vr is applied to scan electrode SC1-scan electrode SCn.
  • this up-ramp waveform voltage is referred to as "erasing ramp voltage L3".
  • erasing ramp voltage L3 that rises from voltage 0 (V) as a base electric potential toward voltage Vr is generated with a gradient steeper than that of ramp voltage L1, and applied to scan electrode SC1-scan electrode SCn while voltage 0 (V) is applied to sustain electrode SU1-sustain electrode SUn and data electrode D1-data electrode Dm.
  • This gradient is approximately 10 V/ ⁇ sec, for example.
  • Voltage Vr set to a voltage exceeding the discharge start voltage causes a weak discharge between sustain electrode SUi and scan electrode SCi in the discharge cell having undergone a sustain discharge.
  • the charged particles generated by this weak discharge accumulate on sustain electrode SUi and scan electrode SCi as wall charge so as to reduce the voltage difference between sustain electrode SUi and scan electrode SCi.
  • the wall voltage between scan electrode SC1-scan electrode SCn and sustain electrode SU1-sustain electrode SUn is reduced to the difference between the voltage applied to scan electrode SCi and the discharge start voltage, e.g. the degree of (voltage Vr-discharge start voltage). That is, the discharge caused by erasing ramp voltage L3 works as erasing discharge.
  • scan electrode SC1-scan electrode SCn are returned to voltage 0 (V), and the sustain operation in the sustain period is completed.
  • driving voltage waveforms where those in the first half of the initializing period of the first SF are omitted are applied to the respective electrodes.
  • Voltage Ve1 is applied to sustain electrode SU1-sustain electrode SUn, and voltage 0 (V) is applied to data electrode D1-data electrode Dm.
  • Ramp voltage L4 which gently falls from a voltage (e.g. voltage 0 (V)) lower than the discharge start voltage toward negative voltage Vi4 exceeding the discharge start voltage, is applied to scan electrode SC1-scan electrode SCn.
  • the gradient of this ramp voltage L4 is equal to the gradient of ramp voltage L2, and the examples of the gradient include a numerical value of approximately -2.5 V/ ⁇ sec.
  • This voltage application causes a weak initializing discharge in the discharge cells having undergone a sustain discharge in the sustain period of the immediately preceding subfield (the first SF in Fig. 3 ).
  • This weak discharge reduces the wall voltage on scan electrode SCi and sustain electrode SUi, and adjusts the wall voltage on data electrode Dk to a value appropriate for the address operation.
  • no initializing discharge occurs in the discharge cells having undergone no sustain discharge in the sustain period of the immediately preceding subfield.
  • the wall charge at the completion of the initializing period of the immediately preceding subfield is maintained.
  • the initializing operation in the second SF is a selective initializing operation for causing an initializing discharge in the discharge cells having undergone a sustain discharge in the sustain period of the immediately preceding subfield.
  • the period during which the selective initializing operation is performed is referred to as a selective initializing period.
  • the driving voltage waveforms similar to those in the address period and the sustain period of the first SF except for the number of sustain pulses are applied to the respective electrodes.
  • the driving voltage waveforms similar to those in the second SF except for the number of sustain pulses are applied to the respective electrodes.
  • each voltage value is set to a value optimally for the characteristics of panel 10, the specifications of the plasma display apparatus, or the like, as appropriate.
  • Fig. 4 is a diagram schematically showing the operation in the sustain period of each subfield in accordance with the exemplary embodiment of the present invention.
  • Fig. 4 shows the driving voltage waveforms applied to scan electrode SCi.
  • Fig. 4 shows the waveforms whose generation is stopped with broken lines. That is, the waveforms shown with the broken lines in Fig. 4 are the waveforms that are generated in normal operation but whose generation is stopped in response to an image signal.
  • the emission luminance is controlled by the combination of the subfield where a sustain discharge occurs and the subfield where no sustain discharge occurs.
  • this control light is emitted at the luminance corresponding to a gradation in each discharge cell, and the gradations are displayed on panel 10. Therefore, in display of an image where the signal level (gradation value) of the image signal is low and the emission luminance is low, no sustain discharge occurs in a subfield having a heavy luminance weight.
  • a subfield where generation of the sustain pulses is stopped is set in response to the magnitude of the signal level (gradation value) of an image signal.
  • the voltage waveform to be applied to scan electrodes 22 is a waveform where generation of the sustain pulses is stopped in the sixth SF shown in the waveform chart (the second waveform from the top) of Fig. 4 .
  • the voltage waveform to be applied to scan electrodes 22 is a waveform where generation of the sustain pulses is stopped in the sixth SF and tenth SF shown in the waveform chart (the third waveform from the top) of Fig. 4 .
  • Fig. 4 shows the voltage waveforms applied to scan electrodes 22.
  • generation of the sustain pulses is stopped sequentially from the subfield having the heavier luminance weight in response to the magnitude of the signal level (gradation value). Therefore, in the subfield where sustain pulses to be applied to scan electrodes 22 are stopped, the sustain pulses to be applied to sustain electrodes 23 are similarly stopped.
  • the address operation and the initializing operation are also unnecessary.
  • generation of each of the address pulse, the scan pulse, and ramp voltage L4 for initializing operation may be stopped. This can further enhance the advantage of reducing electric power consumption.
  • the inventor of the present invention has experimentally verified that stopping generation of the sustain pulses tends to destabilize the address operation in the immediately succeeding subfield.
  • Fig. 5 is a characteristic chart showing the relation between generation/non-generation of sustain pulses and an amplitude of an address pulse necessary for causing a stable address discharge.
  • Fig. 5 shows an amplitude (V) of the address pulse necessary for causing a stable address discharge in normal operation and when generation of the sustain pulses is stopped in the sustain period of the immediately preceding subfield. However, in this normal operation, sustain pulses are generated but no sustain discharge occurs in the sustain period of the immediately preceding subfield.
  • the amplitude of the address pulse necessary for causing a stable address discharge is approximately 45 (V).
  • the amplitude of the address pulse necessary for causing a stable address discharge in the immediately succeeding subfield is approximately 48 (V). This value is approximately 3 (V) higher than that in normal operation. Therefore, the address operation tends to be unstable by that voltage.
  • a long discharge delay time destabilizes the discharge is considered as follows. With a long discharge delay time, the time until occurrence of the discharge exceeds the pulse width (the time of voltage application to the discharge cell), and the voltage applied to the discharge cell before occurrence of the discharge decreases.
  • This discharge delay time is shortened by raising the voltage applied to the discharge cell. Shortening the discharge delay time stabilizes the occurrence of the discharge. However, raising the voltage applied to the discharge cell increases the electric power consumption, and thus is not preferable.
  • the inventor of the present invention has experimentally verified the following fact.
  • the pulse width is extended in response to the discharge delay time even without a rise in the voltage applied to the discharge cell in the address operation, a stable address discharge can be caused.
  • Fig. 6 is a characteristic chart showing the relation between a pulse width of the address pulse and the amplitude of the address pulse necessary for causing a stable address discharge.
  • the horizontal axis shows a pulse width ( ⁇ sec) of an address pulse
  • the vertical axis shows an amplitude (V) of the address pulse necessary for causing a stable address discharge.
  • the pulse width of the scan pulse is changed in response to that of the address pulse.
  • the pulse width of the address pulse and the pulse width of the scan pulse may be extended in the address periods of all the subfields.
  • the address period is extended in all the subfields, and thus all the subfields may not fit in the period of one field.
  • extending the pulse width of the scan pulse can erroneously cause an address discharge even though no address pulse is applied (false address discharge).
  • the pulse width of the address pulse and the pulse width of the scan pulse are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the other subfields.
  • Fig. 7 is a chart schematically showing driving voltage waveforms in accordance with the exemplary embodiment of the present invention.
  • Fig. 7 shows driving voltage waveforms applied to scan electrode SCi and data electrode D1-data electrode Dm.
  • Fig. 7 shows driving voltage waveforms in normal operation and driving voltage waveforms when generation of the sustain pulses is stopped in the sixth SF.
  • this "normal operation" means the operation for generating sustain pulses in all the subfields, i.e. the operation for generating no subfield where generation of the sustain pulses is stopped.
  • the pulse width of the address pulse and the pulse width of the scan pulse are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the other subfields.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the address period of the seventh SF are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the other subfields (e.g. the first SF).
  • the above setting is on the condition that the pulse width of the address pulse and the pulse width of the scan pulse are equal to each other in all the subfields in normal operation.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the subfield where generation of the sustain pulses is stopped can be longer than those in the other subfields. In that case, even if the pulse width of the address pulse and the pulse width of the scan pulse are extended in the subfield immediately succeeding the subfield where generation of the sustain pulses is stopped, the extended pulse widths may not reach the pulse width of the address pulse and the pulse width of the scan pulse in the subfield where generation of the sustain pulses is stopped.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the subfield having the heaviest luminance weight are longer than those in the other subfields, and generation of the sustain pulses is stopped in that subfield.
  • the pulse width of the address pulse and the pulse width of the scan pulse are extended in the succeeding subfield (the seventh SF)
  • the extended pulse widths do not reach the pulse width of the address pulse and the pulse width of the scan pulse in the subfield having the heaviest luminance weight.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the subfield e.g.
  • the seventh SF) immediately succeeding the subfield where generation of the sustain pulses is stopped e.g. the sixth SF
  • the pulse width of the address pulse and the pulse width of the scan pulse are set 0.1 ⁇ sec longer than those (e.g. approximately 0.95 ⁇ sec) in normal operation.
  • these numerical values are based on the measurement results shown in Fig. 6 .
  • the pulse widths are not limited to these numerical values.
  • each pulse width and the extended time are set optimally for the characteristics of panel 10, the specifications of the plasma display apparatus, or the like.
  • the pulse width of the address pulse and the pulse width of the scan pulse lengthens the address period.
  • the start time of the subfield is advanced by the extended time, the end time of the last subfield (e.g. the tenth SF) does not need to be postponed.
  • the address period of the seventh SF is extended longer than that in normal operation by 76. 8 ⁇ sec.
  • This is a numerical value calculated when the extended time of each of the pulse width of the address pulse and the pulse width of the scan pulse is + 0.1 ⁇ sec and the number of scan electrodes 22 is 768.
  • the start time of the seventh SF is made earlier than that in normal operation by 76.8 ⁇ sec. Since no sustain pulses are generated in the sixth SF, the advanced start time of the seventh SF causes no problem.
  • this setting can make the generation timing of the sustain period of each subfield equivalent to that in normal operation. Thereby, variations in the temporal gravity center of luminance can be suppressed and the possibility of flickers (flickering of luminance in a display image) can be reduced.
  • Fig. 8 is a circuit block diagram of plasma display apparatus 30 in accordance with the exemplary embodiment of the present invention.
  • Plasma display apparatus 30 has panel 10 and a driver circuit.
  • the driver circuit has image signal processing circuit 36; data electrode driver circuit 42; scan electrode driver circuit 43; sustain electrode driver circuit 44; control signal generation circuit 40; and electric power supply circuits (not shown) for supplying electric power necessary for each circuit block.
  • Image signal processing circuit 36 allocates a gradation value to each discharge cell, based on the input image signal.
  • the image signal processing circuit converts the gradation value into image data representing light emission and no light emission (data where light emission and no light emission correspond to digital signals "1" and "0", respectively) in each subfield.
  • the image signal processing circuit allocates the R, G, and B gradation values to the respective discharge cells, based on the R signal, the G signal, and the B signal.
  • the input image signal includes a luminance signal (Y signal) and a chroma signal (C signal, R-Y signal and B-Y signal, u signal and v signal, or the like)
  • the R signal, the G signal, and the B signal are calculated based on the luminance signal and the chroma signal, and thereafter the R, G, and B gradation values (gradation values represented in one field) are allocated to the respective discharge cells.
  • the R, G, and B gradation values allocated to the respective discharge cells are converted into image data representing light emission and no light emission in each subfield.
  • control signal generation circuit 40 Based on a horizontal synchronization signal and vertical synchronization signal, control signal generation circuit 40 generates various control signals for controlling the operation of each circuit block. Then, the control signal generation circuit supplies the generated control signals to each circuit block (data electrode driver circuit 42, scan electrode driver circuit 43, sustain electrode driver circuit 44, image signal processing circuit 36, or the like). Control signal generation circuit 40 determines a subfield where generation of the sustain pulses is stopped, based on the image data from image signal processing circuit 36, and generates a control signal based on the determination. Further, the control signal generation circuit 40 generates a control signal such that the pulse width of the address pulse and the pulse width of the scan pulse are extended in the address period of the subfield immediately succeeding the subfield where generation of the sustain pulses is stopped.
  • Scan electrode driver circuit 43 has an initializing waveform generation circuit, a sustain pulse generation circuit, and a scan pulse generation circuit (not shown in Fig. 8 ).
  • the scan electrode driver circuit generates driving voltage waveforms, in response to the control signals supplied from control signal generation circuit 40, and applies the waveforms to each of scan electrode SC1-scan electrode SCn.
  • the initializing waveform generation circuit generates an initializing waveform to be applied to scan electrode SC1-scan electrode SCn in the initializing periods.
  • the sustain pulse generation circuit generates a sustain pulse to be applied to scan electrode SC1-scan electrode SCn in the sustain periods.
  • the scan pulse generation circuit has a plurality of scan electrode driver ICs (scan ICs).
  • the scan pulse generation circuit In response to the control signal, the scan pulse generation circuit generates a scan pulse to be applied to scan electrode SC1-scan electrode SCn in the address periods. At this time, the scan pulse generation circuit generates scan pulses each having a pulse width based on the control signal.
  • Sustain electrode driver circuit 44 has a sustain pulse generation circuit and a circuit for generating voltage Ve1 and voltage Ve2 (not shown in Fig. 8 ), generates a driving voltage waveform in response to the control signal supplied from control signal generation circuit 40, and applies the driving voltage waveform to each of sustain electrode SU1-sustain electrode SUn. In the sustain periods, in response to the control signal, sustain pulses are generated and applied to sustain electrode SU1-sustain electrode SUn.
  • Data electrode driver circuit 42 converts data that forms image data in each subfield into a signal corresponding to each of data electrode D1-data electrode Dm. Then, based on the above signal, and the control signal supplied from control signal generation circuit 40, the data electrode driver circuit drives each of data electrode D1-data electrode Dm. In the address periods, the data electrode driver circuit generates address pulses each having a pulse width based on the control signal, and applies the address pulses to data electrode D1-data electrode Dm.
  • Fig. 9 is a circuit diagram showing a configuration of scan electrode driver circuit 43 of plasma display apparatus 30 in accordance with the exemplary embodiment of the present invention.
  • Scan electrode driver circuit 43 has scan pulse generation circuit 50 on the side of scan electrodes 22, initializing waveform generation circuit 53, and scan pulse generation circuit 54.
  • the output terminals of scan pulse generation circuit 54 are connected to respective scan electrode SC1-scan electrode SCn of panel 10. This is intended to apply scan pulses separately to each of scan electrodes 22 in the address periods.
  • the voltage input into scan pulse generation circuit 54 is denoted as "reference electric potential A”.
  • the operation of bringing a switching element into conduction is denoted as "ON”, and the operation of bringing a switching element out of conduction is denoted as "OFF”.
  • Fig. 9 the detailed signal paths for control signals are omitted.
  • Initializing waveform generation circuit 53 causes reference electric potential A of scan pulse generation circuit 54 to rise or fall in a ramp form in the initializing periods, thereby generating the initializing waveforms shown in Fig. 3 .
  • Sustain pulse generation circuit 50 has power recovery circuit 51 and clamp circuit 52.
  • Power recovery circuit 51 has power recovery capacitor C10, switching element Q11, switching element Q12, blocking diode Di11, blocking diode Di12, and resonance inductor L10.
  • the power recovery circuit causes LC resonance between interelectrode capacitance Cp and inductor L10 so as to cause a sustain pulse to rise and fall.
  • Clamp circuit 52 has switching element Q13 for clamping scan electrode SC1-scan electrode SCn to voltage Vsus, and switching element Q14 for clamping scan electrode SC1-scan electrode SCn to voltage 0 (V) as the base electric potential.
  • the clamp circuit connects reference electric potential A to power supply VS via switching element Q13 so as to clamp scan electrode SC1-scan electrode SCn to voltage Vsus, and grounds reference electric potential A via switching element Q14 so as to clamp scan electrode SC1-scan electrode SCn to voltage 0 (V).
  • Sustain pulse generation circuit 50 operates power recovery circuit 51 and clamp circuit 52 by switching conduction (ON) and shutoff (OFF) of switching element Q11, switching element Q12, switching element Q13, and switching element Q14, in response to the control signals supplied from control signal generation circuit 40. Thereby, the sustain pulse generation circuit generates sustain pulses.
  • switching element Q11 when a sustain pulse is caused to rise, switching element Q11 is turned on to cause resonance between interelectrode capacitance Cp and inductor L10 such that electric power is supplied from power recovery capacitor C10 to scan electrode SC1-scan electrode SCn through switching element Q11, diode Di11, and inductor L10.
  • switching element Q13 At a point when the voltage of scan electrode SC1-scan electrode SCn approaches voltage Vsus, switching element Q13 is turned on such that the circuit for driving scan electrode SC1-scan electrode SCn is switched from power recovery circuit 51 to clamp circuit 52 and scan electrode SC1-scan electrode SCn are clamped to voltage Vsus.
  • switching element Q12 is turned on to cause resonance between interelectrode capacitance Cp and inductor L10 such that electric power is recovered from interelectrode capacitance Cp to power recovery capacitor C10 through inductor L10, diode Di12, and switching element Q12.
  • switching element Q14 is turned on such that the circuit for driving scan electrode SC1-scan electrode SCn is switched from power recovery circuit 51 to clamp circuit 52 and scan electrode SC1-scan electrode SCn are clamped to voltage 0 (V) as the base electric potential.
  • switching element Q14 is turned on such that scan electrode SC1-scan electrode SCn are kept clamped to voltage 0 (V).
  • These switching elements can be formed of generally known devices, such as a metal-oxide-semiconductor field-effect transistor (MOSFET) and an insulated gate bipolar transistor (IGBT).
  • MOSFET metal-oxide-semiconductor field-effect transistor
  • IGBT insulated gate bipolar transistor
  • Scan pulse generation circuit 54 has the following elements:
  • Switching element QH1-switching element QHn and switching element QL1-switching element QHn are grouped in a plurality of outputs and formed into ICs. These ICs are scan ICs. That is, scan pulse generation circuit 54 has a plurality of scan ICs for generating scan pulses to be applied to respective scan electrode SC1-scan electrode SCn. Integrating a large number of switching element QH1-switching element QLn and switching element QL1-switching element QHn into ICs in this manner can make the circuit compact, thus reducing the area in which the circuit is mounted on the printed circuit board (mounting area). Further, the cost necessary for manufacturing plasma display apparatus 30 can be reduced.
  • control signal generation circuit 40 In response to the control signal supplied from control signal generation circuit 40, the following voltages are applied.
  • a scan pulse at negative voltage Va is applied via switching element QLi by setting switching element QHi to OFF and setting switching element QLi to ON.
  • voltage Vc is applied via switching element QHh by setting switching element QLh to OFF and setting switching element QHn to ON.
  • the pulse width of a scan pulse can be controlled by controlling switching element QH1-switching element QHn and switching element QL1-switching element QLn in response to the control signal.
  • Scan pulse generation circuit 54 is controlled by control signal generation circuit 40 so as to output a voltage waveform output from initializing waveform generation circuit 53 in the initializing periods and output a voltage waveform output from sustain pulse generation circuit 50 in the sustain periods. That is, when initializing waveform generation circuit 53 or sustain pulse generation circuit 50 operates, an initializing waveform or a sustain pulse is applied to scan electrode SC1-scan electrode SCn via switching element QL1-switching element QHn, by setting switching element QH1-switching element QHn to OFF and switching element QL1-switching element QHn to ON, respectively, in scan pulse generation circuit 54.
  • control signal for controlling each circuit is supplied from control signal generation circuit 40.
  • Fig. 10 is a circuit diagram showing a configuration of sustain electrode driver circuit 44 of plasma display apparatus 30 in accordance with the exemplary embodiment of the present invention.
  • the interelectrode capacitance of panel 10 is shown as Cp, and the circuit diagram of scan electrode driver circuit 43 is omitted.
  • Sustain electrode driver circuit 44 has sustain pulse generation circuit 80 substantially identical in configuration with sustain pulse generation circuit 50.
  • Sustain pulse generation circuit 80 has power recovery circuit 81 and clamp circuit 82, and is connected to sustain electrode SU1-sustian electrode SUn of panel 10. In this manner, the output voltage of sustain electrode driver circuit 44 is connected in parallel with all sustain electrodes 23. This is because sustain electrodes 23 do not need to be driven separately in the address periods and the sustain periods unlike scan electrodes 22, and the drive voltage is applied to all sustain electrodes 23 simultaneously.
  • Power recovery circuit 81 has power recovery capacitor C20, switching element Q21, switching element Q22, blocking diode Di21, blocking diode Di22, and resonance inductor L20.
  • Clamp circuit 82 has switching element Q23 for clamping sustain electrode SU1-sustain electrode SUn to voltage Vsus, and switching element Q24 for clamping sustain electrode SU1-sustain electrode SUn to the ground electric potential (voltage 0 (V)).
  • Sustain pulse generation circuit 80 generates sustain pulses by switching on and off each switching element, in response to the control signal supplied from control signal generation circuit 40. Thereby, the sustain pulse generation circuit applies sustain pulses to n sustain electrode SU1-sustain electrode SUn.
  • the operation of sustain pulse generation circuit 80 is similar to that of sustain pulse generation circuit 50, and thus the description is omitted.
  • sustain electrode SU1-sustain electrode SUn are kept clamped to voltage 0 (V) by turning on switching element Q24.
  • Sustain electrode driver circuit 44 includes the following elements:
  • capacitor C30, switching element Q28, switching element Q29, and power supply ⁇ VE are unnecessary.
  • Fig. 11 is a circuit diagram showing a configuration of data electrode driver circuit 42 of plasma display apparatus 30 in accordance with the exemplary embodiment of the present invention.
  • Data electrode driver circuit 42 has switching element Q1D1-switching element Q1Dm and switching element Q2D1-switching element Q2Dm.
  • Data electrode driver circuit 42 clamps data electrode D1-data electrode Dm separately to voltage Vd via switching element Q1D1-switching element Q1Dm, respectively.
  • the data electrode driver circuit grounds data electrode D1-data electrode Dm separately via switching element Q2D1-switching element Q2Dm, respectively, and clamps the data electrodes to voltage 0 (V).
  • data electrode driver circuit 42 drives data electrode D1-data electrode Dm separately so as to apply an address pulse at positive voltage Vd to data electrode D1-data electrode Dm.
  • the pulse width of the address pulse can be changed by controlling the switching time of switching element Q1D1-switching element Q1Dm and switching element Q2D1-switching element Q2Dm, in response to the control signal supplied from control signal generation circuit 40.
  • a subfield where generation of the sustain pulses is stopped is set in response to the magnitude of the signal level of an input image signal. This setting can reduce the electric power consumption in plasma display apparatus 30.
  • the pulse width of the address pulse and the pulse width of the scan pulse are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the immediately succeeding subfield in normal operation.
  • the pulse width of the address pulse and the pulse width of the scan pulse are equal to each other in all the subfields in normal operation, the following operation is performed.
  • the pulse width of the address pulse and the pulse width of the scan pulse are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the other subfields.
  • the start time of the subfield is advanced by the address period lengthened by extending the pulse width.
  • the address period is lengthened, all the subfields can fit in the period of one field.
  • the generation timing of the sustain period of each subfield can be made equivalent to that in normal operation. This can suppress variations in the temporal gravity center of luminance and prevent flickers.
  • the address operation may not be unstable even without increases in the pulse width of the address pulse and the pulse width of the scan pulse in the subfield immediately succeeding that subfield.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the subfield immediately succeeding these subfields may be extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the subfield in normal operation.
  • the above predetermined number of times is 3.
  • the pulse width of the address pulse and the pulse width of the scan pulse in the seventh SF immediately succeeding these subfields are extended longer than the pulse width of the address pulse and the pulse width of the scan pulse in the seventh SF in normal operation.
  • Such a structure for example, may be used.
  • the above predetermined number of times may be set appropriately for the characteristics of the panel, the specifications of the plasma display apparatus, or the like.
  • Each circuit block shown in the exemplary embodiment of the present invention may be formed as an electric circuit that performs each operation shown in the exemplary embodiment, or formed of a microcomputer, for example, programmed so as to perform the similar operations.
  • each control signal shown in this exemplary embodiment is not limited to the above polarity. As long as the configuration allows the operations similar to those in this exemplary embodiment, the polarity may be reverse to the above polarity.
  • one pixel is formed of discharge cells of R, G, and B three colors.
  • a panel that includes pixels, each formed of discharge cells of four or more colors, can use the configuration shown in this exemplary embodiment and provide the same advantages.
  • the above driver circuit only shows an example and the configuration of the driver circuit is not limited to the above configuration.
  • the specific numerical values shown in the exemplary embodiment of the present invention are set based on the characteristics of panel 10 that has a 50-inch screen and 768 display electrode pairs 24, and only show examples in the exemplary embodiment.
  • the present invention is not limited to these numerical values.
  • each numerical value is set optimally for the characteristics of the panel, the specifications of the plasma display apparatus, or the like. Variations are allowed for each numerical value within the range in which the above advantages can be obtained.
  • the number of subfields, the luminance weights of the respective subfields, or the like is not limited to the values shown in the exemplary embodiment of the present invention.
  • the subfield structure may be switched based on an image signal, for example.
  • the present invention can reduce electric power consumption while causing a stable address discharge even in a panel having high definition and a large screen size.
  • the present invention is useful as a driving method for the panel and a plasma display apparatus.

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KR100931441B1 (ko) * 2005-09-14 2009-12-11 파나소닉 주식회사 플라즈마 디스플레이 패널의 구동 장치, 구동 방법 및플라즈마 디스플레이 장치
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