EP2425681B1 - Circuit de pilotage pour un del - Google Patents

Circuit de pilotage pour un del Download PDF

Info

Publication number
EP2425681B1
EP2425681B1 EP10725007.8A EP10725007A EP2425681B1 EP 2425681 B1 EP2425681 B1 EP 2425681B1 EP 10725007 A EP10725007 A EP 10725007A EP 2425681 B1 EP2425681 B1 EP 2425681B1
Authority
EP
European Patent Office
Prior art keywords
circuit
switch
driver circuit
inductance
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP10725007.8A
Other languages
German (de)
English (en)
Other versions
EP2425681A1 (fr
Inventor
Michael Zimmermann
Eduardo Pereira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tridonic GmbH and Co KG
Original Assignee
Tridonic GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tridonic GmbH and Co KG filed Critical Tridonic GmbH and Co KG
Publication of EP2425681A1 publication Critical patent/EP2425681A1/fr
Application granted granted Critical
Publication of EP2425681B1 publication Critical patent/EP2425681B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/37Converter circuits
    • H05B45/3725Switched mode power supply [SMPS]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/37Converter circuits
    • H05B45/3725Switched mode power supply [SMPS]
    • H05B45/382Switched mode power supply [SMPS] with galvanic isolation between input and output

Definitions

  • the invention relates to a driver circuit for an LED according to the preamble of patent claim 1 and a method for driving an LED according to the preamble of patent claim 19.
  • Such driver circuits are used in lighting systems to achieve a colored or flat lighting of rooms, paths or escape routes.
  • the bulbs are driven by operating devices and activated as needed.
  • organic or inorganic light emitting diodes LED are used as the light source.
  • light-emitting diodes are also increasingly being used as the light source.
  • the efficiency and luminous efficacy of light-emitting diodes is being increased more and more so that they are already being used in various general lighting applications.
  • light emitting diodes are point sources of light and emit highly concentrated light.
  • a brightness change is often possible only with a complex control circuit, a simple connection to standard dimmers is not given, as it comes in conjunction with most dimmers to a flicker of light, or the dimmer does not work.
  • the solution according to the invention for a device for operating LEDs is based on the idea that a driver circuit for an LED has a connection for a mains voltage, a filter circuit and a rectifier, an inductance and a switch.
  • the inductor has a primary winding and a secondary winding coupled thereto.
  • the inductor is magnetized when the switch is closed, and the inductor is demagnetized when the switch is open, and at least during the demagnetization phase, the current through the inductor feeds the LED.
  • the switch-off duration of the switch may depend on the detected amplitude of the current through the LED.
  • the switch-off duration of the switch may additionally or alternatively be dependent on the degaussing current.
  • bypass circuit connected through a rectifier to the mains voltage terminal and deactivated when current flows through the rectifier into the inductor and the switch and / or the latch.
  • a bypass circuit is disabled whenever a current flows into the driver circuit for an LED.
  • a current flows into the driver circuit for an LED whenever a current flows through the inductor and the switch or into the buffer element via the rectifier.
  • a decoupling element or a current monitoring element can serve as a current detector.
  • the rectifier via which the bypass circuit is connected to the connection for a mains voltage, can either be the same rectifier, via which a current flows into the inductance and the switch or the buffer element, or there can be another rectifier in parallel to this first rectifier be.
  • the solution according to the invention also relates to a luminous means for an LED, with a base for the use of the luminous means in a commercial lamp base, comprising a driver circuit according to the invention are formed.
  • the invention also relates to a method for driving an LED, wherein the LED is driven via a driver circuit, and the driver circuit is fed from a terminal for a mains voltage via a filter circuit (L1) and a rectifier (GR1), and the driver circuit is a buffer element, an inductance (L2) and a switch (S1), wherein a bypass circuit (R40, Q4) provided at the output of the rectifier (GR1) is deactivated when a current flows through the rectifier (GR1) in driving circuit.
  • a bypass circuit R40, Q4
  • the driver circuit for an LED has a terminal for a mains voltage, a filter circuit (L1) and a rectifier (GR1), an inductance (L2) and a switch (S1).
  • the rectifier (GR1) is followed by a buffer element (C1), which preferably serves only to filter out high-frequency voltage changes and does not greatly smooth the voltage at the output of the rectifier (GR1).
  • the buffer element (C1) may be a capacitor, preferably a filter capacitor.
  • the inductance (L2) preferably has a primary winding (L2p) and a secondary winding (L2s) coupled thereto.
  • the inductance (L2) is magnetized when the switch is closed, and the inductance (L2) is demagnetized when the switch S1 is opened, and at least during the demagnetization phase, the current through the inductance (L2) feeds the LED.
  • the switch S1 is always opened only when the current through the switch S1 has reached a predetermined threshold.
  • the current through the switch S1 can be detected by means of a current detection Ip (for example, a current shunt).
  • the current detection Ip can also be done directly at the switch S1 (for example, in a so-called. SENSE FET, which contains an integrated monitoring of the current).
  • no time limit of the switch-on time duration is predetermined, but an infinite switch-on time of the switch S1 is also possible.
  • the switch-off duration of the switch S1 may be dependent on the detected amplitude of the current through the LED.
  • the feedback of the detection of the amplitude of the current through the LED is carried out electrically isolated (i.e., the control loop for the dependence of the switch-off duration of the switch S1).
  • the switch-off duration can, however, also be fixed, for example (fixed).
  • the switch-off duration of the switch S1 can, for example, also be directly or indirectly dependent on the degaussing current.
  • the switch S1 can be switched on whenever a demagnetization of the inductance (L2) is detected. However, a switch-on can always take place only when the inductance (L2) is de-magnetized, and a certain period of time can also be between the time of demagnetization and the restart.
  • the driver circuit may be connected to a commercial dimmer, and the switch S1 may be closed during the phases in which the dimmer cuts off a portion of the phase to pass a residual current across the inductor and the switch S1 and thus load the dimmer , This residual current through the switch S1 is preferably limited by the predetermined threshold in order to avoid overloading of the switch S1.
  • the inductance (L2) may be transformer (L2p, L2s), which serves as a potential-separating member.
  • the driver circuit can be transmitted by high-frequency clocking of the switch (S1) energy via the inductance (L2) to the light source (LED).
  • the switch (S1) may be, for example, a field-effect transistor, such as a MOSFET, or a bipolar transistor.
  • the monitoring of the current amplitude of the supply voltage Vin can be done by a monitoring circuit U1.
  • the monitoring circuit U1 can be, for example, an integrated circuit (for example an ASIC, microcontroller or DSP). Depending on the monitoring of the current amplitude of the supply voltage Vin, the monitoring circuit U1 can specify the threshold value for the opening of the switch S1.
  • the threshold value is preferably specified as already mentioned on the basis of the monitoring of the current amplitude of the supply voltage Vin.
  • only two values can be preset as a threshold value, the lower threshold value being given below a specific value when a supply voltage Vin is present, and the upper threshold value being specified when the supply voltage Vin is exceeded.
  • a plurality of threshold values are stored in a kind of table and these are specified according to the specifications of the table for different voltage ranges of the supply voltage Vin.
  • the monitoring circuit U1 can detect, for example, over the buffer element C1 or at the (positive) output of the rectifier GR1 or else, if present, before the decoupling element or the voltage difference across the decoupling element (preferably by a respective voltage measurement in front of and behind the decoupling element).
  • the voltage is measured by means of a voltage divider which picks up the voltage across the buffer element C1 or at the (positive) output of the rectifier GR1 and reduces it to a potential which can be evaluated by the monitoring circuit U1.
  • the monitoring circuit U 1 can also be designed (for example in high-voltage technology) so that it can directly detect the voltage across the buffer element C1 or at the (positive) output of the rectifier GR1.
  • the monitoring circuit U1 can also control the switch S1.
  • the monitoring circuit U1 can, on the one hand, monitor the current through the switch S1 by means of a current detection Ip (for example a current shunt) and, in addition, monitor the current amplitude of the supply voltage Vin.
  • the control of the switch (S1) may be dependent on further monitoring, for example, by monitoring the demagnetization of the inductance L2, the detected voltage of the LED or the detected amplitude of the current through the LED.
  • all feedbacks or monitors on the secondary side are electrically isolated, i. the feedback of the detected on the output side (secondary side) signals to the monitoring circuit U1 via a potential separation (for example by means of opto-coupler or transformer).
  • the switch-off duration of the switch S1 depends on the detected amplitude of the current through the LED.
  • the predetermined threshold may depend on the current amplitude of the supply voltage. In a simple variant, for example, if the supply voltage exceeds a certain value, an increase of the threshold value can take place.
  • the secondary winding L2s magnetically coupled to the primary winding L2p is connected to a rectifier (D2) and a smoothing circuit (C2) to which the LED can be connected.
  • the rectifier (D2) on the secondary winding L2s of the transformer can be formed by a diode D2 or by a full-wave rectifier.
  • the inductance L2 can feed a smoothing circuit during its demagnetization, this smoothing circuit can be, for example, a capacitor C2 or an LC (capacitor inductance C2-L3) or CLC (capacitor-inductance capacitor C2-L3-C3) filter.
  • the secondary side with the smoothing circuit (C2) is preferably designed so that a constant current supply of the LED is made possible.
  • the driver circuit with the monitoring circuit U1 can also be designed so that the switch (S1) is also kept closed when the light-emitting means (LED) is not in operation or is only supplied with a supply voltage Vin which is far below the nominal supply voltage Vin is, and always opened only when the current through the switch (S1) has reached a predetermined threshold.
  • the switch (S1) can be kept in the closed state, unless it is turned off by a corresponding active control.
  • the active drive to turn off (open) the switch (S1) by bridging the hold circuit or by lowering the drive level for the control terminal of the switch (S1).
  • the holding circuit can also be designed such that, as soon as a low voltage is present at the input of the driver circuit, it already keeps the switch (S1) closed, while the driver circuit does not yet start up.
  • a light source for an LED can be formed, with a base for use of the light source in a commercially available lamp base, comprising a driver circuit according to the invention.
  • the invention is based on an embodiment according to Fig. 2 .
  • Fig. 3 and Fig. 4 explained with a driver circuit for an LED.
  • Fig. 1 explains a connection for a mains voltage, which is followed by a rectifier GR1 and a filter circuit L1 and a latch element. This is followed by an inductance L2 and a switch S1.
  • the inductance L2 is magnetized when the switch S1 is closed, and the inductance L2 is demagnetized when the switch S1 is opened, and at least during the demagnetization phase, the current through the inductance L2 feeds the LED.
  • the driver circuit can be constructed as a boost converter circuit or as a flyback converter circuit.
  • the flyback converter circuit or the boost converter circuit is designed to be isolated, ie, the clocked inductance L2 of the driver circuit has a secondary winding L2s, which is magnetically coupled to the primary winding L2p of the inductance L2.
  • a current detector preferably a unidirectional decoupling element, is included between the rectifier GR1 and the latching element C1.
  • the decoupling element can be formed as a current detector by a diode D1.
  • a full-wave rectifier DV1 as decoupling element.
  • the current detector By means of the current detector, the current flow through the rectifier (GR1) in the inductance (L2) and the switch (S1) and / or the buffer (filter capacitor) (C1) can be monitored.
  • bypass circuit R40, Q4 which is deactivated when the current detector (for example the decoupling element) passes a current.
  • a bypass circuit (R40, Q4) is always activated when a current flows into the driver circuit for an LED.
  • a current in the driver circuit for an LED always flows when a current flows through the rectifier GR1 via the inductance L2 and the switch S1 or into the intermediate storage element.
  • the decoupling member thus acts as a current detector.
  • This voltage across the decoupling element can be monitored. Due to this monitoring can be done by a monitoring circuit U1.
  • This monitoring circuit U1 may be, for example, an integrated circuit.
  • the monitoring circuit U1 may activate or deactivate the bypass circuit (R40, Q4) depending on the monitoring of the decoupling element as a current detector.
  • the monitoring circuit U1 can detect, for example, only the voltage before the decoupling element or the voltage difference across the decoupling element (preferably by a respective voltage measurement in front of and behind the decoupling element).
  • the monitoring circuit U1 can also control the switch S1.
  • the decoupling element as a current detector can be formed by a diode D1. However, it is also possible to use a full-wave rectifier DV1 as decoupling element. By means of the current detector, the current flow through the rectifier (GR1) in the inductance (L2) and the switch (S1) and / or the filter capacitor (C1) can be monitored.
  • the driver circuit may be connected to a commercial dimmer, and the bypass circuit (R40, Q4) may be activated during phases in which the dimmer cuts off a portion of the phase to provide residual current through the bypass circuit (R40, Q4) and the inductor L2 and to guide the switch S1 and thus to load the dimmer.
  • the buffer element can be realized, for example, by a valley fill circuit ( Fig. 3 ) or else through a filter capacitor (smoothing capacitor) C1 ( Fig. 2 ) are formed.
  • the switch S1 can be switched on whenever a demagnetization of the inductance L2 is detected. However, a switch-on can always take place only when the inductance L2 is de-magnetized, and a certain period of time can also be between the time of demagnetization and the restarting.
  • the switch S1 can be driven, for example, by an integrated circuit for a power factor correction.
  • the monitoring circuit U1 may include a power factor correction control circuit.
  • the inductance L2 may be a transformer L2p, L2s, which serves as a potential-separating member.
  • the primary winding L2p of the transformer is connected in series with the switch S1.
  • the secondary winding L2s magnetically coupled to the primary winding L2p is connected to a rectifier (D2) and a smoothing circuit (C2) to which the LED can be connected.
  • the rectifier (D2) on the secondary winding L2s of the transformer can be formed by a diode D2 or by a full-wave rectifier.
  • the on and / or off duration of the switch S1 may be dependent on the detected amplitude of the current through the LED. Preferably, however, the switch-on and / or switch-off duration of the switch S1 does not decrease to zero or close to zero. In a simple variant, for example, a limitation of the current through the LED can be done by limiting the duty cycle.
  • the inductance L2 can feed a smoothing circuit (C2) during its demagnetization, this smoothing circuit (C2) can be, for example, a capacitor C2 or an LC or CLC filter.
  • the bypass circuit (R40, Q4) may be formed by a resistor R40 in series with a switch Q4.
  • the bypass circuit can also have a current source (constant current source) as a bridging circuit.
  • a current source constant current source
  • An example of a current source (constant current source) is in Fig. 4 shown.
  • Fig. 4 only a section of the driver circuit according to the invention for a light source is shown.
  • the current detector is formed here by current monitoring element R34.
  • the monitoring circuit U1 formed by a transistor Q5 and a resistor R30 connected to an internal power supply Vcc
  • the bypass circuit is deactivated.
  • the current flow through the current monitor R34 is the current that flows through the rectifier (GR1) into the inductance (L2) and the switch (S1) or the buffer element.
  • Fig. 4 is the monitoring circuit U1 discrete, but it can also as in the examples of Fig. 2 and 3 be designed as an integrated circuit.
  • an integrated circuit as a monitoring circuit U1 further functions such as the control of the switch S1 can be integrated with.
  • the bypass circuit is according to Fig. 4 formed by a current source (constant current source).
  • the current source (constant current source) is formed in detail by the transistors Q4 and Q6 and the resistors R40, R27 and R29.
  • the bypass circuit may be as in Fig. 4 represented via a full-wave rectifier D3 via the filter circuit L2 to the terminal for a mains voltage, parallel to the rectifier GR1 be connected.
  • the rectifier via which the bypass circuit (R40, Q4) is connected to the mains voltage connection, can either be the same rectifier, via which a current flows into the inductance and the switch or the buffer element (ie the rectifier GR1, see FIG Fig. 2 and 3 ), or another rectifier D3 may be connected in parallel with this first rectifier GR1 (see Fig. 4 ) to be available.
  • a method for driving an LED is enabled, wherein the LED is driven via a driver circuit, and the driver circuit is fed from a terminal for a mains voltage via a filter circuit (L1) and a rectifier (GR1), and the driver circuit a latch element, a Inductance (L2) and a switch (S1), and wherein a bypass circuit (R40, Q4) provided at the output of the rectifier (GR1) is deactivated when a current flows through the rectifier (GR1) in driving circuit.
  • a light source for an LED can be constructed, with a base for the use of the light source in a commercially available lamp base, comprising a driver circuit according to the invention. It can also be the embodiment of the Fig. 1 with the Fig. 2 to 4 be combined.
  • the switch S1 can always remain closed as long as the current through the switch S1 has not reached a predetermined threshold value, in addition an activatable bridging circuit (R40, Q4) can be present, which is activated only if a sufficient current flow is detected by the current detector has been. In this way, two current paths are formed over which current can flow, and thus the bypass circuit (R40, Q4) can be designed to generate only small additional losses in its activation (as compared to a solution without a second current path through the device) Switch (S1)).
  • an activatable bridging circuit R40, Q4
  • a driver circuit for a luminous means comprising a connection for a mains voltage, a rectifier GR1 and a filter circuit, a buffer element (C1), an inductance L2 and a switch S1 can also be formed, wherein the high-frequency clocking of the Switch S1 energy can be transmitted via the inductance to the lamp, and at the output of the rectifier GR1, a bypass circuit (R40, Q4) may be arranged such that it is activated when the light-emitting device (LED) is not in operation. This can be the case, for example, if no mains voltage or only a low voltage is applied far below the mains voltage.
  • the bridging circuit (R40, Q4) can thus be designed so that it is only deactivated when the light source (LED) is operated.
  • the bridging circuit (R40, Q4) may be connected, for example, so that without activation (activation) of this bypass circuit (R40, Q4), a current flow through them, as soon as a voltage across the bypass circuit (R40, Q4) is applied.
  • the bridging circuit (R40, Q4) can also be embodied such that, as soon as a low voltage is present at the input of the driver circuit, it already keeps the switch (S1) closed while the driver circuit per se does not yet start up.
  • bypass circuit R40, Q4 can only be deactivated in the phases when a current flow through the current detector is detected.
  • the bypass circuit (R40, Q4) has a switchable element, such as a transistor (Q4), which can be driven and thus disable the bypass circuit (R40, Q4).
  • the deactivation of the bypass circuit (R40, Q4) can be done by the monitoring circuit U1. Under the operation of the lamp (LED) is to understand that the driver circuit for driving and powering the LED is not in operation.
  • the lighting means may, for example, also be a gas discharge lamp.
  • a light source for an LED with a base for use of the light source in a commercial lamp base, comprising a driver circuit according to the invention.

Landscapes

  • Circuit Arrangement For Electric Light Sources In General (AREA)

Claims (13)

  1. Circuit d'attaque pour une DEL, présentant une connexion pour une tension du réseau, un circuit de filtrage (L1) et un redresseur (GR1), un élément de stockage intermédiaire, un commutateur (S1) et une inductance (L2) avec un enroulement primaire (L2p) et un enroulement secondaire (L2s) qui y est couplé,
    l'inductance (L2) étant magnétisée quand le commutateur (S1) est fermé, et l'inductance (L2) étant démagnétisée quand le commutateur (S1) est ouvert, et le courant alimentant la DEL à travers l'inductance (L2) au moins pendant la phase de la démagnétisation, le circuit d'attaque pouvant être connecté à un gradateur du commerce,
    un circuit de pontage (R40, Q4) couplé en parallèle étant présent à la sortie du redresseur (GR1) et étant désactivé quand un courant s'écoule dans l'inductance (L2) et le commutateur (S1) et/ou l'élément de stockage intermédiaire par le biais du redresseur (GR1), et le circuit de pontage (R40, Q4) étant activé pendant les phases dans lesquelles le gradateur coupe une partie de la phase pour conduire un courant résiduel par le biais du circuit de pontage (R40, Q4) et charger ainsi le gradateur.
    caractérisé en ce qu'un détecteur de courant est contenu entre le circuit de pontage (R40, Q4) et l'élément de stockage intermédiaire (C1) et, au moyen du détecteur de courant, le courant cité plus haut qui traverse le redresseur (GR1) et s'écoule dans l'inductance (L2) et le commutateur (S1) et/ou l'élément de stockage intermédiaire (C1) peut être surveillé.
  2. Circuit d'attaque pour une DEL selon la revendication 1,
    caractérisé en ce que
    le détecteur de courant est formé par un organe de découplage (D1), en particulier par une diode.
  3. Circuit d'attaque pour une DEL selon la revendication 1,
    caractérisé en ce que
    le détecteur de courant est formé par un organe de surveillance de courant (R34).
  4. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 3,
    caractérisé en ce que
    l'élément de stockage intermédiaire est formé par un condensateur de filtrage (C1).
  5. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 4,
    caractérisé en ce que
    l'élément de stockage intermédiaire est formé par un circuit Valley Fill.
  6. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 5,
    caractérisé en ce que
    le commutateur (S1) est toujours mis en circuit quand une démagnétisation de l'inductance (L2) est constatée.
  7. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 6,
    caractérisé en ce
    qu'une mise en circuit du commutateur (S1) n'intervient dans tous les cas que lorsque l'inductance (L2) est démagnétisée.
  8. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 7,
    caractérisé en ce que
    l'inductance (L2) sert d'organe de séparation de potentiel.
  9. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 8,
    caractérisé en ce que
    la durée de mise en circuit et de mise hors circuit du commutateur (S1) dépend de l'amplitude du courant à travers la DEL qui a été détecté.
  10. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 9,
    caractérisé en ce que,
    lors de sa démagnétisation, l'inductance (L2) alimente un circuit de lissage (C2).
  11. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 10,
    caractérisé en ce que
    le circuit de pontage (R40, Q4) est formé par une résistance (R40) en série avec un commutateur (Q4).
  12. Circuit d'attaque pour une DEL selon l'une des revendications 1 à 11,
    caractérisé en ce que
    le circuit de pontage (R40, Q4) présente une source de courant.
  13. Moyen lumineux pour une DEL, avec un socle destiné à l'introduction du moyen d'éclairage dans un socle de lampe du commerce, présentant un circuit d'attaque selon l'une des revendications précédentes.
EP10725007.8A 2009-04-03 2010-04-02 Circuit de pilotage pour un del Active EP2425681B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
AT2142009 2009-04-03
AT17692009 2009-11-09
PCT/EP2010/002134 WO2010112238A1 (fr) 2009-04-03 2010-04-02 Circuit d'attaque pour del

Publications (2)

Publication Number Publication Date
EP2425681A1 EP2425681A1 (fr) 2012-03-07
EP2425681B1 true EP2425681B1 (fr) 2017-07-19

Family

ID=42562774

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10725007.8A Active EP2425681B1 (fr) 2009-04-03 2010-04-02 Circuit de pilotage pour un del

Country Status (3)

Country Link
EP (1) EP2425681B1 (fr)
CN (1) CN102450100B (fr)
WO (1) WO2010112238A1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101762443B1 (ko) * 2011-03-24 2017-07-27 엘지이노텍 주식회사 드라이버 ic 입력단의 방전 경로 회로
KR101787762B1 (ko) * 2011-08-09 2017-10-18 엘지이노텍 주식회사 드라이버 ic 입력단의 방전 경로 회로
US20130257297A1 (en) * 2012-03-27 2013-10-03 Ge Hungary Kft. Lamp comprising high-efficiency light devices
AT14041U1 (de) * 2013-04-30 2015-03-15 Tridonic Gmbh & Co Kg Betriebsschaltung für Leuchtdioden mit Filterelement
DE102016221741A1 (de) * 2016-11-07 2018-05-09 Tridonic Gmbh & Co Kg Treiber für eine Leuchtdiode und Verfahren

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005115058A1 (fr) * 2004-05-19 2005-12-01 Goeken Group Corp. Circuit de gradation pour del comprenant un moyen permettant de maintenir le courant dans un triac

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4236894B2 (ja) * 2002-10-08 2009-03-11 株式会社小糸製作所 点灯回路
JP2006164727A (ja) * 2004-12-07 2006-06-22 Koito Mfg Co Ltd 車両用灯具の点灯制御回路
JP2007080771A (ja) * 2005-09-16 2007-03-29 Nec Lighting Ltd 照明用低圧電源回路、照明装置および照明用低圧電源出力方法
US7656103B2 (en) * 2006-01-20 2010-02-02 Exclara, Inc. Impedance matching circuit for current regulation of solid state lighting
US7649327B2 (en) * 2006-05-22 2010-01-19 Permlight Products, Inc. System and method for selectively dimming an LED
AT515913B1 (de) * 2007-06-15 2016-01-15 Tridonic Gmbh & Co Kg Betriebsgerät zum betreiben einer lichtquelle, insbesondere led

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005115058A1 (fr) * 2004-05-19 2005-12-01 Goeken Group Corp. Circuit de gradation pour del comprenant un moyen permettant de maintenir le courant dans un triac

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
RAND D ET AL: "Issues, Models and Solutions for Triac Modulated Phase Dimming of LED Lamps", POWER ELECTRONICS SPECIALISTS CONFERENCE, 2007. PESC 2007. IEEE, IEEE, PISCATAWAY, NJ, USA, 17 June 2007 (2007-06-17), pages 1398 - 1404, XP031218489, ISBN: 978-1-4244-0654-8 *

Also Published As

Publication number Publication date
WO2010112238A1 (fr) 2010-10-07
EP2425681A1 (fr) 2012-03-07
CN102450100B (zh) 2015-07-22
CN102450100A (zh) 2012-05-09

Similar Documents

Publication Publication Date Title
DE102006006026B4 (de) Beleuchtungssteuereinheit für eine Fahrzeugbeleuchtungsvorrichtung
DE102011007229A1 (de) Dimmbare LED-Stromversorgung mit Leistungsfaktorsteuerung
DE112015006564T5 (de) System und Verfahren zur Steuerung von Festkörperlampen
EP2829157B1 (fr) Circuit de commande pour diodes électroluminescentes avec signal de variation de lumière issu d`un signal en trains d'impulsions modulés a haute fréquence, avec des fréquences accordées
EP2425681B1 (fr) Circuit de pilotage pour un del
DE112014002232B4 (de) Betriebsschaltung für LED
WO2013090957A1 (fr) Appareil de fonctionnement à correction du facteur de puissance et limitation d'ondulation par changement de fonctionnement
EP2837265B1 (fr) Transducteur pour un moyen d'éclairage, convertisseur del et procédé pour faire fonctionner un transducteur résonant llc
WO2012045475A1 (fr) Circuit de fonctionnement pour diodes électroluminescentes
EP2523533B1 (fr) Circuit de ballast pour diodes luminescentes
EP2952061B1 (fr) Dispositif de fonctionnement de del
EP2425679B1 (fr) Circuit d'excitation pour une led
DE112015006565T5 (de) Festkörperbeleuchtungs-Treiberschaltung mit Vorschaltgerät-Kompatibilität
EP2420108B1 (fr) Circuit de commande pour leds
AT12495U1 (de) Fehlererkennung für leuchtdioden
DE102013211767A1 (de) Betriebsschaltung für leuchtdioden
DE102017119999B4 (de) Verfahren zur Vermeidung des Überschreitens von Stromgrenzwerten in einer lichtemittierenden Diode sowie Steuereinrichtung zur Durchführung des Verfahrens
EP2510750B1 (fr) Circuit d'excitation pour une del
DE102015210510A1 (de) Schaltungsanordnung zum Betreiben mindestens eines ersten und eines zweiten LED-Strangs an einer Wechsel- oder einer Gleichspannungsquelle
EP2992738B1 (fr) Reconnaissance d'erreur pour del
DE102015217146A1 (de) Getaktete Sperrwandlerschaltung
DE202018100418U1 (de) Schaltungsanordnung zum Betreiben eines Leuchtmittels
EP3086626B1 (fr) Circuit de ballast, eclairages et procede de detection d'un signal de commande
DE102011086446A1 (de) Benutzersteuerung für eine LED
WO2011130770A1 (fr) Ballast pour diodes électroluminescentes

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20111117

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

DAX Request for extension of the european patent (deleted)
17Q First examination report despatched

Effective date: 20121220

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20170407

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Free format text: LANGUAGE OF EP DOCUMENT: GERMAN

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 911581

Country of ref document: AT

Kind code of ref document: T

Effective date: 20170815

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 502010013884

Country of ref document: DE

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20170719

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171019

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171020

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171019

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171119

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 502010013884

Country of ref document: DE

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 9

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

26N No opposition filed

Effective date: 20180420

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: TR

Payment date: 20180516

Year of fee payment: 9

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20180430

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180402

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180430

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180430

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180430

REG Reference to a national code

Ref country code: DE

Ref legal event code: R084

Ref document number: 502010013884

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180402

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20190426

Year of fee payment: 10

REG Reference to a national code

Ref country code: DE

Ref legal event code: R079

Ref document number: 502010013884

Country of ref document: DE

Free format text: PREVIOUS MAIN CLASS: H05B0033080000

Ipc: H05B0045000000

REG Reference to a national code

Ref country code: AT

Ref legal event code: MM01

Ref document number: 911581

Country of ref document: AT

Kind code of ref document: T

Effective date: 20190402

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190402

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20100402

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170719

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20170719

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20200430

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20220419

Year of fee payment: 13

P01 Opt-out of the competence of the unified patent court (upc) registered

Effective date: 20230530

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20230427

Year of fee payment: 14

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20230402

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20230402

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20230402