EP2396814A2 - Method for producing a connection between a semiconductor component and semiconductor module resistant to high temperatures and temperature changes by means of a temperature impinging process - Google Patents
Method for producing a connection between a semiconductor component and semiconductor module resistant to high temperatures and temperature changes by means of a temperature impinging processInfo
- Publication number
- EP2396814A2 EP2396814A2 EP10710533A EP10710533A EP2396814A2 EP 2396814 A2 EP2396814 A2 EP 2396814A2 EP 10710533 A EP10710533 A EP 10710533A EP 10710533 A EP10710533 A EP 10710533A EP 2396814 A2 EP2396814 A2 EP 2396814A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- temperature
- connection
- sintering
- semiconductor
- suspension
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000000034 method Methods 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 239000000725 suspension Substances 0.000 claims abstract description 23
- 238000005245 sintering Methods 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 239000000843 powder Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 238000010943 off-gassing Methods 0.000 claims abstract description 4
- 239000007787 solid Substances 0.000 claims abstract description 3
- 239000007789 gas Substances 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000001035 drying Methods 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 238000003825 pressing Methods 0.000 claims description 2
- 230000001737 promoting effect Effects 0.000 claims 1
- 239000003039 volatile agent Substances 0.000 claims 1
- 230000006835 compression Effects 0.000 abstract 2
- 238000007906 compression Methods 0.000 abstract 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 229910052709 silver Inorganic materials 0.000 description 7
- 239000004332 silver Substances 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 5
- 238000005304 joining Methods 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 239000011261 inert gas Substances 0.000 description 3
- 238000009766 low-temperature sintering Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000005496 tempering Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 235000019013 Viburnum opulus Nutrition 0.000 description 2
- 244000071378 Viburnum opulus Species 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 210000000078 claw Anatomy 0.000 description 2
- 238000005056 compaction Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000002146 bilateral effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000009189 diving Effects 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 238000000462 isostatic pressing Methods 0.000 description 1
- 230000033001 locomotion Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000002028 premature Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
- 239000012855 volatile organic compound Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/275—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/27505—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/83054—Composition of the atmosphere
- H01L2224/83065—Composition of the atmosphere being reducing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/83054—Composition of the atmosphere
- H01L2224/83075—Composition of the atmosphere being inert
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83205—Ultrasonic bonding
- H01L2224/83207—Thermosonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83905—Combinations of bonding methods provided for in at least two different groups from H01L2224/838 - H01L2224/83904
- H01L2224/83907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/8484—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Definitions
- the invention relates to a method for creating a high-temperature and temperature-resistant connection of a module semiconductor and a semiconductor device with a temperature-applying method.
- a complex step in the production of sintered compounds as described for example in DE 10 2006 033 073 B3 of the Applicant, are in the actual sintering (the so-called final sintering) required pressures of more than 30 MPa, by a special apparatus have to be applied for a few seconds to a few minutes.
- the invention is based on the finding that by selecting a suitable metal powder suspension by activating this, either by local, low pressure of for example 5 MPa or by heating to z. B. 25O 0 C, the sintering process can be initiated so far that a transport-resistant fixation for processing by further manufacturing steps takes place.
- an electrical component with metallic contact surfaces with either a silver or a gold surface by materially joined to a substrate material in several stages of production, without a critical sintering pressure is applied.
- circuit substrate can be used as a substrate material, such as.
- a substrate material such as.
- organic printed circuit boards PCB, ceramic circuit boards, DCB, metal core circuit boards, IMS or conductor leadframes, stamped grid, hybrid ceramic circuit carrier, etc.
- the electrotechnical component can be an inexhaustible Halbeiterbauelement or a gemoldetes, d. H. be cased semiconductor device.
- Electrical contact terminals SMD-B auimplantation or the like can also be connected to each other with the cohesive joining method according to the invention.
- connection tact-fast ie when heated for a few seconds.
- Fixing and sintering are separate processes. The fixing takes place predominantly by a clawing in the surface of the joining partners or the silver joining layers.
- the subsequent sintering is carried out without pressure in a heating furnace at temperatures between 170 ° C to 300 ° C, so it may be easily inserted in a transport line for components.
- the atmosphere for certain metal suspension layers can optionally be adjusted with an inert or reactive gas. Nitrogen is suitable as the inert gas, for example, and forming gas or inert gas saturated with formic acid can be used as the reactive gas.
- FIG. 1 shows a metallized device placed over a precoated and dried metal suspension layer.
- FIG. 3 shows the elements of FIG. 2 after an unpressurised temperature control step, which ensures preferably complete volume sintering, FIG.
- FIG. 4 shows a lower and further metallized component on a previously applied and dried metal suspension layer as in Fig. 1,
- FIG. 6 shows the elements of FIG. 5, wherein the contact tab with the other elements is fixed by low pressure
- FIG. 7 shows the elements of FIG. 6 after a pressure-free tempering step, which ensures a preferably complete volume sintering of all fixed contact positions
- a substrate material or a chip backside, or in a preferred embodiment on both surfaces to be joined, is applied in a uniform layer thickness by means of a layer containing silver particles, preferably with a stencil printer. This is done selectively at the points where the device is to be placed or, if applied to the chip, a full surface.
- Other application techniques, in particular spraying, are conceivable.
- diving or spin-on of a silver particle solution would cause problems with layer-wide variance.
- the layer After application, the layer is dried and freed from the volatile organic compounds. Temperatures of up to 150 0 C support the process to ensure high clock rates. The dried layer produced thereby has a large porosity and a large roughness.
- the electrotechnical component is brought to a predetermined position by a component gripping and depositing device and unilateral or bilateral silver layers applied to the components are pressed together by the force applied during the application and clawed together. This is a short 0.1 to 3 second placement process, with the required force only enough to reshape the rough surface and claw each other.
- the bracket by Verkrallen does not have to meet the requirements for later use but only be so strong that during the process of locomotion in the manufacture of the components no longer slip.
- the two-dimensional clawing of the rough dried metal layer in a silver or gold surface provides for easy adhesion.
- a snowball sticks to a cement wall, or even snow, when a snowball is formed.
- the adhesion can be improved again by increasing the temperature up to, for example, 150 ° C. In the example "snow" this would be equivalent to a wet snow.
- Step 4 In a fourth step, the component thus fixed is finally subjected to a subsequent heat process without further pressure, wherein a diffusion of the silver atoms into the interface of the joining partner and vice versa takes place, so that the desired high temperature and temperature change resistant, for motor vehicle applications also stable connection over many years.
- FIG. 1 shows a pre-metallized component which is precoated with an example of about 50 micrometers and at a temperature of about 50 micrometers. temperature of less than 140 ° C for a few minutes (preferably 1-3 minutes) dried metal suspension layer is placed. A suitable pre-compaction of the layer in order to store it better, and to avoid abrasion, may have already taken place on the layer before the component is fixed.
- a layer produced in the same or a similar way - even in order to use it as similar to a pre-metallization - may also have already been sintered. It is sufficient if a layer still consists only of dried, non-sintered paste / suspension.
- a pressure of 1-10 MPa, preferably 2-6 MPa, and herein more preferably for a second less than 5 MPa can be exercised.
- Fig. 3 shows the elements of FIG . 2 after a non-pressurized tempering, at paste-dependent temperatures of typically more than 230 0 C, which ensures a preferably complete volume sintering. Reactive process gases can accelerate sintering.
- Figs. 4 to 7 show, as representative of many possible elements, a contact tab is fixed by low pressure with the assembly in the same way.
- the erfmdungshacke method for creating a high-temperature and tempe- ratur pizzafesten connection of a module semiconductor and a semiconductor device with a temperaturbeetzier waveden method in which a metal powder suspension is applied to the areas of the individual semiconductor devices to be joined later, the suspension layer with outgassing of the volatile constituents and dried to form a porous layer, then precompressed the porous layer, without a complete, the Sus- pensionstik penetrating sintering takes place, wherein to obtain a solid electrically and thermally well-conductive compound of a semiconductor device on a connection partner from the group: substrate, further semiconductor or circuit carrier, the compound is a sintered compound produced without pressing pressure by increasing the temperature, which consists of a dried metal powder suspension consists, in a Vorverdichtungsuze with the connection partner has undergone a first transport-resistant contact with the connection partner, and was solidified under temperature Ausausung unpressurized in a preferred embodiment can be extended daurch that more than one side of
- the atmosphere in a sealed chamber
- the atmosphere may be enriched with an inert or reactive gas during heating.
- the inert gas may preferably contain nitrogen as a main component.
- the reactive gas proposed is one with a predominant constituent of forming gas.
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102009008926.8A DE102009008926B4 (en) | 2009-02-13 | 2009-02-13 | Process for creating a high-temperature and temperature-change-resistant connection of a semiconductor component with a connection partner and a contact lug using a temperature-loading process |
PCT/DE2010/000127 WO2010091660A2 (en) | 2009-02-13 | 2010-02-04 | Method for producing a connection between a semiconductor component and semiconductor module resistant to high temperatures and temperature changes by means of a temperature impinging process |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2396814A2 true EP2396814A2 (en) | 2011-12-21 |
Family
ID=42271896
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10710533A Ceased EP2396814A2 (en) | 2009-02-13 | 2010-02-04 | Method for producing a connection between a semiconductor component and semiconductor module resistant to high temperatures and temperature changes by means of a temperature impinging process |
Country Status (6)
Country | Link |
---|---|
US (1) | US9287232B2 (en) |
EP (1) | EP2396814A2 (en) |
JP (1) | JP5731990B2 (en) |
CN (1) | CN102396057B (en) |
DE (1) | DE102009008926B4 (en) |
WO (1) | WO2010091660A2 (en) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011114558A1 (en) * | 2011-09-30 | 2013-04-04 | Osram Opto Semiconductors Gmbh | Component and method for producing this device |
DE102012207652A1 (en) | 2012-05-08 | 2013-11-14 | Robert Bosch Gmbh | Two-stage process for joining a semiconductor to a substrate with silver-based compound material |
US8835299B2 (en) | 2012-08-29 | 2014-09-16 | Infineon Technologies Ag | Pre-sintered semiconductor die structure |
JP5664625B2 (en) | 2012-10-09 | 2015-02-04 | 三菱マテリアル株式会社 | Semiconductor device, ceramic circuit board, and semiconductor device manufacturing method |
JP2015115481A (en) * | 2013-12-12 | 2015-06-22 | 株式会社東芝 | Semiconductor component and method of manufacturing semiconductor component |
DE102014104272A1 (en) * | 2014-03-26 | 2015-10-01 | Heraeus Deutschland GmbH & Co. KG | Carrier and clip each for a semiconductor element, method of manufacture, use and sintering paste |
DE102014206606A1 (en) * | 2014-04-04 | 2015-10-08 | Siemens Aktiengesellschaft | Method for mounting an electrical component on a substrate |
DE102014114096A1 (en) | 2014-09-29 | 2016-03-31 | Danfoss Silicon Power Gmbh | Sintering tool for the lower punch of a sintering device |
DE102014114097B4 (en) | 2014-09-29 | 2017-06-01 | Danfoss Silicon Power Gmbh | Sintering tool and method for sintering an electronic assembly |
DE102014114093B4 (en) * | 2014-09-29 | 2017-03-23 | Danfoss Silicon Power Gmbh | Method for low-temperature pressure sintering |
DE102015210061A1 (en) * | 2015-06-01 | 2016-12-01 | Siemens Aktiengesellschaft | Method for electrical contacting of a component and component module |
DE102016108000B3 (en) * | 2016-04-29 | 2016-12-15 | Danfoss Silicon Power Gmbh | Method for materially connecting a first component of a power semiconductor module to a second component of a power semiconductor module |
TWI655693B (en) * | 2017-02-28 | 2019-04-01 | 日商京瓷股份有限公司 | Manufacturing method of semiconductor device |
DE102017113153B4 (en) * | 2017-06-14 | 2022-06-15 | Infineon Technologies Ag | Electronic device with chip with sintered surface material |
WO2019208071A1 (en) * | 2018-04-27 | 2019-10-31 | 日東電工株式会社 | Manufacturing method for semiconductor device |
JP7143156B2 (en) | 2018-04-27 | 2022-09-28 | 日東電工株式会社 | Semiconductor device manufacturing method |
FR3121278A1 (en) * | 2021-03-26 | 2022-09-30 | Safran Electronics & Defense | Method for assembling an electronic component to a substrate by pressing |
DE102021116053A1 (en) | 2021-06-22 | 2022-12-22 | Danfoss Silicon Power Gmbh | Electrical conductor, electronic assembly with an electrical conductor and method for manufacturing an electronic assembly with an electrical conductor |
DE102021121625B3 (en) * | 2021-08-20 | 2022-11-03 | Danfoss Silicon Power Gmbh | Method for producing an electronic assembly having at least one active electronic component and at least one passive component |
EP4224521A1 (en) | 2022-02-07 | 2023-08-09 | Siemens Aktiengesellschaft | Semiconductor device comprising a semiconductor element with a contacting element produced by thermal spraying, and a method of producing the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006352080A (en) * | 2005-05-16 | 2006-12-28 | Fuji Electric Holdings Co Ltd | Semiconductor device and its manufacturing method |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6077178A (en) * | 1983-09-30 | 1985-05-01 | 株式会社東芝 | Ceramic bonded body and manufacture |
IN168174B (en) | 1986-04-22 | 1991-02-16 | Siemens Ag | |
EP0275433B1 (en) * | 1986-12-22 | 1992-04-01 | Siemens Aktiengesellschaft | Method for mounting electronic components on a substrate, foil to carry out the method and method to produce the foil |
JPS6412404A (en) * | 1987-07-06 | 1989-01-17 | Hitachi Ltd | Conductor material |
US4902648A (en) * | 1988-01-05 | 1990-02-20 | Agency Of Industrial Science And Technology | Process for producing a thermoelectric module |
US6069380A (en) * | 1997-07-25 | 2000-05-30 | Regents Of The University Of Minnesota | Single-electron floating-gate MOS memory |
US6930451B2 (en) * | 2001-01-16 | 2005-08-16 | Samsung Sdi Co., Ltd. | Plasma display and manufacturing method thereof |
US7296727B2 (en) * | 2001-06-27 | 2007-11-20 | Matsushita Electric Industrial Co., Ltd. | Apparatus and method for mounting electronic components |
EP1280196A1 (en) * | 2001-07-18 | 2003-01-29 | Abb Research Ltd. | Process for bonding electronic devices to substrates |
JP2006511098A (en) * | 2002-10-11 | 2006-03-30 | チエン−ミン・ソン | Carbonaceous heat spreader and related methods |
WO2004049402A2 (en) * | 2002-11-22 | 2004-06-10 | Saint-Gobain Ceramics & Plastics, Inc. | Zirconia toughened alumina esd safe ceramic composition, component, and methods for making same |
US20050127134A1 (en) | 2003-09-15 | 2005-06-16 | Guo-Quan Lu | Nano-metal composite made by deposition from colloidal suspensions |
JP2007527102A (en) | 2004-02-18 | 2007-09-20 | バージニア テック インテレクチュアル プロパティーズ インコーポレーテッド | Nanoscale metal pastes for interconnection and methods of use |
JP2006202586A (en) * | 2005-01-20 | 2006-08-03 | Nissan Motor Co Ltd | Bonding method and bonding structure |
JP4638382B2 (en) * | 2006-06-05 | 2011-02-23 | 田中貴金属工業株式会社 | Joining method |
JP2008010703A (en) * | 2006-06-30 | 2008-01-17 | Fuji Electric Holdings Co Ltd | Method for bonding between components of semiconductor device |
DE102006033073B3 (en) | 2006-07-14 | 2008-02-14 | Danfoss Silicon Power Gmbh | A method of providing a heat and impact resistant connection of the package semiconductor and semiconductor device configured for pressure sintering |
JP2008153470A (en) * | 2006-12-18 | 2008-07-03 | Renesas Technology Corp | Semiconductor apparatus and manufacturing method of semiconductor apparatus |
JP5151150B2 (en) * | 2006-12-28 | 2013-02-27 | 株式会社日立製作所 | Composition for forming conductive sintered layer, and method for forming conductive film and bonding method using the same |
WO2008081758A1 (en) * | 2006-12-28 | 2008-07-10 | Tokuyama Corporation | Process for producing metallized aluminum nitride substrate |
JP4872663B2 (en) * | 2006-12-28 | 2012-02-08 | 株式会社日立製作所 | Joining material and joining method |
JP4873160B2 (en) * | 2007-02-08 | 2012-02-08 | トヨタ自動車株式会社 | Joining method |
US8555491B2 (en) | 2007-07-19 | 2013-10-15 | Alpha Metals, Inc. | Methods of attaching a die to a substrate |
DE102007035788A1 (en) * | 2007-07-31 | 2009-02-05 | Robert Bosch Gmbh | Wafer joining process, wafer assembly and chip |
-
2009
- 2009-02-13 DE DE102009008926.8A patent/DE102009008926B4/en active Active
-
2010
- 2010-02-04 EP EP10710533A patent/EP2396814A2/en not_active Ceased
- 2010-02-04 JP JP2011549430A patent/JP5731990B2/en active Active
- 2010-02-04 US US13/148,848 patent/US9287232B2/en active Active
- 2010-02-04 CN CN201080016442.5A patent/CN102396057B/en active Active
- 2010-02-04 WO PCT/DE2010/000127 patent/WO2010091660A2/en active Application Filing
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006352080A (en) * | 2005-05-16 | 2006-12-28 | Fuji Electric Holdings Co Ltd | Semiconductor device and its manufacturing method |
Non-Patent Citations (4)
Title |
---|
BAI J G ET AL: "Processing and Characterization of Nanosilver Pastes for Die-Attaching SiC Devices", IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, IEEE, PISCATAWAY, NY, US, vol. 30, no. 4, October 2007 (2007-10-01), pages 241 - 245, XP011192995, ISSN: 1521-334X, DOI: 10.1109/TEPM.2007.906508 * |
See also references of WO2010091660A2 * |
SVEN KLAKA: "Eine Niedertemperatur-Verbindungstechnik zum Aufbau von Leistungshalbleitermodulen", 1997, CUVILLIER VERLAG, GÖTTINGEN, DEUTSCHLAND, ISBN: 978-3-89588-771-0, article "Kapitel 3: Der Verbindungsmechanismus", pages: 9 - 41, XP001526263 * |
SVEN KLAKA: "Eine Niedertemperatur-Verbindungstechnik zum Aufbau von Leistungshalbleitermodulen", 1997, CUVILLIER VERLAG, GÖTTINGEN, DEUTSCHLAND, ISBN: 978-3-89588-771-0, article "Kapitel 5: Aufbau von Leistungsmodulen", pages: 83 - 105, XP001526265 * |
Also Published As
Publication number | Publication date |
---|---|
CN102396057B (en) | 2014-04-02 |
WO2010091660A2 (en) | 2010-08-19 |
US9287232B2 (en) | 2016-03-15 |
JP5731990B2 (en) | 2015-06-10 |
US20120037688A1 (en) | 2012-02-16 |
WO2010091660A3 (en) | 2011-06-03 |
DE102009008926B4 (en) | 2022-06-15 |
CN102396057A (en) | 2012-03-28 |
DE102009008926A1 (en) | 2010-08-19 |
JP2012517704A (en) | 2012-08-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE102009008926B4 (en) | Process for creating a high-temperature and temperature-change-resistant connection of a semiconductor component with a connection partner and a contact lug using a temperature-loading process | |
DE102013216633B4 (en) | Pre-sintered semiconductor chip structure and method of manufacture | |
EP1774841B1 (en) | Method for the production of a metal-ceramic substrate | |
DE102014103013B4 (en) | Method for producing a dried paste layer, method for producing a sintered connection and continuous system for carrying out the method | |
WO2005013352A2 (en) | Method for the production of a semiconductor element with a plastic housing and support plate for carrying out said method | |
WO2008006340A1 (en) | Method for heat- and impact-resistant connection of a semiconductor by means of pressure sintering | |
EP2847787A1 (en) | Two-step method for joining a semiconductor to a substrate with connecting material based on silver | |
EP3103138A1 (en) | Method for mounting an electrical component in which a hood is used, and a hood that is suitable for use in this method | |
EP2390904A2 (en) | Method for low temperature pressure interconnection of two connection partners and assembly manufactured using same | |
EP2382659A1 (en) | Electrical or electronic composite component and method for producing an electrical or electronic composite component | |
WO2001075963A1 (en) | Method for producing a heat-conducting connection between two work pieces | |
EP2183185B1 (en) | Wafer joining method, wafer assemblage, and chip | |
DE102010024520A9 (en) | Method for increasing the thermo-mechanical resistance of a metal-ceramic substrate | |
WO2003097557A1 (en) | Method for producing a ceramic-copper composite substrate | |
EP2982226B1 (en) | Method for producing a circuit board element | |
EP2147739A2 (en) | Nobel metal based connection means in the form of a foil with a solid faction and a liquid fraction and application and production method for same | |
DE102014220204A1 (en) | Method for producing a solder joint and component assembly | |
DE19742072B4 (en) | Method for producing pressure-tight plated-through holes | |
DE102015107712B3 (en) | Method for producing a circuit carrier | |
DE10221876B4 (en) | Method for producing a ceramic-copper composite substrate | |
EP3720639B1 (en) | Method for producing a structural unit and method for connecting a component to such a structural unit | |
EP1085792B1 (en) | Process for manufacturing a circuit board, and circuit board | |
DE102014114132A1 (en) | Metal-ceramic substrate and method for producing a metal-ceramic substrate | |
DE10047525B4 (en) | A method of producing a shaped article using a raw material containing silicon carbide in powder or particulate form and copper, and shaped articles thus produced | |
WO2006058799A1 (en) | Envelopment of components arranged on a substrate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20110811 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR |
|
DAX | Request for extension of the european patent (deleted) | ||
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: DANFOSS SILICON POWER GMBH |
|
17Q | First examination report despatched |
Effective date: 20121218 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: EXAMINATION IS IN PROGRESS |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: EXAMINATION IS IN PROGRESS |
|
APBK | Appeal reference recorded |
Free format text: ORIGINAL CODE: EPIDOSNREFNE |
|
APBN | Date of receipt of notice of appeal recorded |
Free format text: ORIGINAL CODE: EPIDOSNNOA2E |
|
APBR | Date of receipt of statement of grounds of appeal recorded |
Free format text: ORIGINAL CODE: EPIDOSNNOA3E |
|
APAF | Appeal reference modified |
Free format text: ORIGINAL CODE: EPIDOSCREFNE |
|
P01 | Opt-out of the competence of the unified patent court (upc) registered |
Effective date: 20230713 |
|
APBT | Appeal procedure closed |
Free format text: ORIGINAL CODE: EPIDOSNNOA9E |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R003 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED |
|
18R | Application refused |
Effective date: 20240108 |