EP2377169A2 - Cellule solaire et procédé de fabrication d'une cellule solaire à partir d'un substrat de silicium - Google Patents

Cellule solaire et procédé de fabrication d'une cellule solaire à partir d'un substrat de silicium

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Publication number
EP2377169A2
EP2377169A2 EP09771303A EP09771303A EP2377169A2 EP 2377169 A2 EP2377169 A2 EP 2377169A2 EP 09771303 A EP09771303 A EP 09771303A EP 09771303 A EP09771303 A EP 09771303A EP 2377169 A2 EP2377169 A2 EP 2377169A2
Authority
EP
European Patent Office
Prior art keywords
layer
silicon substrate
masking layer
solar cell
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09771303A
Other languages
German (de)
English (en)
Inventor
Daniel Biro
Oliver Schultz-Wittmann
Anke Lemke
Jochen Rentsch
Florian Clement
Marc Hofmann
Andreas Wolf
Luca Gautero
Sebastian Mack
Ralf Preu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
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Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Publication of EP2377169A2 publication Critical patent/EP2377169A2/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868—Passivation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H01L31/02245—Electrode arrangements specially adapted for back-contact solar cells for metallisation wrap-through [MWT] type solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a method for producing a solar cell with a front and a back of a silicon substrate and a solar cell, produced by this method.
  • n- or p-doped silicon wafer For producing solar cells from a silicon substrate, a variety of methods are known. Typically, such processes, starting with a homogeneously n- or p-doped silicon wafer, comprise the following process steps: creation of a texture to improve the optical properties on the front side of the silicon substrate, diffusion on the front side to generate an emitter and formation of a pn junction, Removing a silicate glass forming in the previous diffusion; Applying an antireflective layer for further improving the optical properties on the front side of the silicon substrate and finally applying metallizations on the front and back of the solar cell, for electrically contacting the emitter via the front side metallization and the remaining substrate (the base) via the backside metallization.
  • the entire backside is typically covered over the entire surface with an aluminum-silicon mixture.
  • This has the disadvantage that due to the low passivation effect, ie a high recombination rate and thus a loss of charge carrier pairs for the electrical energy production, a reduction of the efficiency of the solar cell takes place.
  • the back side of such a solar cell has a low optical reflection effect, so that electromagnetic radiation entering the solar cell via the front side is partially absorbed at the rear side and thus is not available for further generation of charge carrier pairs. This causes a further reduction in the efficiency of the solar cell.
  • the layer structure consists of a first layer of SiO x N ⁇ : H and a layer of SiN x : H.
  • the object of the present invention is to propose an alternative process sequence which leads to a passivation, in particular the reverse side of the solar cell, which is improved compared to previously known methods and / or permits a good passivation effect with simpler and more cost-effective process steps. Furthermore, the present invention provides a process which on the one hand increases the efficiency of the solar cell produced by this process and on the other hand makes it possible to integrate the new process into known production processes in a simple manner.
  • the method according to the invention for producing a solar cell having a front side and a rear side made of a silicon substrate, in particular a silicon wafer comprises the following method steps:
  • a method step A at least one side of the silicon substrate is texturized to improve the absorption upon exposure of the solar cell to electromagnetic radiation and / or removal of the sawing damage on at least one side of the silicon substrate.
  • sawing damage is meant such impurities and unevennesses or disturbances in the crystal structure at the surfaces of the silicon substrate which are produced by cutting one block during the production of the silicon substrate KOH or a NaOH solution containing isopropyl alcohol or other organic constituents.
  • etching is preferably carried out in a mixture of HNO 3 and HF.
  • a texture is carried out via further wet-chemical processes and / or masking (for example photolithographic steps) or is carried out by means of plasma or laser processes.
  • the method is carried out on an already homogeneously doped silicon substrate, alternatively, a homogeneous doping of the silicon substrate as an upstream process step is within the scope of the invention.
  • an emitter region is produced at least at partial regions of at least one side of the silicon substrate by diffusion of at least one dopant.
  • the dopant is chosen such that an opposite doping takes place in comparison to the homogeneous doping of the silicon substrate.
  • the method is applied to homogeneously p-doped silicon substrates, so that correspondingly an n-doped emitter is produced in method step B.
  • d. H there is a reversal within the scope of the invention, d. H.
  • a glass layer takes place on at least one side of the silicon substrate, wherein the glass layer contains the dopant.
  • the removal takes place on the front and back of the silicon substrate.
  • the glass layer can be formed, for example, during the diffusion of a dopant from the gas phase or, in step B, a glass layer containing the dopant can first be applied for the purpose of diffusion of the dopant.
  • a masking layer is applied at least on at least one partial area of at least one side of the silicon substrate, wherein the masking layer is a dielectric layer.
  • a method step E at least part of the material of the silicon substrate is removed on at least one side of the silicon substrate and / or at least one side of the surface is conditioned.
  • Conditioning is a surface treatment which causes better electrical passivation of the conditioned surface to be achieved in a subsequent passivation step, preferably the conditioning involves a slight removal of material.
  • the emitter is removed at the surface regions of the silicon substrate at which no emitter is desired, for example at the rear side of the silicon substrate when producing a standard solar cell structure.
  • additionally after removal of the emitter or alternatively only surface conditioning takes place at least of partial areas of the surface of the silicon substrate.
  • metallization structures are applied to the front and / or rear side of the silicon substrate for electrical contacting of the solar cell, in particular for electrically contacting the homogeneously doped region of the silicon substrate on the one hand and the emitter region on the other hand. It is essential that a thermal oxidation is carried out between process steps E and F in a process step E2 to form a thermal oxide layer in a partial area of the front and / or rear side of the silicon substrate which is not covered by the masking layer applied in step D. , In the method according to the invention, there is thus an at least partial covering of at least one side of the silicon substrate with the oxide layer formed by means of thermal oxidation.
  • both the masking layer and the oxide layer are not removed again from the solar cell in the subsequent process steps.
  • both the masking layer and the oxide layer essentially remain on the solar cell, ie, in particular, no complete removal of the oxide layer or the masking layer takes place .
  • the masking layer and the oxide layer serve to improve the surface passivation and / or the optical properties with respect to electromagnetic radiation entering the solar cell.
  • the thermal oxidation preferably takes place in a tube furnace or in a continuous flow system, preferably in a process atmosphere in which an oxygen source, for example oxygen or ozone in the form of O 2 or O 3 , is contained.
  • an oxygen source for example oxygen or ozone in the form of O 2 or O 3
  • water vapor is preferably also contained in the process atmosphere.
  • DCE dichloroethylene
  • this can also be carried out under elevated pressure in the process space.
  • the method according to the invention thus differs from previously known methods in that first of all the two layers mentioned remain on the solar cell.
  • the method according to the invention differs in particular in that a thermal oxide layer is applied by means of thermal oxidation.
  • the term "oxide layer” here denotes a layer produced by thermal oxidation, which typically results from the oxidation of the surface of the silicon substrate, as a result of which the oxide layer may contain silicon and be formed, for example, as an SiO 2 layer or in a different stoichiometric ratio as SiO x layer.
  • the use of an oxide layer has the advantage that, while at the same time very good passivation of the surface, a low density of charges built into the passivation layer is achieved.
  • the formation of high densities of positive charges in the passivating layers can lead to negative charges accumulating as mirror charge at the interface with this layer within the silicon. It is known that these mirror charges can form an inversion layer and lead to a loss of current of the solar cell via a short circuit with the rear contacts.
  • oxide layer produced by means of thermal oxidation has the advantage that such oxide layers have a good passivatable interface to the surface of the silicon substrate, since due to the oxidation, the oxide layer "grows" slightly into the substrate surface and therefore more suitable Surface compared with deposited by other methods oxide layers.
  • an oxide layer is only conditionally suitable as an antireflection layer for a solar cell, as long as an encapsulation of the solar cell in a module is desired.
  • the refractive index of an oxide layer produced by means of thermal oxidation is disadvantageous for the optical properties of the solar cell.
  • passivation for example, the back of a solar cell by means of an oxide layer also forms an oxide layer on the front of the solar cell, which leads to the disadvantages mentioned in terms of optical properties.
  • the effect proves to be disadvantageous that on textured surfaces, such as the front of a solar cell in thermal oxidation, an oxide layer grows faster than on a planar surface, such as typically the back of the solar cell.
  • a further disadvantage is that the formation of an oxide layer by means of thermal oxidation on a surface on which an emitter region is formed leads to a partial consumption of the emitter region, so that the electrical properties of the solar cell are impaired.
  • the masking layer therefore has the property that it inhibits the formation of an oxide layer, in particular on thermal oxidation on the masking layer. Investigations by the applicants have shown that such an effect inhibits the formation of an oxide layer, in particular when the masking layer is formed as a silicon nitride layer or as a silicon carbide layer.
  • the masking layer is formed on that side of the solar cell at which the exposure of the solar cell takes place with electromagnetic radiation and to form the masking layer as an antireflection layer.
  • the masking layer is formed as a silicon nitride layer, since the use of a silicon nitride layer is common as an antireflection layer, and thus previously known process sequences can be used.
  • a thickness of the antireflection layer in a range between 50 nm to 150 nm, in particular in a range of 60 nm to 100 nm and preferably in one range from 65 nm to 90 nm advantageous.
  • the masking layer can be applied in various ways, preferably by PECVD, sputtering or APCVD.
  • the refractive index of the masking layer is preferably about 2, 1. However, refractive indices of 1.9-2.7, in particular 2.0-2.3, can also be usefully used. In particular, it is advantageous if the refractive index within the layer assumes different values.
  • the masking layer in method step D is essentially applied only to a masking layer side which is the front or the back side of the silicon substrate. This is desirable, for example, if, as described above, the masking layer is designed as an antireflection layer and is applied, for example, on the front side of the silicon substrate.
  • the masking layer is formed such that it is not or only slightly removed by certain processes for material removal, in particular by certain etching processes.
  • the masking layer thus serves in this preferred embodiment of the method according to the invention not only for masking when generating the oxide layer in step E2, but also for masking in step E, such that in step E at those areas of the surface of the silicon substrate covered by the masking layer are, no or only slightly removed material.
  • the masking layer applied in step D and the process of material removal in step E are therefore coordinated such that the material removal in step E does not remove the masking layer, or only slightly.
  • the masking layer is formed, for example, as a silicon nitride layer, then this layer is largely resistant to etching by: concentrated alkaline media such as KOH, NaOH, NH4OH, acidic media such as concentrated HCl or HNO3 even at elevated temperatures, dilute HF and certain mixtures containing hydrogen peroxide such as HCI + H2O2, NH4OH + H2O2.
  • this resistance is sufficient to remove silicon in areas where silicon is not covered by the layer (for example, to remove doped or otherwise interfering areas) and / or to condition the uncovered areas Steps (such as a thermal oxidation) to allow a very high-grade electrical passivation, while the mask protects the areas that are not to be processed while not insignificant or otherwise attacked by choosing a suitable output thickness and on the solar cell especially as an antireflective layer may remain.
  • a masking layer is nevertheless at least partially at least partially formed on the side of the silicon substrate opposite the masking layer side.
  • a unilateral material removal takes place on the side of the silicon substrate opposite the masking layer side, for removal of any undesired manner on the side of the masking layer opposite the masking layer side.
  • step E therefore, exclusively and / or additionally a one-sided material removal is carried out, such that the masking layer is removed on this side.
  • the masking layer is embodied, for example, as a silicon nitride layer
  • this layer can be etched with the following etching media, for example, whereby underlying silicon can subsequently be removed (the resistances are dependent on the density and composition of the layer and increase with increasing density): concentrated HF , concentrated mixtures of HF and water and HNO3 as well as hot and concentrated phosphoric acid.
  • concentrated HF concentrated HF
  • concentrated mixtures of HF and water and HNO3 as well as hot and concentrated phosphoric acid.
  • This unilateral material removal preferably takes place by means of rolling on of a corrosive, preferably acidic substance, in particular by means of rolling on a mixture of at least HF and water or at least HNO 3 and HF and water.
  • the rolling is preferably carried out in a continuous system.
  • a plasma etching process can also be used (for example by means of SF 6 or NF 3 or CF 4 , or F 2 or by means of chlorine-containing plasmas).
  • excitation sources various methods can be used: microwave, radio frequency, low frequency, radio frequency, DC, expanding plasma excitation plasma. These processes can also be suitable for pure conditioning without significant silicon removal (see below) if the process settings are suitably selected.
  • the one-sided removal of material takes place first and then a surface conditioning of the silicon substrate takes place, preferably by means of an etching process by means of a KOH solution. It is also within the scope of the invention to carry out only a surface conditioning of the unmasked areas.
  • a material removal typically a layer is removed with a thickness of at least 1 micron
  • a pure surface conditioning is typically a removal of a layer with a thickness less than 0.1 microns in some types of surface conditioning also no material removal.
  • the surface conditioning is preferably carried out by an etching process, in particular by means of an alkaline solution, in particular by means of a solution which contains KOH and / or NaOH and / or NH 4 OH.
  • the surface conditioning preferably additionally or alternatively comprises the following steps:
  • the semiconductor process technology includes cleaning processes such as RCA, SC1, SC2, piranha, ozone-assisted cleaning Ohmi Clean and IMEC Clean known and used in conjunction with the present invention.
  • the masking layer advantageously has a density between 2.3 g / cm 3 to 3.6 g / cm 3 , in particular between 2.5 g / cm 3 to 3.6 g / cm 3 , preferably between 2 , 6 g / cm 3 to 3.6 g / cm 3 , most preferably between 2.65 g / cm 3 to 3.6 g / cm 3 .
  • a masking layer with higher density has a greater resistance to subsequent process steps, in particular etching steps.
  • the masking layer When forming the masking layer as an antireflection layer, it is advantageous to apply a metallization to the antireflection layer in step F and to effect an at least partial penetration of this metallization through the antireflection layer so that the metallization is electrically conductive with the silicon substrate underlying the antireflection layer, or here trained emitter area is connected. Likewise, it is within the scope of the invention to structure the coatings prior to the metallization so that the metallization does not have to penetrate the layers because the silicon is already accessible.
  • the inventive method is suitable for the production of so-called standard solar cells, d. H. Solar cells, which have an emitter on the front and a corresponding typically comb-like metallization on the front for electrical contacting of the emitter and on the back of a typical weeds ganzflambaige metallization for contacting the emitter opposite doped silicon substrate.
  • the rear side is not homogeneously metallized over the entire surface, but has at least one, preferably two solderable, metallized regions for connecting the solar cell to other solar cells in the case of module interconnection, preferably by means of solder contacts.
  • the method according to the invention is likewise suitable for the formation of more complex structures of solar cells, for example by producing only local contacts between the metallization of the rear side.
  • the back substantially over the entire surface with at least the Apply by thermal oxidation applied oxide layer then apply a full-surface metal layer and locally to create a penetration of the metal layer through the oxide layer, for example by local thermal melting by means of a laser (so-called laser-fired contacts).
  • a plurality of recesses are formed in the silicon substrate prior to method step A in a method step AO, which pass through the silicon substrate essentially perpendicular to the front side.
  • the recesses are preferably produced with an average diameter of 20 .mu.m to 3 mm, in particular 30 .mu.m to 200 .mu.m, preferably 40 .mu.m to 150 .mu.m.
  • metallizations are applied in method step F both on the front side and on the rear side of the silicon substrate, and additionally, the metallizations of the front side are conducted by means of metallizations in the recesses on the rear side of the silicon substrate.
  • the metallizations on the rear side are formed in such a way that backside metallizations and the metallizations passed through the recesses have no electrical contact.
  • a MWT solar cell is produced, which has the advantage that both the negative and the positive pole of the electrical contact via the back of the solar cell is electrically contacted.
  • a process D2 is advantageously inserted between the process steps D and E, in which a masking occurs in regions, which prevents the emitter is removed in the subsequent step E if a corresponding Etching process is applied in E.
  • the masking takes place in particular in the recesses and in adjacent silicon areas. After performing process E, the masking applied in D2 can be removed.
  • the metallization of the solar cell can be achieved that is also in the holes and on the back of the solar cell emitter, which can be contacted. This makes it possible to connect the metallization of the front side through the holes with a metallization of the rear side, without causing a short circuit of the areas separated by the pn junction, since this metallization covers the emitter regions separately from the remaining metallization of the back side and thus has no electrical contact to the base.
  • the hydrogen content and / or the silicon content of the layer is preferably chosen such that the resistance of the layer (which is influenced by the hydrogen content, see, for example, Dekkers et al., Solar Energy Materials and Solar Cells, 90 (FIG. 2006) 3244-3250)) for the subsequent process steps.
  • an electrically insulating layer is applied in the recesses between the method steps E2 and F. This prevents the metalization in the recesses from penetrating into the substrate when the metallization is carried out through the recesses and leading to recombination centers or short-circuits.
  • This layer can be, for example, the oxide layer and / or the masking layer, or it can be partially covered in the recesses by the oxide layer and / or partially covered in the recesses by the masking layer. It is likewise within the scope of the invention to form the method according to the invention for producing so-called emitter wrap-through (EWT solar cells).
  • the sequence of the method steps essentially corresponds to the sequence in the production of a MWT solar cell.
  • EWT solar cells there are no or no metallizations in the recesses which are sufficient with regard to the electrical conductivity from front to rear. Instead, emitters are guided on the walls of the recesses from the front to the back of the silicon substrate, so that in this way the emitter can be contacted on the back and is electrically conductively connected to the emitter on the front side via the emitter formation on the hole walls. Accordingly, in this advantageous embodiment, no metallization is applied to the front side in method step F, but both the metallizations for contacting the emitter and the metallizations for contacting the base are applied to the rear side.
  • the masking layer is advantageously applied in step D as an antireflection layer on the front side of the silicon substrate and, accordingly, the oxide layer is applied in step E2 by means of thermal oxidation on the back side of the silicon substrate.
  • the oxide layer is applied in step E2 by means of thermal oxidation on the back side of the silicon substrate.
  • the measuringment structure is applied by means of a screen-printing method.
  • the masking layer as an antireflection layer, in particular the formation as a silicon nitride layer, has the advantage that the masking layer provides protection against all essential process steps for the surface of the underlying silicon substrate, whereas a metal-containing screen printing paste applied to the masking layer can be applied using the usual method Process steps penetrates the masking layer, in particular the silicon nitride layer and thus there is an electrical connection between the metallization structure and lying below the masking layer emitter.
  • step E2 This is due to the fact that antireflection layers, in particular a silicon nitride layer, of the commonly used screen printing pastes which are frit-containing in the typically applied temperature step. be penetrated.
  • antireflection layers in particular a silicon nitride layer
  • the property that the masking layer can be penetrated in a firing process remains despite the thermal oxidation (step E2).
  • process step F first a printing of a metallizing paste by means of screen printing on the front side, d. H. on the masking layer and then printing the back with a metal-containing layer, preferably with a silver-containing paste on the front and an aluminum-containing paste on the back.
  • a metal-containing layer preferably with a silver-containing paste on the front and an aluminum-containing paste on the back.
  • a temperature step for producing the contacts of the front wherein the back can already be contacted when, for example, in the backside coating openings are introduced, or the LFC process shown below takes place before the temperature step for producing the contacts of the front.
  • LFC contacting laser fired contacts
  • a reflow of the applied aluminum layer and the underlying layers, including a thin layer is selectively effected at the back by means of a laser Area of the silicon substrate takes place, so that after re-solidification of the molten area, an electrical contact between the aluminum layer and the silicon substrate.
  • amplification of the metallization by galvanic processes can also be achieved after contact formation. It is particularly advantageous that possible defects in the masking layer deposited in step D are covered by thermal oxide by the process of thermal oxidation, and thus parasitic deposition of metals in the electroplating process can be prevented.
  • an annealing process takes place in which the quality of the passivation layers and / or the contact can be improved.
  • a process can be carried out under different atmospheres. For example, mixtures of hydrogen and nitrogen, or hydrogen and argon are possible. It is also possible to use purified compressed air or only nitrogen.
  • a tube furnace or a continuous system can be used as a process device.
  • FIG. 1 and 1 a a schematic representation of an embodiment of the method according to the invention for producing a solar cell with front and rear contacts
  • 3 and 3a a schematic representation of a further embodiment of the method according to the invention for producing a MWT solar cell
  • FIG. 4 shows the front side of the solar cell produced by means of the method illustrated in FIG. 1, 1 a,
  • FIG. 5 shows the front side of a solar cell produced by means of the method illustrated in FIG. 2, 2 a, 2 b or 3, 3 a and 3
  • FIG. 6 shows the back side of a solar cell produced by means of the method illustrated in FIG. 2, 2 a, 2 b or 3, 3 a.
  • the silicon substrate 1 is each formed as a monocrystalline silicon wafer, with an approximately square area with an edge length of about 12.5 cm.
  • the thickness of the wafer is about 250 microns.
  • the wafer is homogeneously p-doped.
  • Figures 1 to 3 each show a schematic, not to scale cross-section through the silicon substrate 1, wherein the front 1 a above and the back 1 b is shown below.
  • the cross section does not show in the figures 2 to 3, the entire width of the silicon substrate, but only a section thereof.
  • the number of identical elements is reduced, for example, the number of contacts 6a.
  • a method step A the texturing of the front side 1a takes place in an alkaline solution which contains KOH.
  • the wafer is immersed in a potash solution.
  • the solution can contain not only the potassium hydroxide but also organic additives such as isopropanol.
  • the temperature of the solution is in the range of about 80 ° C.
  • the concentration of potassium hydroxide and isopropanol are about 1 to 7%.
  • the wafer is then cleaned in HCl (hydrochloric acid) (10%, 1 min, room temp.) And a final HF (hydrofluoric acid) etching process (1%, 1 min, room temp.).
  • an emitter 2 is generated on all surfaces of the silicon substrate 1 in a step B by means of phosphorus diffusion from the gas phase.
  • a dopant source for example, phosphorus oxychloride POCl 3 can be used as the dopant source.
  • the POCI 3 is deposited on the wafer and the diffusion takes place at temperatures of about 850 0 C for about 50 minutes.
  • Diffusion process can also be carried out, in which only partial areas of the wafer are provided with a diffusion, so that an emitter is formed only at partial areas of the surface of the silicon substrate.
  • the phosphosilicate glass forming upon diffusion of the emitter is removed from the surfaces of the silicon substrate.
  • the wafer is immersed in hydrofluoric acid (about room temp. And about 5% HF in water) for 2 minutes.
  • a step D is then substantially on the front side 1a of the silicon substrate 1 as a silicon nitride (SiN x) formed masking layer 3 is applied, which has a refractive index of about 2,. 1
  • the layer 3 is produced with a thickness of about 80 nm, wherein the layer thickness can be adjusted depending on the subsequent process steps in the initial thickness in order to have an optimal thickness after completion of the process.
  • the coating takes place on the side of the wafer which faces the light.
  • PECVD Physical-enhanced Chemical Vapor Deposition
  • a step E takes place a removal of material of the silicon substrate 1, wherein the masking layer 3 prevents erosion, unless the removal takes place anyway by a one-sided acting method, in which substances can be used, which could attack layer 3, so that after Completion of method step E of the emitters diffused in method step B has been removed, with the exception of the front side region of silicon substrate 1 covered by masking layer 3.
  • the wafer is coated on one side with a liquid HNO 3 : HF mixture. This removes possible residues of SiN on the back (HNO 3 : nitric acid)
  • the wafer is dipped in a potassium hydroxide solution (10% KOH, 5 min, 80 ° C.) to flatten the wafer surface and possibly remove any remaining emitters which are not covered with SiN. Thereafter, the surface is conditioned in several steps, preferably with the specified process parameters:
  • NH4OH H2O2 (ammonium hydroxide: hydrogen peroxide in water; (NH4OH 7, 1wt%, H2O2 1wt%, 10min, 65 ° C)
  • HCl H2O2 (hydrochloric acid: hydrogen peroxide in water, HCl 8.5wt%, H2O2 1wt%, 10min, 65 ° C)
  • an oxide layer 4 is applied by means of thermal oxidation.
  • the masking layer 3 formed as a silicon nitride layer inhibits the structure of an oxide layer, so that the oxide layer 4 is formed substantially exclusively on the surfaces of the silicon substrate 1 that are not covered by the masking layer 3.
  • the thermal oxidation takes place in a water vapor-containing atmosphere (about 800 0 C, 20 min). The result is an oxide layer with a thickness of about 15 nm.
  • Other process temperatures for example in the range of (550 ° C.-1050 ° C.)
  • times for example in the range (10 to 300 minutes) for the oxidation can also be selected to produce suitable layers.
  • the oxidation time can in particular oxidation temperatures of 700 ° C-1050 ° C with an oxidation time in the range 2 min - 180 min, and particularly advantageously oxidation temperatures of 750 0 CI OOO 0 C with an oxidation time in the range 3 min - 80 min chosen.
  • a second layer 4a is applied to the oxide layer 4 in a method step E3, which is formed as a multilayer structure with a layer sequence of silicon oxynitride and silicon nitride.
  • a comb-like metallization structure 5 is applied by screen printing to the front side of the silicon substrate 1, ie to the masking layer 3, a silver-containing screen printing paste being used to produce the front side metallization.
  • other metal pastes can be used which make contact with silicon.
  • step F1 the reverse side is likewise provided with a backside metallization 6 by means of screen printing (thickness approx. 30 ⁇ m), which is constructed correspondingly on the layer system consisting of oxide layer 4 and second layer 4a.
  • step F2 finally takes place a so-called "through firing" of the front-side contacts 5, that is, a temperature step is carried out (at about 850 0 C), which results in a penetration of the front-side contacts 5 through the masking layer 3, so that an electrical Contact between front side contacts 5 and emitter area is created.
  • the metallization of the rear side takes place via the application of a thin aluminum layer (about 2 ⁇ m) by means of PVD, preferably after carrying out the through-firing step.
  • the solar cell is subjected to a low-temperature process (about 350 ° C., 5 minutes) in a forming gas atmosphere (N 2 / H 2 mixture 95% / 5%).
  • the process parameters of the individual process steps can also be used, for example, as in the cited publication Industrial Type Cz Silicon Solar Cells With Screen-Printed Fine Line Front Contacts And Passivated Rear-Fired By Laser Firing.
  • Industrial Type Cz Silicon Solar Cells With Screen-Printed Fine Line Front Contacts And Passivated Rear-Fired By Laser Firing Marc Hofmann et al., 23rd European Pho tovoltaic Solar Energy Conference and Exhibition, 1-5 September 2008, Valencia, Spain.
  • An essential difference, however, is that no thermal oxide is applied to the rear side of the silicon substrate in the cited publication, but instead a layer system is produced by means of PECVD.
  • FIGS. 2, 2a and 2b show an exemplary embodiment of the method according to the invention for producing a MWT solar cell.
  • the method for producing a MWT solar cell according to FIGS. 2, 2 a and 2 b includes an upstream process step A 0, not illustrated, in which a plurality of recesses, which are preferably cylindrical holes, are formed in the silicon substrate 1 in the silicon substrate 1. With a laser, the recesses are produced in the silicon wafer. These holes have a diameter of approx. 60 ⁇ m. Likewise, other hole geometries are possible.
  • step B the emitter also forms on the walls of the recesses 11.
  • a protective hole filling 12 is formed in the recesses.
  • the protective hole filling 12 is embodied such that it covers a region of the rear side in addition to the walls of the recess around the recesses on the rear side of the silicon substrate 1.
  • a protective hole filling for example, on organic substances constituting pastes or paints, which have corresponding resistances. Inorganic compounds may also be suitable here.
  • the protective hole filling can also be formed after method step B or C.
  • step E of the emitter not only on the front and the hole walls of the recess 1 1, but also remains on a portion of the back of the silicon substrate 1.
  • step E the state is already shown after the protective hole filling has been removed.
  • the insertion and removal of the protective hole fillings takes place, for example, by local printing (arranging the substance is also possible by other technologies, eg dispensing, inking) of a substance on the back of the wafer and in the holes (at least the holes must be covered) which (the substance) in the subsequent process steps, in which the silicon is attacked on the uncoated areas, this protects.
  • On the back and in the holes remain areas of (4) which have not been removed. Before oxidation, the substance is still removed.
  • a layer system with an oxide layer 4 and a second layer 4a formed as a multilayer system is formed on the rear side of the silicon substrate. Consequently, this layer system also partially extends on the walls of the recesses 11.
  • a step F the metallization takes place, wherein the front side contacts 5 are formed in this embodiment as vias, which penetrate the recesses and thus represent an electrical contact from the front to the back, which is a contacting of the E-mitters of the Rear side of the solar cell allowed.
  • the front side contacts 5 are designed such that on the one hand they penetrate the recesses, on the other hand on the back side of the silicon However, substrate cover at most an area that is smaller than the area covered by the emitter on the back. As a result, short circuits are avoided, which would occur if the front side contact 5 would form an electrical contact to the p-doped region of the silicon substrate.
  • the contact through can also be performed by using different pastes, the front side contacts 5 are not initially performed in the recesses and on the back.
  • the feedthrough is created by using another via paste 5a which makes electrical contact with the front side contacts 5.
  • a predetermined area is recessed on the rear side of the silicon substrate between front side contacts 5 and rear side metallization 6.
  • the generation of the front side contacts 5 and rear side metallization 6 comprises the following method steps:
  • step # 2 Firing of the contacts (at approx. 850 ° C.) 5.
  • step # 2 application (for example, by printing) of the via paste in step # 2 is made to step # 4 or step # 5, or after the below-mentioned low temperature process.
  • the via paste can for example also be formed only as a conductive adhesive or solder paste and only has to have metallic components in order to establish contact with the front side contact 5 and to ensure a contact feedthrough.
  • the solar cell is subjected to a low-temperature process (about 350 ° C, 5 min) in a Formiergasatmospstone (N2 / H2 mixture 95% / 5%).
  • the exemplary embodiment of the method according to the invention illustrated in FIGS. 2, 2a and 2b represents a preferred method for the production of MWT solar cells, in which the protective hole fillings in step D2 and the second center 2 correspondingly partly remaining on the rear side are particularly small high safety results in that no short circuits between n-doped regions and p-doped regions of the solar cell or between front side contacts and backside metallization occur and therefore an impairment of the efficiency of the solar cell is avoided by short circuits.
  • FIGS. 3 and 3 a show a second exemplary embodiment of the method according to the invention for producing a MWT solar cell.
  • the emitter remains only on the front side 1 a of the silicon substrate and not on the (largely uncovered by layer 3) hole walls of the recesses 1 1 and not on portions of the back of the silicon substrate. 1 Accordingly, the front side metallization after passing through the recesses 1 1 at the back on the layer system. Since the layer system is not electrically conductive, there is no short circuit of the to the p-doped region of the silicon substrate. However, in comparison to the method described with reference to FIGS. 2, 2a and 2b, there is a greater risk that there is a short circuit between the front side contacts 5 and the p-doped region of the silicon substrate either on the rear side or on the hole walls of the recesses 11. In return, the manufacturing method described with reference to FIGS. 3 and 3a is much simpler and more economical to realize.
  • step F comprises in the exemplary embodiment illustrated in FIGS. 3 and 3a the following method steps:
  • front side contacts 5 preferably silver-containing
  • the solar cell is subjected to a low-temperature process (about 350 ° C, 5 min) in a Formiergasatmospstone (N2 / H2 mixture 95% / 5%).
  • FIG. 4 shows a schematic representation of the front side 1 a of the solar cell produced by means of the method illustrated in FIGS. 1, 1 a in a plan view.
  • a comb-like metallization structure, which forms the front side contacts 5, is formed on the masking layer 3 formed as an antireflection layer.
  • FIG. 5 is a schematic plan view of the front side of a solar cell produced by means of the method illustrated in FIGS. 2, 2a and 2b or FIGS. 3 and 3a.
  • no comb-like metallization structure formed in order to increase the light coupling to the the side of the solar cell no comb-like metallization structure formed. Instead, a plurality of parallel metallization lines 8 are formed on the masking layer 3, each extending over the recesses in the silicon substrate, wherein in each of the recesses through metallizations are formed, which extend from the front to the back of the solar cell.
  • the position of the through-metallizations is indicated by circles and exemplified by reference numeral 9.
  • the metallization lines 8 are thus part of the front side contacts, which are designated in the sectional images of Figures 2, 2a and 2b or Figures 3 and 3a with reference numeral 5.
  • FIG. 6 shows the rear side of a solar cell produced by means of the method illustrated in FIGS. 2, 2a and 2b or FIGS. 3 and 3a in a plan view.
  • the rear side has three large-area rear side metallization regions 13, 13 'and 13 ", and line-like metallization regions 7 and 7' are formed between the regions, with a gap between the metallization regions, so that the individual metallization regions are electrically insulated from one another.
  • the backside metallization regions 13, 13 'and 13 "thus correspond to the backside metallizations 6 illustrated in FIGS. 2, 2a and 2b or FIGS. 3 and 3a. These backside metalization regions are electrically conductively connected to one another via the base.
  • the metallization regions 7 and 7 ' run along the recesses in the silicon substrate and perpendicular to the metallization lines 8 on the front side of the solar cell. These metallization regions are electrically conductively connected to one another via the emitter.
  • the metallization regions 7 and 7 'thus correspond to the front side contacts 5a shown in FIGS. 2, 2a and 2b or FIGS. 3 and 3a.
  • the metallization lines 7 are thus electrically conductively connected to all the metallization lines 8. In this way, the base of the solar cell can thus be contacted via the metallizations 13, 13 'and 13 "and the emitter of the solar cell via the metallizations 7 and 7'.

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Abstract

Procédé de fabrication d'une cellule solaire comportant une face avant et une face arrière, à partir d'un substrat de silicium (1), en particulier d'une tranche de silicium, qui comporte les étapes suivantes : (A) production d'une texture sur au moins une face du substrat de silicium (1) pour améliorer l'absorption en cas d'exposition de la cellule solaire à un rayonnement électromagnétique et/ou élimination des défauts de sciage sur au moins une face du substrat de silicium (1), (B) production d'au moins une zone d'émission (2) au moins par endroits, sur au moins une face du substrat de silicium (1) par diffusion d'au moins une substance de dopage, pour former au moins une jonction pn, (C) élimination d'une couche de verre sur au moins une face du substrat de silicium (1), la couche de verre contenant la substance de dopage, (D) application d'une couche de masquage (3) au moins sur une partie d'au moins une face du substrat de silicium (1), la couche de masquage (3) étant une couche diélectrique, (E) élimination d'au moins une partie de la matière du substrat de silicium (1) sur au moins une face dudit substrat (1) et/ou traitement de surface d'au moins une face du substrat de silicium (1), (F) dépôt de structures de métallisation (5, 6) sur la face avant (1a) et/ou sur la face arrière (1b) du substrat de silicium (1), en vue de la mise en contact électrique de la cellule solaire. Selon l'invention, entre les étapes E et F, une oxydation thermique est effectuée lors d'une étape E2, pour former une couche d'oxyde (4) au moins sur une partie de la face avant et/ou de la face arrière du substrat de silicium (1), partie qui n'est pas recouverte par la couche de masquage (3) réalisée à l'étape D, et la couche de masquage (3) et la couche d'oxyde (4) restent sensiblement sur le substrat de silicium (1) lors des étapes suivantes du procédé.
EP09771303A 2009-01-14 2009-12-03 Cellule solaire et procédé de fabrication d'une cellule solaire à partir d'un substrat de silicium Withdrawn EP2377169A2 (fr)

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DE102009005168A DE102009005168A1 (de) 2009-01-14 2009-01-14 Solarzelle und Verfahren zur Herstellung einer Solarzelle aus einem Siliziumsubstrat
PCT/EP2009/008605 WO2010081505A2 (fr) 2009-01-14 2009-12-03 Cellule solaire et procédé de fabrication d'une cellule solaire à partir d'un substrat de silicium

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CN102282683A (zh) 2011-12-14
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WO2010081505A3 (fr) 2011-04-14

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