EP2243212A2

EP2243212A2 - Circuit arrangement and control circuit for a power supply unit, computer power supply unit and method for switching a power supply unit

Info

Publication number: EP2243212A2
Application number: EP09772244A
Authority: EP
Inventors: Peter Busch
Original assignee: Sinitec Vertriebs GmbH
Current assignee: Fujitsu Technology Solutions Intellectual Property GmbH
Priority date: 2008-07-03
Filing date: 2009-05-25
Publication date: 2010-10-27
Also published as: WO2010000544A3; DE102008064659A1; US8653700B2; JP2011523335A; DE102008031536A1; US20110101775A1; JP5426665B2; US8472216B2; JP2011524732A; WO2010000339A1; WO2010000544A2; EP2294683B1; JP5425193B2; US20110110129A1; DE102008064659B4; EP2294683A1

Abstract

The invention relates to a circuit arrangement (1) for a power supply unit (15, 16) for generating at least one direct voltage from an alternating voltage of a power supply system (2). The circuit arrangement comprises a switching element (3) for switching a load current of the power supply unit (15, 16), a current limiting element (4), connected in series to the switching element (3), for limiting a current impulse when the switching element (3) is switched on, a bistable first relay, connected in parallel to the switching element (3) and the power supply system (4), for holding the load current and a control circuit (10) for switching the power supply unit from a first operating state to a second operating state. The invention further relates to a suitable control circuit (10), a computer power supply unit, a method for switching a power supply unit (15, 16) and the use of said method.

Description

description

Circuit arrangement and drive circuit for a power supply, computer power supply and method for switching a power supply

The invention relates to a circuit arrangement for a power supply for generating at least one DC voltage from an AC voltage of a power grid. The invention further relates to a drive circuit for such a power supply, a computer power supply comprising such a circuit arrangement and a method for switching a power supply for generating at least one DC voltage from an AC voltage of a power grid.

Power supplies for generating at least one DC voltage from an AC voltage, usually a mains voltage of a power supply network, are widely known. In particular, an ever-increasing number of communications and consumer electronics devices require such power supplies to generate a rectified low voltage in the range of 1 to 12V from the standard 230V AC supply voltage. The power supplies used must meet different, partially conflicting requirements.

On the one hand, the power supplies should be switched on and off electronically, ie without the use of a mechanical power switch. This has, inter alia, the advantage that it is possible to dispense with high voltage suitable, relatively expensive power switches and complex wiring and electromagnetic shielding in a device housing. Furthermore, switching on of such a device via a timer or other electronic control is possible. Secondly, the power supply and the device connected to it in a switched off or standby state to take as little power from the mains, in order to counteract unnecessary energy consumption. Current devices typically consume a few watts of power in so-called standby mode, resulting in unnecessary greenhouse gas emissions from power generation.

Thirdly, the efficiency of the power supply unit should be as high as possible and the interference power fed into the grid by it as small as possible. For this, the power supply must meet increasingly stringent requirements of regulators and network operators.

To supply relatively large and rapidly changing loads, switching power supplies with upstream line filters and power factor correction circuits are typically used. For controlling the load, a clock frequency or a duty cycle of a control signal is usually controlled by a control circuit. A disadvantage of such

Circuits is that they have a relatively large power loss, especially in so-called standby mode, a mode with very low output power.

The present invention has for its object to describe a circuit arrangement that meets the above requirements particularly well. In particular, a circuit arrangement and a drive circuit for such a circuit arrangement are described, the power consumption of which is minimal from a power supply system in the switched-off state. Preferably, the arrangement should not absorb any electrical energy from the power grid at all in at least one operating state. According to a first aspect of the invention, a circuit arrangement for a power supply for generating at least one DC voltage from an AC voltage of a power network is described. The circuit arrangement comprises a switching element for switching a load current of the power supply, a current limiting element connected in series with the switching element for limiting a current impulse when the switching element is switched on, a bistable first relay connected in parallel to the switching element and the current limiting element

Holding the load current and a drive circuit for switching the power supply from a first operating state, in which no load current flows from the power supply network to the power supply, into a second operating state, in which a load current flows for generating the DC voltage from the power supply network to the power supply, wherein the drive circuit is adapted to turn on the switching element for a first period of time during switching of the power supply from the first to the second operating state, turn on the bistable relay during the first period and turn off the switching element at the end of the first period.

Such a circuit arrangement has the advantage, inter alia, that current peaks are avoided when the power supply unit is switched on by the current limiting element. At the same time, the power loss generated by the current limiting element does not fall during normal operation of the power supply. The bistable relay requires electrical energy only during switching operations and thus causes no power loss either when switched on or when it is switched off. Since the bistable relay for holding the load current is switched only in a potential-free state, it also need not be suitable to withstand high voltage peaks during switching. According to an advantageous embodiment, the circuit arrangement comprises a first switching stage which comprises an energy store for supplying the first switching stage and an operating element, wherein the first switching stage is adapted to generate a first control signal upon actuation of the operating element, and one with the first switching stage coupled second switching stage comprising an amplifier element for generating a second control signal for driving the switching element.

By using a two-stage circuit arrangement, the load on an energy store can be reduced, so that conventional energy stores already used in electronic devices, such as, for example, so-called CMOS

Batteries can be used to turn on the power supply without the risk of premature battery discharge.

According to an advantageous embodiment, the switching element comprises a second relay and the second switching stage comprises a supply circuit for supplying the second relay with an operating voltage obtained from the power grid. By using an additional supply circuit for supplying the second relay with an operating voltage obtained from the power network, an energy store provided in the circuit arrangement can be further relieved.

According to a further advantageous embodiment, the switching element comprises a semiconductor switching element, in particular a thyristor or a symistor. By using semiconductor switching elements, the energy consumption of the control circuit be further reduced. A supply circuit for supplying the second switching stage can then be omitted.

According to a further advantageous embodiment, the drive circuit comprises an integrated circuit, in particular a microcontroller, which controls the switching element and the first relay. In a further advantageous embodiment, the integrated circuit is configured to monitor the at least one DC voltage and the AC voltage of the power grid.

The use of an integrated circuit, in particular a microcontroller, for driving and monitoring the circuit arrangement allows a particularly flexible and efficient control of the circuit arrangement.

According to a further advantageous embodiment, the drive circuit for switching the power supply from the second operating state is set in the first operating state, the drive circuit turns on switching the power supply from the second to the first operating state, the switching element for a second period, during the second period of the bistable Relay switches off and at the end of the second period, the switching element off. By switching the switching element during shutdown of the bistable relay voltage spikes are avoided even when turning off the power supply.

According to a second aspect of the invention, a drive circuit for switching a power supply from a first operating state, in which no load current flows from the power supply network to the power supply unit, into a second operating state, in which a load current for generating a DC voltage tion from the power grid to the power supply flows described.

The drive circuit comprises a first switching stage, comprising an energy store for operating the first switching stage and an activation element, wherein the first switching stage is adapted to monitor the activation element in the first operating state and to generate a first control signal upon detection of an activation signal of the activation element, and a second switching stage coupled to the first switching stage, comprising at least one amplifier element for driving a relay with a second control signal and a supply circuit for supplying the second switching stage with a supply voltage obtained from the power supply network, wherein the second switching stage is adapted to receive the first control signal To supply the relay for switching a load current of the power supply with the supply voltage.

Such a drive circuit has the advantage that an energy intake from the power supply in the first operating state is avoided or at least minimized and an energy consumption from the energy storage when switching the power supply from the first operating state to the second operating state is also minimized.

According to an advantageous embodiment, the first switching stage generates at least one voltage pulse as the first control signal and transmits it to the second switching stage and the second switching stage activates the power supply circuit only upon receipt of the voltage pulse. Such a circuit, wherein the energy for activating the second switching stage by the transmission of a voltage pulse from the first Switching is effected, takes the power supply network in the first operating state no electrical energy.

The above-mentioned circuit arrangements and control circuits are particularly suitable for integration into a computer power supply.

According to a third aspect of the invention, a method for switching a power supply for generating at least one DC voltage from an AC voltage of a power network is described, wherein the following steps are performed by a drive circuit when switching the power supply from a first operating state to a second operating state:

switching on a switching element connected in series with a current limiting element for switching a load current of the power supply, during the first period switching on a bistable first relay connected in parallel with the switching element and the current limiting element to hold the load current and

- At the end of the first period, switch off the switching element.

The above-mentioned steps avoid or minimize energy consumption from the power grid in the first operating state, in the second operating state a power loss is minimized and a fault during switching from the first to the second operating state is limited. In other aspects of the invention, the use of said method in a computer system to provide a power-saving mode in which the computer system does not receive electrical power from the power grid is disclosed.

Further details and advantages of the invention are disclosed in the subclaims and the following detailed description. The invention will be explained in more detail below on the basis of exemplary embodiments using FIGS.

In the figures show:

1 shows a schematic representation of a circuit arrangement for a power supply,

FIGS. 2A and 2B are flow diagrams for switching on and off a circuit arrangement according to FIG. 1,

FIG. 3 shows a first embodiment of a network input circuit,

FIG. 4 shows a first drive circuit for the mains input circuit according to FIG. 3,

FIG. 5 shows a second drive circuit for the mains input circuit according to FIG. 3,

FIG. 6 shows a third drive circuit for the mains input circuit according to FIG. 3,

FIG. 7 shows a fourth drive circuit for the mains input circuit according to FIG. 3, FIG. 8 shows a second network input circuit,

9 shows a drive circuit for the mains input circuit according to FIG. 8, FIG.

FIG. 10 shows a third network input circuit,

FIG. 11 shows a fourth network input circuit,

FIG. 12 shows a drive circuit for the network input circuit according to FIG. 10 or 11,

FIG. 13 shows a fifth network input circuit and

Figure 14 is a conventional power input circuit.

Before the details of the invention according to the embodiments with reference to the figures 1 to 13 are explained in detail, a conventional power input circuit for a computer power supply will first be described with reference to Figure 14.

Figure 14 shows a highly simplified circuit diagram for a network input circuit of a computer power supply. The actual power supply for converting a primary voltage into a secondary voltage, for example a switched-mode power supply or switching converter, is not shown in FIG. Such a power supply would be connected in parallel with the storage capacitor C1 on the right side of FIG.

The circuit arrangement according to FIG. 14 is connected on the primary side, that is to say on the left in FIG. 1, to an alternating voltage power network. The phase connection line is via a switch Sw is coupled to a line filter comprising inductive, capacitive and resistive elements L1, L2, CxI, Cx2, CyI to Cy4 and Rdis. The line filter ensures that faults caused by the power supply are not transmitted back to the power supply network.

Behind the line filter, a bridge circuit BDI comprising four diodes is arranged, which generate from the primary-side AC voltage to the nodes AC1 and AC2 a pulsating DC voltage to the node + and -. The bridge circuit BDI in the illustrated embodiment is a so-called Graetz bridge.

The positive output + of the bridge circuit BDI is connected to the storage capacitor Cl via a thermistor Rntc. The thermistor Rntc prevents a surge when connecting the mains input to the power grid or the closing of the switch Sw. In order to avoid the voltage drop generated at the thermistor Rntc during operation of the computer system, a relay ReIl is connected in parallel with the thermistor Rntc. The relay ReIl is a monostable relay, which is turned on by applying a control voltage of, for example, 12 V to the control terminals A and B, thus bridging the thermistor Rntc. In the described embodiment, the relay ReIl attracts as soon as the actual power supply has started operation, that generates a secondary DC voltage, and falls off as soon as the power supply is turned off. In this case, the relay ReIl in the switched-on state, a power of about 100 to 300 mW.

FIG. 14 also shows a switchable monitor output. The switchable monitor output is via a second monostable relay Rel2 activated. The second relay Rel2 is also supplied with a voltage of 12 V between the control terminals A and B during operation of the power supply unit. In this state, the relay Rel2 switches the line input voltage Line to the switch output monitor. Otherwise, ie if the computer power supply is not in operation, the relay Rel2 disconnects the switch output Monitor from the power supply network, so that a power consumption of the connected monitor in the off state of the computer power supply is prevented. The Rel2 relay also consumes power constantly when it is switched on.

The two monostable relays Re1 and Rel2 in the circuit according to FIG. 14 improve the effectiveness of the computer system connected to the circuit arrangement. On the one hand, the first relay ReIl prevents the generation of a power loss, which is undesirable in operation, at the thermistor Rntc. On the other hand, the second relay Rel2 ensures that the monitor does not receive any power from the supply network when the computer is switched off. Nevertheless, parts of the circuit arrangement remain connected to the power supply network and therefore consume even in the off state electrical energy. In particular, the mains input filter also assumes a slight electrical power and an additional reactive power from the power supply network even when the relays ReIl and Rel2 are switched off. Furthermore, the actual power supply remains connected via the thermistor Rntc to the mains input line. Finally, the efficiency of the power supply unit during operation is reduced by the fact that the drive coils of the relays ReIl and Rel2 must be supplied with an operating voltage. Figure 1 shows a schematic representation of a circuit arrangement 1 according to an embodiment of the invention.

The circuit arrangement 1 is connected to a power supply network 2, in particular an AC network. In the illustrated exemplary embodiment, the power supply network 2 is a single-phase AC network having a phase connection L and a neutral conductor N. The phase connection L is connected to a switching element 3, for example a monostable relay or a semiconductor switching element. Behind the switching element 3, a current limiting element 4, for example, a thermistor, arranged. The switching element 3 and the current limiting element 4 are connected in series and supply a filter circuit 5 when switching the switching element 3 with the AC voltage from the power supply network 2. Parallel to the switching element 3 and the current limiting element 4, a bistable relay 6 is arranged. The bistable relay 6 can bridge the switching element 3 and the current limiting element 4.

The filter circuit 5 comprises a line filter 7, a circuit for power factor correction 8 and a bridge rectifier 9. These components are such circuits as are already known from the prior art and are therefore not explained in detail.

The drive circuit 10 is used to drive the switching element 3 and the bistable relay 6. For this purpose summarizes the drive circuit 10 in the illustrated embodiment, an energy storage 11, for example, a battery cell, an operating element 12, for example a on the front of a device, and a Intensifier 13. When the control element 12 is actuated, a voltage is switched from the energy storage 11 to the amplifier circuit 13. In order not to burden the energy store 11 when switching the bistable relay too much, the amplifier circuit 13 is supplied according to an optional development of the circuit directly from the power supply network 2 with an operating power.

The switching element 3, the bistable relay 6 and the amplifier circuit 13 comprise no capacitive or inductive

Circuit components directly at the power input and therefore take in the off state neither active nor reactive power from the power grid 2 on. Nevertheless, the activation of a circuit connected to the circuit 1 power supply unit by means of the control element 12 is possible via the drive circuit 10. In the illustrated circuit arrangement as described below, no glitches occur, so that it is possible to dispense with a primary-side line filter.

The mode of operation of the drive circuit 10 will be described in more detail with reference to FIGS. 2A and 2B. FIG. 2A shows a method 20 for switching on the power supply 5. FIG. 2B shows a method 25 for switching off the power supply 5.

The method 20 according to FIG. 2A comprises a first step 21, in which the switching element 3 is switched on by the drive circuit 10. For example, the amplifier circuit 13 generates a switching pulse having a duration of 500 ms when it detects that the operating element 12 has been closed. For the period of 500 ms, the control terminal of the switching element 3 is assigned a switching voltage. During this period, the filter circuit 5 and a subsequent switched power supply via the current limiting element 4 is supplied with a load current from the power supply network 2. In this case, the current limiting element 4 prevents a sudden increase in the current flow and thus prevents a disruption of the power supply network 2 by the power supply 5.

In a further step 22, the bistable relay 6 is turned on. For example, the amplifier circuit 13 generates a first switching pulse, for example with a length of 20 ms, for generating a magnetic field with a first orientation in order to close the bistable relay 6. Since the switching element 3 is already closed at this time, the switching operation of the bistable relay 6 takes place at a very low voltage drop determined by the current limiting element 4. Therefore, especially in the case of

Close the switching contact of the bistable relay 6 only very small surges, so that the bistable relay 6 can be easily performed. In particular, the bistable relay 6 does not have to be surge-proof.

In a further step 23, the switching element 3 is turned off. For example, the amplification circuit 13 no longer provides a suitable drive voltage for the switching element 3. After switching off the switching element 3, a load current for the power supply 5 flows through the bistable

Relay 6 and thus bypasses the current limiting element 4. Thus falls in the on state neither on the current limiting element 4 still on switching element 3 or the bistable relay 6 from a power loss.

In the method 25 according to FIG. 2B, a substantially reverse procedure for switching off the circuit arrangement 1 is shown. To a shutdown spark when switching off the To avoid bistable relay 6, the switching element 3 is switched on in a step 26, even when turning off the power supply 5 first. Thus, for a load current initially two conduction paths via the switching element 3 and the parallel-arranged bistable relay 6 are closed.

In a further step 27, the bistable relay 6 is turned off. For example, the amplifier circuit 13 may generate a second switching pulse which generates a magnetic field substantially opposite to the first switching pulse in a control coil of the bistable relay 6. Since in this state, a load current of the power supply 5 can continue to flow through the switching element 3 and the current limiting element 4, occurs when opening the bistable Relay 6 no shutdown spark on.

Finally, in a step 28, the switching element 3 is opened after a predetermined time has elapsed, for example 500 ms.

FIG. 3 shows a schematic representation of a first network input circuit 14. The network input circuit 14 connects a power supply network 2, in particular a phase input line, via a mains filter 7 and a bridge circuit BDI with a storage capacitor C1, behind which a switching power supply not shown in FIG is.

The circuit arrangement according to FIG. 3 essentially corresponds to the upper part of the schematic arrangement according to FIG. 1, wherein the power correction circuit 8 has been omitted for reasons of simplified representability. In addition, circuit-technical details, for example for the Line filter 7, shown. In the illustrated embodiment, the line filter 7 comprises two inductors Ll and L2, six capacitors CxI, Cx2, CyI to Cy4 and a resistor Rdis. The bridge rectifier 9 comprises four semiconductor diodes in a Graetz bridge.

Moreover, it is shown in FIG. 3 that a switching output for a monitor can be arranged at a node which is arranged behind the thermistor Rntc, the bistable relay R11 and in front of the line filter 7. The network input circuit according to FIG. 3 therefore does not require an additional relay for implementing the switching output for the monitor.

Finally, between the phase input line and the

Thermistor Rntc added an additional switch Sw, with which the switching element 3 designed as Rel2 can be bridged. The switch Sw is used in particular to be able to switch on the power supply even when the drive circuit 10 is not available, for example because an energy store 11 is discharged.

It should be noted that the number of components with respect to the embodiment shown in Figure 14 has not increased. Due to the alternative arrangement of the components according to Figure 3, therefore, the properties of the network input circuit can be improved, without causing an increased demand for electrical components.

FIG. 4 shows a first drive circuit for the mains input circuit 14 according to FIG. 3. The mains input circuit 14 according to FIG. 3 is also shown in FIG. 4, wherein the line filter 7, the power factor correction circuit 8 and the Bridge rectifier 9 are shown as a common filter circuit 5.

In FIG. 4 it can be seen that at the output of the filter circuit 5, a voltage parallel to the storage capacitor C1 is applied

Main power supply 15 and an auxiliary power supply 16 are connected. The main power supply 15 or auxiliary power supply 16 is any circuit arrangement for converting a primary voltage into a rectified and stabilized secondary voltage, in particular around forward converter or flyback converter. In this case, the main power supply 15 is used to power a connected device, such as a computer system, with a normal operating voltage. By contrast, the auxiliary power supply 16 supplies only those circuit parts with an operating voltage, which are also required in a so-called sleep or standby mode. Examples include a network card for providing a so-called wake-on-LAN function or the supply of a main memory with an operating voltage when the processor has been temporarily deactivated.

In the circuit arrangement according to FIG. 4, the output voltage is stored in the capacitor C1. When the power factor correction circuit is active, the generated voltage is in the switched-on state at, e.g. 400V, in standby mode at the peak value of the currently applied mains input voltage. Cl supplies the auxiliary power supply 16 and the main power supply 15. The outputs of the main power supply 15 are not shown here.

In Figure 4, a part of the output of the auxiliary power supply 16 is shown for better understanding; these are the Schottky diode D3 and the output capacitor C5, which provide an auxiliary output voltage of 5Vaux-sec. in the Embodiment, the auxiliary power supply 16 is constructed as a flyback converter and the output of the flyback converter transformer is led out of the auxiliary power supply 16 and z. B. connected to the anode of the diodes D3 and D4.

Since the control of the relays ReIl and Rel2 requires a certain time sequence, but should be as energy-saving as possible, a microcontroller 17 with a very low power consumption was provided in the exemplary embodiment shown in FIG. For example, microcontrollers of the ATMEL AT Mega Pico Power series have a current consumption of about 0.1 μA without or 0.85 μA in conjunction with a real-time clock (RTC). The microcontroller 17 is adapted to suppress a power consumption from the power supply network 2 in a first, so-called OW mode and is therefore designated in FIG. 4 and in the following circuit diagrams as an OW processor. In order to further reduce the power consumption of the microcontroller 17 in this operating mode, in an optional development of the invention, the operating cycle of the microcontroller is reduced in this operating mode, for example to approximately 32 kHz. Of course, an application-specific circuit (ASIC), a programmable logic circuit (GAL, PAL) or another suitable integrated circuit can be used instead of the microcontroller.

In the illustrated embodiment, the microcontroller 17 is supplied by a battery cell Vl with a battery voltage of 3 V. The battery cell V1 also serves to signal the activation and deactivation of the OW standby

Mode via the switch Sw2, for example, a front panel of a computer. Parallel to the generation of the auxiliary output voltage 5Vaux-sec with D3 and C5, another auxiliary output Vcc-Aux with D4 and C6 is provided, which generates a relay auxiliary voltage. This serves to be able to safely switch off the bistable relay Rel2 in the event of a mains failure or an output short circuit of the 5Vaux-sec auxiliary voltage.

The early detection of a power failure is provided by the negatively poled peak rectifier formed by D5, R5 and C8. About the output led out of the flyback transformer from the auxiliary power supply 16 can be tapped via a negative pole peak rectifier, the transformed input voltage of the flyback converter. However, since the microcontroller 17 can not process a negative input voltage, a switching stage comprising R6, Z3, R8 and Q4 has been set up which switches the 5Vaux-sec voltage via R9 and RIO to terminal O3 of the OW processor, if the negative peak value exceeds a certain amount at C8. This can e.g. The voltage at C8, which results when the input of the power supply 70V or 80V rms voltage is applied, ie mains undervoltage for a 100V network.

The transistor Q2 is used to turn on, the transistor Q3 to turn off the bistable relay ReIl. The switching pulses required for this purpose are generated via the terminals P4 and P5 of the microcontroller 17. The switching power is provided via the auxiliary power supply 16 as described above.

A transistor Q1 turns on the monostable relay Rel2 and removes the power to supply an exciting coil directly from the power grid. For this purpose, the mains voltage is rectified via a separate bridge rectifier BD2 and to the drain terminal of the MOSFET transistor Ql given. As long as Ql is not switched on, no current will flow, so the line input Line will not be charged.

The series resistor Rl and the varistor Rvdr are intended to protect the circuit from mains overvoltage. Rvdr can also be omitted if the overvoltage protection of Ql and Zl is sufficient. Fuse F2 is intended to protect the circuit from overheating if the transistor Q1 or the relay relay should fail due to a short circuit. Also Zl serves the safety of the circuit and is not needed for normal function.

Ql is controlled in such a way that it does not draw any power from the power grid during the switched-off state. This is achieved by a drive transformer TO, which turns on the MOSFET with a single positive pulse of the microcontroller 17 and turns off again with a single negative pulse. The energy for switching on the transistor Q1 is provided via the drive transformer TO.

By default, the two outputs P1 and P2 of the microcontroller 17 are for example at a low level, ie 0 V. If the relay Rel2 is to be switched on, P2 is switched to a high level, eg 3 V, for a short time, then back to the low level Level. About the capacitor C4, the switching pulse is given to TO and at the output in the transmission ratio, eg 1: 5, the transformer TO up-transformed. Via Dl and R4, the capacitor C3 is charged to a voltage of, for example, 15V. C4 is not intended to attenuate the pulse, but to prevent the saturation of TO in case of any imbalances between the on and off pulse. When P2 drops back to the low level, the series normally not yet conduction of diode D2 and zener diode Z3. This is achieved, for example, if Z3 has a nominal value of 15V. This keeps C3 charged.

The charged capacitor C3 is to turn on the transistor Q1. For this purpose, C2 is charged to a voltage which corresponds to the voltage of C3 minus the gate threshold voltage of Q1. If the voltage at C3 is e.g. 15V, the voltage at C2 can be e.g. 12V. The power for this voltage is taken from the power supply at short notice during the starting process and switches on the monostable relay Rel2.

Shortly after this switch-on process, the monostable relay Rel2 must be switched off again, so that Ql is not thermally overloaded. The goal is simply to charge the Netzelko Cl briefly, so that the auxiliary power supply can start. To turn Rel2 off, Pl will go high for a short time, then back to low. Via the capacitor C4, a switching pulse which is opposite to the first switching pulse is set to TO and appears at the output as a step-up negative pulse of e.g. -15V. This discharges C3 through D2 and Z3 to about IV. This is below the threshold voltage of Ql, so that Ql is now turned off. In the long run, R3 should ensure that the turned-off transistor Q1 also remains switched off, discharging through it any residual charge of the capacitor C3.

As described above, the control of the monostable relay Rel2 is effected by a two-stage circuit. The first

Switching stage comprises in particular the microcontroller 17, the circuit for monitoring the generated secondary voltage, the battery Vl and the switch Sw2. It gets through the battery Vl fed. The microcontroller 17 monitors the front switch Sw2 and the secondary auxiliary voltage 5Vaux-sec and provides suitable control signals for the control of the second switching stage ready. The second switching stage comprises, in particular, the MOSFET Q1, the associated drive electronics for providing a suitable drive signal for its gate connection, and the supply circuit with the auxiliary rectifier BD2 for supplying the relay Rel2 with a suitable switching voltage. In the embodiment of FIG. 4, the first and the second switching stage are galvanically separated from one another by means of the transformer TO.

FIG. 5 shows a further embodiment of a drive circuit for the network input circuit according to FIG. 3. The power input circuit disclosed therein as well as the circuitry of FIG

Microcontroller 17 correspond to those of the circuit arrangement according to FIG. 4, FIG. 5 additionally showing the secondary DC voltage outputs 12V-sec, 5V-sec, 3V3-sec and -12-sec of the main power supply 15. In addition, the second switching stage of the drive circuit according to FIG. 5 differs from the circuit according to FIG. 4 as follows.

An advantage of the drive circuit according to FIG. 4 is that only one MOSFET transistor Q1 is required. However, this on-control circuit must generate a relatively high output voltage by means of the transformer TO. The arrangement according to FIG. 5 shows that the necessary output voltage and thus the transmission ratio of TO can be reduced by adding an additional small-signal MOSFET transistor Q5.

According to the second driving example in FIG. 5, the lower terminal of the output winding of TO is not connected to the lower, but to the upper, positive terminal of C3 connected. The drive voltage is applied to the MOSFET transistor Q5, which turns on the high-resistance resistors R15 and R16 for charging the capacitor C3. The Zener diode Z2 limits the drive voltage to a constant value. In this drive circuit can now the

Relay voltage can also be set higher by selecting the rated voltage of Z2, e.g. 24 V or 48 V to lower the relay current and thus the power loss in Ql.

FIG. 6 shows a third drive circuit for driving the mains input circuit according to FIG. 3. The circuit according to FIG. 6 also essentially corresponds to the above-described FIG. 4 with regard to the mains input circuit and the activation of the microcontroller 17.

In the third control example according to FIG. 6, however, the triggering of Q5 is not triggered by a respective ON and OFF pulse by P2 and P1, but only by a pulse train at the output P2 of the microcontroller 17. By C4, the DC voltage component of the square-wave voltage of P2 is disconnected and recovered on the secondary side with the help of ClO and D2. The drive voltage is applied via Dl and R4 to C9 and the control gate of the MOSFET transistor Q5, which turns on the high-resistance resistors R15 and Rl 6 for charging the capacitor C3 with applied control voltage. R14 is used to discharge C9 when the drive is turned off by P2.

Thus, the circuit of Figure 6 has the same advantages as the circuit of Figure 5. In addition, the control of the relay Rel2 by the microcontroller 17 can be made more reliable. FIG. 7 shows a fourth drive circuit for driving the mains input circuit according to FIG. 3. Compared to the preceding circuit arrangements, the control of the monostable relay Rel2 and the bistable relay ReIl and the monitoring of the voltages generated by the auxiliary power supply 16 has been further improved.

In the fourth driving example according to FIG. 7, the transformer TO is not used as an impulse transmitter for driving Q5, but as a flyback converter. With this principle, the drive energy is optimally utilized. Terminal P2 drives transistor Q6 which switches the primary side of TO to the battery voltage VDD and thereby stores magnetization energy in TO. Dl locks at this time. If Q6 is now switched off, the transformer TO magnetizes off by charging the capacitor C9 on the secondary side via D1 and R4. Depending on the size of the circuit, a single or multiple switching pulses are generated at terminal P2 to charge the capacitor C9. The drive voltage turns on via the MOSFET transistor Q5 via its control gate. R14 is used to discharge C9 when the drive is turned off by P2. The remaining part of the control of the relay Rel2 is unchanged from the previous embodiment.

Furthermore, the drive circuit is shown in this embodiment, as the excitation coil of the relay ReIl can be supplied from the primary side with an operating current. This has the advantage that the security specifications to be observed because of the no longer necessary primary / -

Secondary separation are not so strict and therefore a cheaper relay can be used. The optocouplers UIa used in FIG. 7 for driving the relay ReIl and UIb or U2a and U2b are much cheaper, so that despite the additional component cost of the overall price of the circuit is lower.

Another way to save costs is to control the drive so that no surge current ever flows through this relay. In this case, the contacts of the relay can be made significantly weaker, without shortening the life. This makes it possible to use a cheaper relay. To do this, Rel2 must be activated shortly before and during the switching on of ReIl and also shortly before and during switch-off. As a result, there is no surge current when switching on ReIl and when switching off, no inductive overvoltage can occur due to the inductances of the filter. Rel2 is protected by the thermistor Rntc when it is switched on, and anyway it has to be designed for the maximum surge current of the power supply unit and overvoltages, so that there are no additional costs.

In the circuit according to FIG. 7, the supply of the OW processor is also indicated by the 3V button cell as well as by the auxiliary power supply 16, so that the battery is charged only very briefly at the start. The diodes D8 and D7 are provided to protect the lithium battery Batt against unauthorized charging by the auxiliary power supply 16, should one of the two diodes be bridged. D2 and D6 lower the auxiliary voltage to better match the range of the processor supply voltage.

If enough processor inputs are available, it is advantageous to measure the primary voltage separately via 'PRIM' and the auxiliary power supply voltage via Aux 5V. The circuits shown in FIGS. 3 to 7 have in common that the In the event of a power failure, the bistable relay relay should be switched off in order to prevent current surges and damage to the circuits when a grid voltage is re-applied. By periodically briefly switching on Rel2 to test whether the mains voltage is present again, a

Function for automatic power restart can be realized. However, the service life of the relay Rel2 must be taken into account. For this purpose, the intervals between the switch-on attempts can be increased over time or can be completely interrupted after a set number of switch-on attempts.

If, on the other hand, it is absolutely necessary to enable a network restart at any time, for example in the case of server systems, then Relay Rel2 can also be implemented as a bistable relay. FIG. 8 shows a suitable network input circuit 14 with 2 bistable relays Re1 and Rel2, FIG. 9 shows an associated circuit arrangement with a complete circuit for controlling the network input circuit 14.

In this embodiment, a second bistable relay Rel2 is permanently turned on detection of a power failure by the microcontroller 17 and a first bistable relay ReIl off. Only after recognizing the available mains voltage is the first bistable relay ReIl switched on and the second bistable relay Rel2 possibly switched off again.

If two bistable relays are used, relay Rel2 will remain on when a conventional supply of auxiliary power supply 16 is desired. In addition, ReIl is switched on when the auxiliary power supply 16 has started. In the event of a power failure, ReIl must also be switched off, Rel2 but stays on. Rel2 will be turned off only if OW standby is desired, for example, via a key or software request.

The bistable Relay Rel2 is powered from the mains via one of the drive circuits described above, but the direction of actuation (on or off) is set via one of the optocouplers U1 and U2, respectively. Of course, the other previously mentioned supply circuits are possible. Also, ReIl can be operated as described above from the primary side.

Figures 10 and 11 show further improved power input circuits 14, in which the first switching element 3 is designed as a semiconductor switching element.

According to FIG. 10, a rectifier bridge composed of 4 diodes BR1 to BR4 is used as the first switching element 3 with a thyristor SCR arranged in the positive path of the rectifier bridge. According to FIG. 11, a symistor, also known as triac, is used as the switching element 3. The use of a thyristor or a symistor for switching the current limiting element 4 has the advantage that it is possible completely to dispense with the second relay Rel2. In addition, semiconductor switching elements have the advantage that they have a much longer life. The circuit of Figure 11 is cheaper to manufacture, however, requires a drive current of about 5 mA for the symistor, the thyristor, however, requires only a drive current of 0, 2 mA.

For driving the semiconductor switching elements, a transformer TO is again used which, as shown in FIGS. written can be connected either as a pulse transformer or as a flyback converter.

FIG. 12 shows a possible drive circuit for the network input circuit 14 according to FIG. 10.

The transformer TO operates here e.g. in flyback mode and the bistable relay ReIl is shown with primary / primary disconnect. The resistors R2, R3, R4, R14 and the smoothing capacitor C2 in the drive circuit for the thyristor SCR reduce the HF interference fed into the line input line, but are not required for the functioning of the circuit arrangement.

In the circuit section for the monitoring of the primary voltage via the connection PRIM of the microcontroller 17, the Zener diode Z3 was let out in comparison to the circuit arrangement according to FIG. The voltage divider consisting of the resistors R6 and R8 must therefore be re-dimensioned a bit, but you save the Z-diode Z3.

In addition, a circuit for monitoring a signal aux sense was supplemented by the microcontroller 17. By the associated monitoring circuit, a sudden relief of the auxiliary voltage 5Vaux-sec can be detected, which is caused for example by load jumps of the components connected thereto. Such a load jump can thus be distinguished from a drop in the primary voltage and serves to prevent in this case unwanted shutdown of the bistable relay ReIl. The control of the power circuit according to Figure 11 with the symistor TRIAC takes place in principle as well as the control of the thyristor SCR and is therefore not shown.

In these variants of the power circuit according to FIGS. 10 and 11, it is even better possible for the signal to be controlled such that a surge current never flows via this relay relay. For this purpose, the SCR or Symistor TRIAC thyristor must be activated shortly before and during the switching on of Rel2 and also shortly before and during switch-off. As a result, there is no surge current when switching on ReIl and when switching off, no inductive overvoltage can occur due to the inductances of the filter. In principle, a symistor or thyristor has no wear, so that no additional reduction of the service life results from this additional switching on, but an increase in the lifetime of the relay. Also, the battery is not charged additionally, since the switching on and off of Rel2 occurs when power from the auxiliary power supply 16 is available.

Another advantage is the now possible improved behavior after a power failure. After a power failure, the mains input normally remains in the switched-off state until it receives a start command from the secondary side again.

With the help of the processor and the thyristor or the transistor, it is now possible to make as many start attempts as possible without causing any problems of wear. Of course, these start attempts are only necessary if the power supply was previously in a standby or operating state. Thus, in the case of standby operation, the processor must save this state in the event of a power failure and start re-starting immediately thereafter. This can be staggered in time, eg 100 Start attempts every 1 second, then 100 start attempts every 2 seconds, etc.

FIG. 13 shows an alternative arrangement of the individual components of the network input circuit 14. In particular, in the network input circuit 14 according to FIG. 13, the filter circuit 5, comprising the line filter 7, the power factor correction circuit 8 and the bridge rectifier 9, is directly connected to the line terminal Line of the power supply network 2 and thus electrically displaced before the switching element 3 and the bistable relay 6.

Here, the position of the switching element, in the figure 13, for example, the variant with thyristor SCR, moved backwards in the direction of Netzelkos Cl. This has the advantage of active power factor correction that lower currents flow at this point, especially at low line voltage, since the capacitor Cl in a 230V AC network has approximately a charging voltage of 400V when the main power supply 15 is turned on.

However, the circuit arrangement according to FIG. 13 has the disadvantage, compared with the previously described arrangements, that a certain reactive power and a very low active power are still consumed in the non-switched-off filter circuit 5 when the mains input circuit 14 is switched off. This advantage and disadvantage must be balanced against each other depending on the requirements of the power cutoff.

In the arrangement according to FIG. 13, the thyristor SCR no longer requires an additional bridge rectifier, since it is arranged in the DC branch after the main bridge rectifier 9. The drive circuits 10 described above with reference to FIGS. 1 to 12 are also suitable for driving the mains input circuit 14 shown in FIG. 13 and will therefore not be described again.

The exemplary embodiments according to FIGS. 1 to 13 have in common that they further reduce or completely avoid the power consumption of a power supply unit, in particular of a computer power supply unit, in a further energy-saving mode designated in this application as an OW standby. In this way, the various circuit arrangements and the associated drive circuits make a further contribution to the energy savings in computer systems, which goes beyond the previously known energy-saving states according to the ACPI standard. Here, the operating state disclosed herein lies between the states referred to as G3 ("mechanical off") and G2 ("soft-off").

Claims

claims

1. Circuit arrangement (1) for a power supply unit (15, 16) for generating at least one DC voltage from an AC voltage of a power supply network (2), comprising a switching element (3) for switching a load current of the power supply unit (15, 16) the switching element (3) connected in series current limiting element (4) for limiting a current surge when switching the switching element (3), to the switching element (3) and the current limiting element (4) in parallel bistable first relay (6) for holding the Load current and a drive circuit (10) for switching the power supply (15, 16) from a first operating state in which no load current from the power supply network (2) to the power supply (15, 16) flows, in a second operating state in which a load current for generating the DC voltage from the power supply network (2) flows to the power supply (15, 16), wherein the drive circuit (10) is adapted, when switching the power supply (15, 16) from the first in to switch on the second operating state of the switching element (3) for a first switching period, during the first period to turn on the bistable relay (6) and turn off the switching element (3) at the end of the first period.

2. Circuit arrangement (1) according to claim 1, characterized by a first switching stage, which comprises an energy store (11) for supplying the first switching stage and an operating element (12), wherein the first switching stage is adapted to upon actuation of the operating element (12). to generate a first control signal, and a second switching stage coupled to the first switching stage and comprising an amplifier element for generating a second control signal for driving the switching element (3).

3. Circuit arrangement (1) according to claim 2, characterized in that the switching element comprises a second relay (Rel2) and the second switching stage comprises a supply circuit for supplying the second relay (Rel2) with an operating voltage derived from the power supply network (2).

4. Circuit arrangement (1) according to claim 3, characterized in that the second relay (Rel2) is designed as a monostable relay, wherein the second switching stage, the second relay (Rel2) during the first period with a from the power supply network (2) obtained operating voltage provided.

5. Circuit arrangement (1) according to claim 3, characterized in that the second relay (Rel2) is designed as a bistable relay, wherein the second switching stage, the second relay (Rel2) at the beginning of the first period with one from the power supply network (2) obtained Power supplied pulse and supplied at the end of the second period with a power pulse from the power supply (2) obtained off-pulse.

6. Circuit arrangement (1) according to claim 1 or 2, characterized in that the switching element (3) comprises a semiconductor switching element, in particular a thyristor (SCR) or symistor (TRIAC).

7. Circuit arrangement (1) according to claim 6, characterized in that the semiconductor switching element is designed as a thyristor (SCR), wherein the thyristor (SCR) in such a way with the Stromver- is arranged supply network (2) connected bridge circuit, so that by switching the thyristor (SCR) both positive and negative half-waves of the AC voltage of the power supply network (2) can be switched.

8. Circuit arrangement (1) according to one of claims 1 to 7, characterized by a main power supply (15) for providing at least one operating voltage and an auxiliary power supply

(16) for providing an auxiliary voltage, wherein in the first operating state the main power supply (15) and the auxiliary power supply (16) are separated from the power supply network (2) by the switching element (3) and the first relay (6) and in the second operating state, the main power supply unit (15) and / or the auxiliary power supply unit (16) are coupled to the power supply system (2) by the switching element (3) and / or the first relay (6).

9. Circuit arrangement (1) according to claim 8, characterized in that the first relay (6) is supplied during the first period with a switch-on of the auxiliary power supply (16).

10. Circuit arrangement (1) according to claim 8 or 9, characterized in that when switching the at least one power supply (15, 16) from the first operating state to the second operating state in a first switching phase, first the auxiliary power supply (16) and in a second switching phase the main power supply (15) is activated.

11. Circuit arrangement (1) according to one of claims 1 to 10, characterized in that the drive circuit (10) comprises an integrated circuit, in particular a microcontroller (17), which activates the first switching element (3) and the first relay (6).

12. Circuit arrangement (1) according to claim 11, characterized in that the integrated circuit is operated in the first mode with a first clock frequency and in the second mode with a second clock frequency, wherein the first clock frequency is smaller than the second clock frequency.

13. Circuit arrangement (1) according to claim 11 or 12, characterized in that the integrated circuit is adapted to the at least one of the power supply (15, 16) generated DC voltage and the AC voltage of the power supply network (2) to Ü monitor ,

14. Circuit arrangement (1) according to one of claims 11 to 13, characterized in that the drive circuit (10) comprises a transformer (TO) and the integrated circuit is adapted to generate at least one pulsed control signal for driving the switching element (3) which is transmitted via the transformer (TO).

15. Circuit arrangement (1) according to claim 14, characterized in that the drive circuit (10) comprises a flyback converter circuit for controlling the switching element (3), wherein the integrated circuit drives the flyback converter.

16. Circuit arrangement (1) according to one of claims 1 to 15, characterized by a to the power supply network (2) connectable filter circuit (5) comprising at least one line filter (7) and a rectifier circuit (9), wherein the switching element (3) between the filter circuit (14) and the at least one power supply (15, 16) is arranged.

17. Circuit arrangement (1) according to one of claims 1 to 15, characterized by a filter circuit (5) comprising at least one line filter (7) and a rectifier circuit (9), wherein the switching element (3) between the power supply network (2) and the Filter circuit (5) is arranged.

18. Circuit arrangement (1) according to one of claims 1 to 17, characterized in that the drive circuit (10) is adapted to switch the power supply unit (15, 16) from the second operating state into the first operating state when the power supply unit is switched ( 15, 16) from the second to the first operating state to turn on the switching element (3) for a second period, during the second period to turn off the bistable relay (6), and turn off the switching element (3) at the end of the second period.

19. Circuit arrangement (1) according to claim 18, characterized in that the drive circuit (10) is adapted to monitor the AC voltage of the power supply network (2) and upon detection of a power failure, the power supply (15, 16) from the second to the first To switch operating state.

20. A drive circuit (10) for switching a power supply (15, 16) from a first operating state in which no load current from a power supply network (2) to the power supply (15, 16), to a second operating state in which a load current for generating a DC voltage flows from the power supply network (2) to the power supply (15, 16), comprising: a first switching stage , comprising an energy store (11) for operating the first switching stage and an activation element, wherein the first switching stage is adapted to monitor the activation element in the first operating state and to generate a first control signal upon detection of an activation signal of the activation element, and one with the first switching stage coupled second switching stage, comprising at least one amplifier element for driving a relay (ReIl, Rel2) with a second control signal and a supply circuit for supplying the second switching stage with one of the power supply network (2) won

Supply voltage, wherein the second switching stage is adapted to supply the relay (ReIl, Rel2) for switching a load current of the power supply (15, 16) with the supply voltage upon receipt of the first control signal.

21, driving circuit (10) according to claim 20, characterized in that the first switching stage generates at least one voltage pulse as the first control signal and transmits to the second switching stage ü- and the second switching stage activates the power supply circuit only upon receipt of the voltage pulse.

22, driving circuit (10) according to claim 20 or 21, characterized in that the first switching stage and the second switching stage by a transformer (TO) or an optocoupler (Ul, U2) are galvanically separated from each other.

23, drive circuit (10) according to any one of claims 20 to 22, characterized in that the second switching stage comprises a semiconductor switching element for activating the power supply circuit, wherein the first switching stage is coupled to a control terminal of the semiconductor switching element.

24, drive circuit (10) according to claim 23, characterized in that in the first operating state, substantially all of the electrical voltage of the power supply network (2) drops to the semiconductor switching element.

25. Computer power supply with a circuit arrangement (1) according to one of claims 1 to 19 and / or a drive circuit according to one of claims 20 to 24.

26. A method for switching a power supply (15, 16) for generating at least one DC voltage from an AC voltage of a power supply network (2), wherein when switching the power supply (15, 16) from a first operating state to a second operating state, the following steps of a drive circuit (10) are performed:

at the beginning of a first period, switching on a series-connected with a current limiting element (4)

Switching element (3) for switching a load current of the power supply,

- During the first period switching on with the switching element (3) and the current limiting element (4) connected in parallel bistable first relay (6) for holding the load current and

- At the end of the first period switching off the switching element (3).

27. The method of claim 26, wherein the following steps are performed by the drive circuit (10) when switching the power supply (15, 16) from the second to the first operating state:

at the beginning of a second period of time switching on of the switching element (3),

- During the second period, switching off the second relay (6) and - at the end of the second period switching off the switching element (3).

28. The method according to claim 27, characterized in that the drive circuit (10) monitors the AC voltage of the power supply network (2) in the second operating state and upon detection of a power failure, the power supply (15, 16) from the second operating state to the first operating state switches.

29. The method according to claim 28, characterized in that the drive circuit (10) after a predetermined period of time after detection of the power failure and the switching of the power supply (15, 16) in the first operating state, tries the power supply (15, 16) of the first Switch operating state to the second operating state.

30. Use of a method according to any one of claims 26 to 29 in a computer system for providing a power saving mode in which the computer system does not receive electrical power from the power grid (2).