EP2162987A1 - Capteur capacitif intégré - Google Patents

Capteur capacitif intégré

Info

Publication number
EP2162987A1
EP2162987A1 EP08758791A EP08758791A EP2162987A1 EP 2162987 A1 EP2162987 A1 EP 2162987A1 EP 08758791 A EP08758791 A EP 08758791A EP 08758791 A EP08758791 A EP 08758791A EP 2162987 A1 EP2162987 A1 EP 2162987A1
Authority
EP
European Patent Office
Prior art keywords
capacitive sensor
integrated
electrodes
metallization layer
circuit according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08758791A
Other languages
German (de)
English (en)
Inventor
Johann Hauer
Claudia Schuhmann
Robert Dorn
Stefan MÖDL
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Publication of EP2162987A1 publication Critical patent/EP2162987A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/945—Proximity switches
    • H03K17/955—Proximity switches using a capacitive detector
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/96—Touch switches
    • H03K2217/9607—Capacitive touch switches
    • H03K2217/960755—Constructional details of capacitive touch and proximity switches

Definitions

  • the present invention relates to an integrated capacitive sensor which can be used, for example, as a non-contact switch.
  • Capacitive sensors are widely used in measurement technology and sensor technology. For example, distances between two measurement points can be determined if the capacitance between the two measurement points is precisely measured so that, knowing the theoretical relationship between capacitance and distance, the measured capacitance can be used to deduce the distance between the two measurement points.
  • a capacitance between two surfaces is determined by a geometry of the surfaces and a dielectric surrounding the surfaces. If one changes the properties of the dielectric, for example by bringing a material with different dielectric properties close to the surfaces, the capacitance between the two surfaces changes in part considerably.
  • Capacitive proximity and proximity switches used for this purpose have long been known.
  • the patent DE 101 31 243 Cl describes a capacitive proximity switch with two sensor electrodes, which are arranged such that one of the two sensor electrodes protrudes outwards relative to the other. If, for example, a person or an electrically conductive object approaches the proximity switch, the capacitance of the two sensor electrodes changes. For the sensor electrode which protrudes further, a higher here capacity than the less protruding sensor electrode. By the difference signal, at least one electrical switch can be actuated and thereby, for example, a robot can be put out of action.
  • the published patent application DE 32 21 223 A1 deals with a capacitive proximity switch operated with alternating current, which can be used, for example, for monitoring a fill level in a container.
  • the utility model DE 299 15 014 Ul describes a capacitive proximity switch with an electrical bridge circuit for detecting an approaching or removing object.
  • DE 3815698 A1 discloses a self-checking proximity switch with an oscillator which can be influenced by approaching an object to its sensor surface.
  • EP 0 766 398 A1 also describes a capacitive switch with a capacitive probe having a sensor electrode and a shield electrode and an electrode having an oscillator formed by a feedback system of two amplifiers.
  • EP 1 505 734 A2 deals with a capacitive proximity switch for detecting a capacitance change, in particular for use in a door handle of a motor vehicle.
  • a disadvantage of the known methods is an expensive construction of the sensor circuits by a separation of sensor surfaces and transmitter for signal detection in different modules.
  • the object of the present invention is therefore to provide a compact, cost-effective capacitive sensor circuit.
  • a capacitive sensor circuit having the desired properties can be realized as an integrated component.
  • a capacitive sensor or measuring capacitor with at least two electrodes and evaluation electronics for controlling the capacitive sensor and for signal detection are jointly applied to a semiconductor substrate in a CMOS process.
  • the capacitive sensor is preferably arranged in an uppermost metallization layer of the integrated component and separated from it by at least one insulation layer between the uppermost metallization layer and the evaluation electronics.
  • exemplary embodiments have a metallic shielding layer between the uppermost metallization layer of the integrated sensor circuit and the electronic evaluation circuit.
  • the at least two electrodes of the capacitive sensor are arranged planar in the uppermost metallization layer.
  • a geometrical arrangement of the at least two electrodes of the capacitive sensor can be optimized depending on the application in order to form a sensitive electrical or electromagnetic field as possible above or between individual sensor electrodes.
  • the electronic evaluation circuit implements a capacitive excitation and measurement method which generates an electric field or an electromagnetic field above the capacitive sensor. beautiful alternating field builds up. A damping of the field by an introduced into the field electrically conductive body (usually a human body part) is detected by the capacitive measurement method of the electronic evaluation circuit and then evaluated. Different capacitive measuring methods can be used for the evaluation. For example, a tunable oscillator (excited RCL circuit) may be used in which the resonant frequency is affected by the capacitance sensor's changing capacitance C sens .
  • the voltage dropping across an ohmic resistance R can be determined as a measured variable, which is proportional to the capacitance Csens for a fixed resistance R and a fixed inductance L.
  • the measured voltage can still be digitized in order to calculate the capacitance C sens from a proportional relationship.
  • the electronic evaluation circuit can realize a charge transfer method (charge transfer method) in which a first capacitor is charged in a first phase and the charge is transferred in a second phase into a second capacitor.
  • charge transfer method charge transfer method
  • both the first and the second capacity can be used as a sensor capacity.
  • the size of the sensor capacitance must be known in order to determine the capacitance C sens of the capacitor to be measured. Usually, the voltage drop across the sensor capacitance is determined as the measured variable.
  • the transmitter can also have a bridge circuit up, so that the measured capacitance C s can be determined ns of the capaci tive ⁇ sensor by a calibration method in which, for example, a diagonal voltage of the bridge circuit is adjusted to zero.
  • the electronic evaluation circuit implements a differential delta-sigma method, which is disclosed in US Pat. DE 10 2005 038 875 Al is described in detail.
  • An advantage of the present invention is the fact that all components of the corresponding electronic evaluation circuit for the signal detection and evaluation can be integrated in a CMOS process and thus no external components are required.
  • a capacitive sensor can be realized as an integrated component in inexpensive and compact form.
  • FIG. 1 is a side view of a layer structure of an integrated capacitive sensor circuit according to an embodiment of the present invention
  • 2A-F show various geometries of sensor surfaces in a metallization layer according to embodiments of the present invention
  • FIG. 3 is a side view and plan view of a layer structure of an integrated capacitive sensor circuit according to another embodiment of the present invention.
  • FIG. 4 is a schematic block diagram of an integrated electronic evaluation circuit according to an embodiment of the present invention.
  • FIG. 5 is a block diagram of an electronic evaluation circuit with self-calibration functionality according to an embodiment of the present invention
  • Fig. 6 is a schematic representation of a capacitive digital-to-analog converter according to an embodiment.
  • a method for producing an integrated capacitive sensor circuit comprises, according to exemplary embodiments, an embodiment of an electronic control and evaluation circuit on a semiconductor substrate and an application of a capacitive sensor in a metallization layer over the electronic evaluation circuit, wherein the capacitive sensor is coupled to the drive and evaluation circuit ,
  • the production and application are parts of a CMOS process.
  • FIG. 1 shows a schematic side view of a layer structure of an integrated capacitive sensor 10 according to an embodiment of the present invention.
  • the integrated sensor circuit 10 has an electronic evaluation circuit 14 integrated on a semiconductor substrate 12 in a standard CMOS process. Via the electronic evaluation circuit 14, an insulation layer 16 is applied, which may possibly have required (not shown) plated-through holes from the electronic evaluation circuit 14 to a first metallization 18. Above the first metallization level 18, a further insulation layer 20 is arranged, with possible through-contacts (not shown) from the first metallization level 18 to a second or uppermost metallization level 22.
  • the uppermost metallization level 22 represents a capacitive sensor surface. To this end, at least two partial areas 22a, 22b are structured in the uppermost metallization level 22, which act as electrodes of a capacitive sensor 24. Via the through contacts of the insulation layers 20, 16, the capacitive sensor 24 or the sensor surface is coupled to the electronic evaluation circuit 14.
  • a drive signal can now be applied to the electrodes 22a, b of the capacitive sensor 24 of the sensor surface.
  • This may be, for example, a DC voltage or else an AC voltage.
  • an electrical or electromagnetic field is formed above the electrodes 22a, b.
  • This field whose field lines are indicated by way of example in FIG. 1, is dependent on the geometric arrangement of the electrodes 22a, b and the dielectric properties of the medium surrounding the electrodes 22a, b.
  • the capacitance C sens of the capacitive sensor 24 changes. This change in the capacitance C sens can be detected by the electronic evaluation circuit 14, which is coupled to the measuring capacitor 24 can be determined.
  • the geometric arrangement of the electrodes or sensor surfaces 22a, b can be optimized in order to form a sensitive electric or electromagnetic field. Some geometry variants are shown by way of example in FIGS. 2A to 2F.
  • FIGS. 2A to 2F show schematic plan views of integrated capacitive sensor circuits 10a to 10f. With the reference numeral 30 connecting pins of the integrated components 10a to 10f are indicated.
  • the at least two electrodes 22a, b in the uppermost metallization layer 22 can be patterned depending on the application.
  • FIGS. 2A and B show two electrodes 22a, b arranged parallel to one another in the uppermost metallization layer, wherein the variants shown in the two figures differ by the width and spacing of the electrodes 22a, b.
  • "parallel" refers to opposite sides of the electrodes 22a, b, and a parallel arrangement also means a slightly different orientation due to unavoidable manufacturing process tolerances, ie an angle included from opposite sides of the electrodes 22a, b is, for example less than 1 °.
  • Fig. 2C shows a substantially parallel arrangement of four metallic electrode elements 32-1 to 32- 4, of which, for example, two each form an electrode.
  • the electrode elements 32-1 and 32-2 could form an electrode and the electrode elements 32-3 and 32-4 could form a second electrode of a capacitive sensor 24. It would also be conceivable to connect the four electrode elements 32-1 to 32-4 so that two separate measuring capacitors or capacitive sensors are formed, which can then be driven in antiphase, for example.
  • two of the exemplary four electrode elements 32-1 to 32-4 could be combined into one electrode of the capacitive sensor 24.
  • 32-1 to 32-4 two separate Messkondensa ⁇ factors or capacitive sensors form an embodiment in which the four E- lektrodenimplantation, is also possible.
  • the integrated components 10d and 10e or their capacitive sensors have a (fictitious) point of symmetry 34, to which the four electrode elements 32-1 to 32-4 are arranged point-symmetrically.
  • symmetry axes could also be defined by the point of symmetry 34, to which the electrodes or electrode elements 32-1 to 32-4 are axisymmetric.
  • the electrodes or electrode elements are thus arranged symmetrically, in particular axially symmetrically.
  • FIG. 2F shows two metallic electrodes 22a, 22b, each of which is comb-shaped and overlappingly interlocking in the manner shown in FIG. 2F, so that a meander-shaped surface is formed between the two electrodes 22a, b.
  • FIGS. 2a to 2f are meant to be exemplary only and in no way intended to represent a concluding enumeration.
  • the geometry of the sensor surface or of the capacitive sensor 24 in the metallization layer 22 is to be adapted to the particular application in order to achieve an optimized sensor effect.
  • FIG. 3 A schematic side view of a layer structure of an integrated capacitive sensor circuit 40 with a reference capacitor is shown in FIG. 3.
  • the integrated sensor circuit 40 has a first metallization layer as the wiring level 42, which is insulated from the following metallization layer 18 by an insulation layer 44 via the insulation layer 16 lying above the electronic evaluation circuit 14. Over the second metallization layer 18 follows a Insulation layer 20 on which the next metallization layer 22, etc. is applied.
  • the metallization layer 22 is an uppermost metallization layer. Depending on the process, different numbers of metallization layers can be realized. At least three metallization layers are desirable for the sensor.
  • a reference capacitor 46 is formed with a reference capacitance C ref according to embodiments.
  • the reference capacitor 46 has the same geometric structure as the measuring capacitor or the capacitive sensor 24 in the uppermost metallization plane 22.
  • the same geometrical structure also means a slightly different geometrical structure due to unavoidable manufacturing process tolerances. This means that geometric deviations between the reference capacitor 46 and the capacitive sensor 24 are below 1 ° / oo (1 per thousand).
  • the reference capacitor is offset laterally with respect to the measuring capacitor 24 46, so that the two capacitors laterally ⁇ not overlap.
  • To the reference capacitor 46 is in the example shown in Fig. 3 embodiment in the top metallization layer 22 approximately ⁇ a screen surface 48 formed for electromagnetic shielding of the reference capacitor 46 of external influences.
  • a further shielding surface 50 is similar to below the reference capacitor 24 of the Screen surface 48 formed. The shielding surface 50 serves to shield the capacitive sensor 24 from the active electronic evaluation circuit 14, and vice versa.
  • a schematic plan view of the integrated capacitive sensor circuit 40 is shown in the lower part of FIG. 3.
  • the surfaces shown in gray are located in the uppermost metallization layer 22, whereas the surfaces shown in white are located in the underlying metallization layer 18.
  • tunable oscillators such as RCL circuits or non-linear Wien-Robinson oscillators, may be used in the integrated evaluation circuit 14. With them, a resonance frequency can be influenced by the changing sensor capacitance C sens .
  • Another possibility is to provide bridge circuits in the integrated evaluation circuit 14, in which the capacitance C sens to be measured can be determined by a balancing method by usually regulating a diagonal voltage of the bridge circuit to zero.
  • a block diagram of a preferred electronic evaluation tescen 14, with the sensor capacitance C s sen having a high resolution can be measured with only a relatively low component cost is necessary, as shown in Fig. 4.
  • the delta-sigma ADC 50 and the digital comparator 52 are parts of the electronic evaluation circuit 14.
  • the delta sigma ADC 50 includes a delta sigma modulator 54 and a filter and decimator block 56.
  • the delta sigma modulator 54 typically includes an operational amplifier.
  • the at least two electrodes 22a, b of the capacitive sensor 24 and the capacitance C sens are connected to the inverting and non-inverting input of the operational amplifier.
  • the electrodes 22a, b are connected to a reference signal source of the electronic evaluation circuit 14 in order to generate an electrical or electromagnetic alternating field.
  • the delta-sigma modulator 54 forms in its input integrator (not shown) a difference between the charges of the sensor capacitance C sens and the reference capacitance C re f. If both capacities are exactly the same, the charge difference becomes zero. If the electric or electromagnetic field is then influenced by the sensor capacitance C sens of the capacitive sensor 24, this leads to a change in the charge quantity in the sensor capacitance C sen s, which is transferred to the integrator of the delta-sigma modulator 54.
  • the delta-sigma modulator 54 generates at its output a digital bit stream, which is converted into a digital value by a low-pass filter and a sampling rate decimator in the filter and decoder block 56.
  • the digital value at the output of the filter and decimator block 56 represents the difference in charge between the two capacitors C REF and C sens -
  • the reference capacitance C r ⁇ f of the reference capacitor 46 should correspond as closely as possible to the sensor capacitance C sens of the capacitive sensor 24 in the rest position, ie without external influence on the electrical or electromagnetic field of the capacitive sensor 24. In a preferred embodiment, this can be achieved by virtue of the reference capacitor C ref or the reference capacitor 46 being given exactly the same geometric structure as the measuring capacitor 24, as has already been described above with reference to FIG. 3. In contrast to the sensor capacitance C sens , the reference capacitance C re f should not be damped or changed by an external influence.
  • the shield surface 48 of the upper metallization layer 22 shields the reference capacitance 46 against external influences.
  • the capacitive sensors or capacitors 24, 46, in particular the reference capacitor 46 can also be realized differently than with reference to FIGS. 1 to 3.
  • Conceivable for example, in the reverse direction operated pn junctions, poly-silicon / diffusion capacitances, poly-silicon / poly-silicon capacitances or metal / metal capacitances.
  • Process and production variations can sometimes lead to significant fluctuations in the production of integrated capacitors or capacitors. Therefore, in embodiments of the present invention, a fine balance between the sensor capacitance C sens and reference capacitance C re f is performed by a self-calibration algorithm.
  • the reference capacitance C r ⁇ f is replaced or supplemented by a capacitive digital-to-analog converter.
  • a capacitive digital-to-analog converter should be understood to mean an arrangement of binary weighted capacitances which can be applied via digital switches, for example to a reference input of the delta-sigma modulator 54.
  • the digital switches of the capacitive digital-to-analog converter are switched on according to a successive approximation principle until the output of the decimator 56 at rest reaches the digital value "zero" and thus indicates that the charges (Q ie t, Qsen s ) in reference and sensor capacitance C re f, C sens are at least approximately identical, ie within a predetermined tolerance range, such as 0.95Q re f ⁇ Q s ns ⁇ l-05Q re f this calibration method also for the reference capacitance C ref and the reference capacitor 46 shown in FIG.
  • FIG. 5 shows a schematic block diagram for the realization of the above-described calibration method of the evaluation circuit 14.
  • the reference capacitor .C ref is replaced by a capacitive digital-to-analog converter 60 compared to FIG.
  • the analog output, that is to say the capacitance, of the capacitive digital / analog converter 60 is compared via a comparator 54, 56 with a desired value, that is, the sensor capacitance Csens > .
  • a desired value that is, the sensor capacitance Csens > .
  • MSB Most Significant Bit
  • LSB Least Significant bit
  • the comparator 54, 56 compares the reference capacitance C r ⁇ f with the sensor capacitance Cg e n s and causes the SAR controller 62 to reset the bit in progress when the reference capacitance Cref is higher than the sensor capacitance C sen s- Reference capacitance C re f is less than or equal to the sensor capacitance Cg ens , the bit remains set.
  • a (successive) approximation of the reference capacitance Cr ef to the sensor capacitance C sens takes place step by step.
  • n is the number of bits or switches
  • the output value C ref of the capacitive digital-to-analog converter 60 is as close as possible to the reference value C sens at rest.
  • FIG. 6 A block diagram of the capacitive digital-to-analog converter 60 according to an exemplary embodiment is shown in FIG. 6.
  • the capacitive digital-to-analog converter 60 has, between its two terminals, a parallel connection of capacitors C re f, i to C re f f5 which can be switched via switches 70-1 to 70-5.
  • the SAR controller 62 can instruct the SA register 64, a capacitance deviation at least approximately corresponding capacitance C ref , x on or off, depending on whether the total reference capacitance C ref is smaller or larger than the sensor capacitance C sens .
  • a corresponding larger capacity of the capacitances C r e f , x is added or removed.
  • an integrated capacitive sensor circuit 10, 40 is encapsulated hermetically and electrically insulating in a standard plastic housing customary for semiconductor production.
  • the field lines of the at least two electrodes 22a, b or of the capacitive sensor 24 can propagate to the outside almost unhindered through the plastic material of the housing. A user is thus already galvanically separated from the current-carrying parts of the integrated capacitive sensor 10, 40 by the construction technique.
  • embodiments of the present invention thus provide a compact integrated capacitive Semiconductor-based sensor that can be fabricated in conventional CMOS process steps.
  • An electronic evaluation circuit 14 integrated on a semiconductor substrate can measure a sensor capacitance C sens with high resolution, whereby only a relatively small component expenditure is required.
  • sensor surfaces and signal detection can be integrated together in one component, whereby a complex construction of conventional capacitive sensors can be avoided.

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  • Semiconductor Integrated Circuits (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

L'invention concerne un circuit de capteur capacitif intégré comportant un capteur capacitif (24) formé dans la couche de métallisation (22) supérieure du circuit de capteur capacitif intégré, ce capteur comportant au moins deux électrodes (22a,22b) disposées dans la couche de métallisation (22) supérieure et un circuit électronique d'évaluation (14) couplé au capteur capacitif pour déterminer une modification de capacité du capteur capacitif (24), le capteur capacitif (24) et le circuit d'évaluation (14) étant intégrés ensemble sur un substrat semi-conducteur (12).
EP08758791A 2007-06-04 2008-05-27 Capteur capacitif intégré Withdrawn EP2162987A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE200710025947 DE102007025947B4 (de) 2007-06-04 2007-06-04 Integrierter kapazitiver Sensor
PCT/EP2008/004206 WO2008148481A1 (fr) 2007-06-04 2008-05-27 Capteur capacitif intégré

Publications (1)

Publication Number Publication Date
EP2162987A1 true EP2162987A1 (fr) 2010-03-17

Family

ID=39629083

Family Applications (1)

Application Number Title Priority Date Filing Date
EP08758791A Withdrawn EP2162987A1 (fr) 2007-06-04 2008-05-27 Capteur capacitif intégré

Country Status (3)

Country Link
EP (1) EP2162987A1 (fr)
DE (1) DE102007025947B4 (fr)
WO (1) WO2008148481A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2386143B1 (fr) * 2009-01-12 2013-05-29 Zentrum Mikroelektronik Dresden AG Convertisseur capacitif-numérique d'équilibrage de charge étendu
DE102009029021B4 (de) 2009-08-31 2022-09-22 Robert Bosch Gmbh Sensorsystem zur Umfeldüberwachung an einem mechanischen Bauteil und ein Verfahren zur Ansteuerung und Auswertung des Sensorsystems
DE102011003734B3 (de) * 2011-02-07 2012-06-14 Ident Technology Ag Elektrodenkonfiguration für eine kapazitive Sensoreinrichtung sowie kapazitive Sensoreinrichtung zur Annäherungsdetektion
DE102012002193B4 (de) 2012-02-07 2021-07-29 Polyic Gmbh & Co. Kg Kapazitives Sensorelement

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US3761736A (en) * 1971-05-12 1973-09-25 Godwin Warren Engin Ltd Proximity switches
US6970126B1 (en) * 2004-06-25 2005-11-29 Analog Devices, Inc. Variable capacitance switched capacitor input system and method

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Also Published As

Publication number Publication date
WO2008148481A1 (fr) 2008-12-11
DE102007025947A1 (de) 2008-12-11
DE102007025947B4 (de) 2009-02-26

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