Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
  • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
  • G01R19/2506—Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
  • G01R19/2509—Details concerning sampling, digitizing or waveform capturing
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/12—Analogue/digital converters
  • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
  • H03M1/1245—Details of sampling arrangements or methods
  • H03M1/1285—Synchronous circular sampling, i.e. using undersampling of periodic input signals

Definitions

• the present invention relates to signal processing.
• US 6,462,693 B1 by the same applicant Agilent Technologies discloses converting an analog signal into a quantity of digital signal representations.
• the method comprises the step of comparing an amplitude value in the analog signal to a quantity of reference amplitude values to determine whether the analog value is greater than or less than a reference value.
• the method further comprises the step of producing a logic level in a digital signal corresponding to the determination in the step of comparing.
• the method essentially converts the analog signal to a time representation and then converts the time representation to a digital representation.
• the apparatus comprises a quantity of comparators each connected to receive the analog signal, separately to receive a different one of the reference values, and to produce the digital signal. The analog signal is reconstructed from the digital representation.
• US 6,429,799 B1 by the same applicant Agilent Technologies discloses converting an analog signal into a digital representation.
• the method comprises the steps of generating a quantity of time-varying reference signals, comparing an amplitude of the analog signal to an amplitude of each of the reference signals to determine whether the analog signal amplitude is greater than, less than or equal to reference signal amplitudes, and producing a timestamp each time the analog signal and reference signal amplitudes are equal.
• the apparatus comprises a reference signal generator and a quantity of comparators, each of the comparators being connected to receive the analog signal, separately to receive a different one of the reference signals, and to produce a digital signal.
• the analog signal may be reconstructed from the digital representation.
• US 2004/0070529 A1 by the same applicant Agilent Technologies discloses preconditioning an analog signal and converting the preconditioned signal into a digital representation.
• the method comprises preconditioning the analog signal, generating a quantity of reference signals, comparing an amplitude of the preconditioned signal to an amplitude of the reference signals to determine whether the preconditioned signal amplitude is greater than, less than or equal to reference signal amplitudes, and producing a timestamp at a time that the preconditioned signal and reference signal amplitudes are equal.
• the apparatus comprises a preconditioner, a reference signal generator and a quantity of comparators. A comparator of the quantity of comparators receives the preconditioned signal from the preconditioner, separately receives a reference signal, and produces a digital signal. The preconditioned signal or the analog signal may be reconstructed from the digital representation.
• S. Sunter "An Automated, Complete, Structural Test Solution for SERDES", IEEE International Test Conference, 2004, pp. 95-104, discloses jitter test of Gigahertz serialization and deserialization (SERDES) which has become a dominant inter-chip and interboard data transmission technique.
• Signal integrity is the primary factor determining its bit error rate, typically less than 10 ⁇ 12 , so the primary production test challenges are testing picosecond jitter and the signal eye opening.
• Off-chip jitter and rise/fall time measurements are limited by hardware complexity, access, bandwidth, and noise. Published on-chip measurement techniques are limited by delay line jitter.
• This paper presents a new jitter test technique that has been demonstrated on an FPGA to achieve less than 1 ps RMS self-jitter, and a new signal eye test that has unlimited bandwidth; neither test uses high speed circuitry.
• the all-digital technique uses the receiver itself to demodulate the signal jitter to a low-speed bit stream that is analyzed by a single-clock domain, synthesizable circuit. This is combined with logic BIST and 1149.6 boundary scan to completely test an IC.
• a signal processing device for processing a signal comprising a comparator unit for comparing the signal with a reference signal, a generation unit for generating digital result signals indicative of the result of the comparing, an evaluation unit for determining transition times of the digital result signals, and an output signal calculation unit adapted for calculating essentially uniformly spaced output signals (based on the, for instance non-equidistant, digital result signals).
• a measurement apparatus comprising a signal processing device having the above-mentioned features for processing a (for instance repetitive) signal related to a measurement carried out by the measurement apparatus.
• a signal processing method of processing a signal comprising comparing the signal with a reference signal, generating digital result signals indicative of the result of the comparing, determining transition times of the digital result signals, and calculating essentially uniformly spaced output signals (for instance based on the digital result signals).
• a computer-readable medium in which a computer program of processing a signal is stored, which computer program, when being executed by a processor, is adapted to control or carry out the above-mentioned method.
• a program element of processing a signal is provided, which program element, when being executed by a processor, is adapted to control or carry out the above-mentioned method.
• Embodiments of the invention can be partly or entirely embodied or supported by one or more suitable software programs, which can be stored on or otherwise provided by any kind of data carrier, and which might be executed in or by any suitable data processing unit.
• Software programs or routines can be preferably applied for processing a signal.
• the signal processing according to an embodiment of the invention can be performed by a computer program, i.e. by software, or by using one or more special electronic optimization circuits, i.e. in hardware, or in hybrid form, i.e. using software components and hardware components.
• non-equidistant signals obtained with any signal processing scheme may be manipulated to thereby generate signals being essentially equidistant (for example in the time domain).
• a uniform signal reconstruction scheme may be provided allowing to provide output signals in a format which is in some sort "standardized" (with respect to a time sequence of the signals) and therefore suitable for many post-processing schemes.
• a signal having some kind of periodicity is processed by undersampling.
• undersampling may denote a sampling scheme in which a signal is sampled with a sample rate that is less than twice the single bandwidth.
• the repetitive signal is compared with a compare or reference signal at these points in time. The result of this comparison may be that the repetitive signal is larger than the reference signal, is smaller than the reference signal or is equal to the reference signal.
• some kind of digital result signal may be generated indicative of a result of this comparison.
• Information about the repetitive signal may be "encoded” in the points of time at which a transition of this digital result signal form “0" to "1 ", or vice versa, occurs.
• an information about the signal to be processed may be included in points of time at which a transition of the logical value of the result of the comparison occurs.
• the analog signal may be reconstructed from the digital representation.
• coherent sampling that is to say to ensure a defined time correlation between the operation of the individual components of the signal processing device, particularly of the unit generating the reference signal and the determining signal.
• coherence may be obtained, for instance, by providing a common clock signal for such components, or by strictly linking or coupling the timing of such components, for instance using frequency locking or the like.
• ATE coherent digital automatic test equipment
• a test or stimulus signal may be fed to an input of the device under test (DUT), and the response signal from the device under test may be evaluated by an automatic test equipment, for instance by comparison with expected data.
• an automatic test equipment may have included a particular test functionality, that is to say test functions or routines which the test equipment may carry out.
• the test functionality may be incorporated in a test equipment in the form of executable software code.
• Exemplary embodiments may transform results of such a data processing into a "standard" ADC (analog-to-digital converter) result format. For instance, after having undersampled the repetitive signal a plurality of times with different points of time within the periodicity of the repetitive signal, it may be advantageous to resort the data points so as to get interpolations between data points with each new iteration of the repetitive signal. However, by performing such a resorting, the equidistant character of the signals may be influenced, so that the output signals may be non- equidistantly. Embodiments of the invention may take such non-equidistant signals and post-process them so as to derive an essentially equidistant sequence of output signals, for instance essentially equidistant in time or in frequency.
• ADC analog-to-digital converter
• embodiments of the invention may be implemented within an Analog-to-Digital Converter (ADC) in which an analog signal shall be digitized.
• ADC Analog-to-Digital Converter
• an analog waveform may be converted to a digital signal.
• a repetitive signal may be undersampled.
• analog may denote a signal having a continuous level (for instance a modulated radio frequency signal).
• digital may particularly denote a signal having discrete levels (for instance a logical value "1" or "0").
• An exemplary field of application of embodiments of the invention is "automatic test equipment", i.e. the digitalization of analog test signals in the context of testing a device under test (DUT). Since such a test may be repeatable, thus the concept of undersampling a repetitive signal may be applied.
• automated test equipment i.e. the digitalization of analog test signals in the context of testing a device under test (DUT). Since such a test may be repeatable, thus the concept of undersampling a repetitive signal may be applied.
• coherent sampling may be particularly understood as to be as sub-form of "undersampling".
• "Undersampling” may denote that the sampling is performed in a slower manner or with a slower sample rate than necessary to capture all required information without repetition.
• coherent sampling a defined ratio between the sample period and the repetition time of the signal may be ensured or adjusted.
• Digital undersampling may be carried out with the goal to measure the transition times or timestamps with increased accuracy.
• the repetitive signal is sampled a plurality of times, and a fractional frequency ratio between signal frequency and sample rate may be selected. Taking this measure, intermediate sample points may be generated, thereby increasing accuracy of the determined transition times. Accuracy may particularly be increased by repeating the waveform a large number of times, and by selecting a sufficiently high sample rate.
• an analog-to-digital converter implementing coherent sampling for measuring transition times for reconstructing an analog waveform may be provided.
• an ADC may be implemented advantageously within a measurement device, like a test device for testing a device under test (DUT).
• a control clock unit may provide a clock signal which can be used globally by the signal processing device, thereby enabling coherent time stamping. Coherent sampling may increase accuracy of the sampling at the determined points of time. [0025] Therefore, according to an exemplary embodiment, undersampling (or some kind of digitization) of repetitive analog signals, including modulated RF signals, may be performed. Such signals may particularly have a frequency range between 100 MHz and 10 GHz. As a modulation scheme, amplitude modulation, frequency modulation or face modulation may be used, for instance.
• Such an undersampling may be embedded in the field of automatic test equipment (ATE), where mixed signal/RF tests are performed and where signals can be made repetitive.
• ATE automatic test equipment
• any technical field in which repetitive signals occur may be a potential field of application of exemplary embodiments.
• test criteria assume access uniformly the space samples, like from a conventional ADC, or assume access to the signal spectrum.
• the term "digital” may denote two levels, independent of time.
• the term “analog” may denote that the levels are continuous, independent of time.
• Analog signals may include modulated RF signals.
• the term “coherent” may denote an N/M frequency or period ratio, wherein N may be the number of sample points and M may be the number of repetitions of the signal to be sampled, and wherein N and M are coprime.
• a signal processing device may be provided in which a repetitive analog signal is evaluated. For such an analog signal, a comparison to a known level or to known levels or to any other waveform may be performed. The result of such a comparison may be a digital signal. The digital compare signal may then be coherently sampled so as to obtain digital samples. Next, precise transition times may be determined of compare signals from digital samples. Samples may be constructed using the transition times plus the levels of the known waveform at the transition times.
• the repetitive signal it is possible to compare the repetitive signal to one static level, multiple static levels, sine waves, other dynamic waveforms, or preconditioned signals. It is possible to use a digital ATE channel as coherent sampler. Furthermore, jitter may be selectively added to the signal to improve resolution/accuracy.
• the "first" signal after the transition may be determined, the "last” signal before the transition may be determined, a “mid” time between the last and the first point may be determined, or a "count” may be performed in an interval between measurement points before and after a transition.
• an analog signal may be processed by the signal processing device.
• the analog signal may be compared to known levels. Afterwards, transition times of the compare signal may be determined.
• Samples may be constructed. These samples may be transformed into a usual "ADC" format.
• an interpolation may be performed, NUFFT (Non-Uniform Fast Fourier Transformation) may be performed, and/or a Non-Uniform Discrete Fourier Transformation (NUDFT) may be performed.
• NUFFT Non-Uniform Fast Fourier Transformation
• NUDFT Non-Uniform Discrete Fourier Transformation
• an offset correction by including DC term in NUDFT.
• Spur suppression may be enabled by including known spur frequencies in NUDFT.
• noise suppression may be carried out. It is possible to use equally spaced frequencies in a single contiguous frequency range, like in a conventional FFT.
• an RF receiver using digital ATE channel may be provided.
• a (modulated) narrowband (RF) signal may be used. It may be compared to one (or more) static level(s).
• a digital ATE channel may be used for coherent sampling. Accurate crossing times may be determined.
• a narrowband spectrum may be reconstructed (NUDFT). The result may be down- converted by simple frequency shifting.
• the signal processing device may be adapted for processing a repetitive analog signal.
• Such an analog signal may represent any continuous value.
• the term repetitive may have the meaning that the signal has some kind of periodicity and is repeated a plurality of times.
• the signal processing device may be adapted for processing a repetitive modulated radio frequency (RF) signal. Particularly, such a signal processing may be performed in the context of an RF receiver.
• RF radio frequency
• the signal processing device may be adapted as an Analog-to-Digital Converter (ADC) for converting a repetitive analog signal into a digital signal.
• ADC Analog-to-Digital Converter
• Implementing the coherent sampling in such a conversion may allow to perform the conversion with high precision.
• Recalculating the result signal so as to obtain equidistantly spaced result signals may simplify the post-processing of such a converted signal.
• the determining unit may be adapted for determining different points of time for each of a plurality of repetitions. When different periods of such a repeated signal are compared based on different repetitions, the sampled points of subsequent periods may be shifted with respect to one another. By taking this measure, intermediate points of the sampling may be obtained so as to refine the analysis.
• the determining unit may be adapted for determining different points of time for each of a plurality of repetitions so as to obtain essentially uniformly spaced time data.
• this uniform spaced time feature may be combined with an efficient way of obtaining intermediate points for each repetition of the signal.
• the reference signal may be one of the group consisting of a single signal being constant in time, a plurality of signals each being constant in time, a signal varying in time in accordance with a predefined waveform, and a sine signal.
• any other waveforms are possible, for instance any trigonometric function, a sawtooth function, a step function, etc.
• the evaluation unit may be adapted for determining the transition times taking into account the signal at points of time related to different ones of a plurality of repetitions.
• different repetition sample signals may be combined to increase accuracy, particularly to obtain intermediate signals between two data points. This may refine the data format conversion.
• the number of points of times may be larger than the number of repetitions.
• the ratio between the number of points of time and the number of repetitions may be a non-integer value. The latter measure may ensure that additional repetitions provide additional information about the signal.
• the signal processing device may comprise a sorting unit adapted for sorting the digital result signals related to different repetitions in accordance with a chronology of the corresponding points of time within the periodicity of the repetitive signal.
• a sorting unit adapted for sorting the digital result signals related to different repetitions in accordance with a chronology of the corresponding points of time within the periodicity of the repetitive signal.
• the generation unit may be adapted for generating a digital result signal having a first logical value (for instance "1") in case that the respective repetitive signal is larger than the reference signal, and may be adapted for generating a digital result signal having a second logical value (for instance "0") in case that the respective repetitive signal is smaller than the reference signal. Therefore, the transition time may be calculated as a point of time at which a transition from the first logical value to the second logical value occurs. For this purpose, the evaluation unit may determine the transition times based on an analysis of the last point of time in a sequence in which the digital result signal has the first logical value.
• a first point of time may be determined as the time of transition in a sequence in which the digital result signal has the second logical value. It is also possible to calculate an average time between this last point of time of the first logical value and the first point of time of the second logical value.
• the evaluation unit may be adapted to determine the transition times according to an operation mode which is selected in accordance with a degree of presence of signal jitter or signal noise.
• signal jitter/noise When signal jitter/noise is large, it is relatively likely that signal distortions occur and that the transition interval comprises some distorted measurement points.
• the numerically more easy solution may be preferred, namely to use the last time of the first logical value or the first point of time of the second logical value, or an average thereof, as an actual transition time.
• the signal processing device may comprise an output signal calculation unit adapted for calculating essentially uniformly spaced output signals. By the reordering, the equidistance may be achieved. However, it may be desirable for post-processing of the signals, that the signals are essentially uniformly spaced, particularly uniformly spaced in time or uniformly spaced in frequency.
• the output signal calculation unit may be adapted for determining the essentially uniformly spaced output signals by using a Sine interpolation (that is to say a mathematical function being formed by the ratio of the sine of the argument and the argument, wherein the argument may be the time), a polynomial interpolation (for example a Lagrange interpolation, a spline interpolation, or a linear interpolation). It is also possible to implement a fractional delay filter.
• a Sine interpolation that is to say a mathematical function being formed by the ratio of the sine of the argument and the argument, wherein the argument may be the time
• a polynomial interpolation for example a Lagrange interpolation, a spline interpolation, or a linear interpolation. It is also possible to implement a fractional delay filter.
• the output signal calculation unit may be adapted for calculating the output signal by performing at least one of the group consisting of a Fast Fourier Transformation (FFT), a Non-Uniform Fast Fourier Transformation (NUFFT), a Non- Uniform Fast Fourier Transformation (NUFFT) with Fast Multipole Method (FMM), and a Non-Uniform Discrete Fourier Transformation (NUDFT).
• FFT Fast Fourier Transformation
• NUFFT Non-Uniform Fast Fourier Transformation
• NUFFT Non- Uniform Fast Fourier Transformation
• FMM Fast Multipole Method
• NUDFT Non-Uniform Discrete Fourier Transformation
• the signal processing device may be adapted for processing the repetitive signal using coherent sampling. Coherent sampling may denote that the time properties of the sampling are well-established.
• Coherent sampling may be enabled by implementing a clock generating unit adapted for generating a common clock signal for a plurality of components of the signal processing device.
• a clock generating unit may supply a common clock signal to a device under test, to a reference signal generator for generating the reference signal and to a unit for evaluating or processing the compare signal.
• the clock generating unit may generate a common clock signal for a part of or for all components of the signal processing device.
• a plurality of clock generating units may be provided, each adapted for generating an individual clock signal for an assigned component of the signal processing device, wherein the plurality of clock generating units may be frequency-locked.
• the plurality of clock generating units may be frequency-locked.
• three frequency-locked generators with the same output frequencies may be provided to generate individual clock signals for the device under test, a reference signal generator and a unit for evaluating the compare signal.
• the signal processing device may further comprise a jitter adding unit adapted to selectively add jitter to the repetitive signal and/or to the compare signal and/or to the coherent sample clock.
• a jitter adding unit adapted to selectively add jitter to the repetitive signal and/or to the compare signal and/or to the coherent sample clock.
• the signal processing device may comprise an automatic test equipment unit (ATE) providing an environment for the DUT so that the DUT is a source for providing the repetitive signal, like an Agilent 93000 test apparatus.
• ATE automatic test equipment unit
• the signal processing device may particularly be implemented as an ADC of an such an ATE for testing a device under test, for instance a chip for a mobile phone.
• Such an automatic test equipment may provide an environment for the DUT so that the DUT is the source for providing the repetitive signal, and may be implemented for testing a device under test.
• a signal generation unit of the measurement apparatus may be adapted to generate, as the repetitive signal or as a basis for a repetitive signal, a stimulus signal to be applied to a device under test for testing the device under test. It is also possible that the DUT generates a repetitive signal based on a (repetitive or non-repetitive) stimulus signal of the measurement apparatus.
• a stimulus signal may be any signal pattern which is applied to pins of a DUT, for instance a chip to be tested, and a response signal can be detected at other pins of the DUT. By comparing such response signals with expected signals, it may be determined whether the device under test is acceptable or has to be rejected.
• the signals are usually repeated a plurality of times.
• a signal processing device may be advantageously implemented in such a measurement apparatus, particularly in the context of an ADC used for such a measurement apparatus.
• the measurement apparatus may further be adapted to receive, as the repetitive signal, a response signal from a device under test in response to applying a stimulus signal to the device under test for testing the device under test.
• the device under test may generate the repetitive signal which may then be evaluated by a signal processor of the measurement apparatus.
• the measurement apparatus may comprise at least one of the group consisting of an Analog-to-Digital Converter (ADC), a sensor device (for instance for sensing a parameter of a DUT), a test device for testing a device under test or a substance (for instance an apparatus of the Agilent 93000 series), a device for chemical, biological and/or pharmaceutical analysis, a fluid separation system adapted for separating compounds of a fluid, a capillary electrophoresis device, a liquid chromatography device, a gas chromatography device, an electronic measurement device, and a mass spectroscopy device.
• ADC Analog-to-Digital Converter
• a sensor device for instance for sensing a parameter of a DUT
• test device for testing a device under test or a substance (for instance an apparatus of the Agilent 93000 series)
• a substance for instance an apparatus of the Agilent 93000 series
• a device for chemical, biological and/or pharmaceutical analysis for chemical, biological and/or pharmaceutical analysis
• embodiments may be employed in many fields of electronics and measurement applications, for instance in life science regime, or in any field of analog or digital electronics in which accurate signal conversion or signal processing may be an issue, particularly when a repetitive signal is used.
• FIG. 1 shows a signal processing device according to an exemplary embodiment of the invention.
• Fig. 2 shows diagrams in the context of coherent time stamping.
• FIG. 3 illustrates a signal processing device according to an exemplary embodiment.
• Fig. 4 shows diagrams illustrating the function of a signal processing device in the presence of jitter.
• Fig. 5 shows diagrams illustrating an operation mode of a data processing device in the presence of jitter.
• FIG. 6 shows diagrams during an operation of a signal processing device for analog waveform reconstruction according to an exemplary embodiment.
• FIG. 7 illustrates a data processing device according to an exemplary embodiment of the invention.
• Fig. 8 illustrates uniform interpolation in the context of a signal processing device according to an exemplary embodiment.
• FIG. 9 shows a measurement apparatus according to an exemplary embodiment.
• a repetitive signal source 101 is adapted to generate a periodic repetitive signal 102.
• the repetitive signal 102 is a periodic signal which is repeated several times. This repetitive signal 102 is used in the context of investigating a device under test.
• the repetitive signal 102 is supplied to an input of a determining unit 103.
• the determining unit 103 is adapted for determining a number of points of times for undersampling the repetitive signal 102.
• These points of times at which the repetitive signal 102 is sampled may be supplied in the form of a control signal 104 to a flip flop 130 located at an output of a comparator unit 105 at which output a comparator signal 120 may be provided indicative of a result of the comparison.
• Afirst signal input of the comparator unit 105 is supplied with the repetitive signal 102.
• a second signal input of the comparator unit 105 is supplied with a reference signal 106 which is generated by a reference signal generator unit 107.
• a clock generating unit 108 generates clock signals 109a, 109b which are supplied to the repetitive signal source 101 and the reference signal generator 107, respectively. In this context, it may be ensured that the reference signal source 101 and the reference signal generator 107 are synchronized so as to enable coherent sampling.
• the comparator unit 105 is adapted for comparing the repetitive signal 102 with the reference signal 106. A result of this comparison is provided at an output of the comparator unit 105 coupled to an input of the flip flop 130.
• the flip flop 130 is supplied with the compare signal 120 provided at the output of the comparator unit 105 and generates, taking into account the control signal 104 indicative of a number of specific compare times, a digital result signal 110.
• the digital result signal 110 is supplied to a re-sorting unit 111 which is adapted for re-sorting the digital result signals 110 related to different repetitions of the repetitive signal 102 in accordance with a chronology of the corresponding points of time defined by the time control signal 104 within the periodicity of the repetitive signal 102 (see Fig. 2). After having reordered the components of the signal 110, it is supplied to an evaluation unit 112 for determining transition times of the digital result signal 110. The transition times are assumed to include the information to be derived by the signal processing of the system 100.
• the evaluation unit 112 evaluates, based on the sorted signals 113, transition time signals 114 which are supplied to an output signal generation unit 115.
• the output signal calculation unit 115 calculates output signals 116 which are essentially uniformly spaced in time and which are supplied at an output of the signal processing device 100.
• the repetitive signal 102 is a repetitive analog signal, more particularly a repetitive modulated radio frequency signal.
• the signal processing device 100 is adapted for analog-to-digital-signal-conversion, so as to provide a digital signal 116 indicative of the analog waveform of the signal 102.
• the determining unit 103 determines different points of time for each of the plurality of repetitions of the signal 102 at which the comparison is performed by the comparator unit 105. Therefore, the signals generated by the determining unit 103 are essentially uniformly spaced in time.
• the reference signal 106 is a constant signal in the embodiment of Fig. 1.
• the digital result signal 110 may have a logical value of "1" in case that, at a particular point of time, the repetitive signal is larger or equal than the reference signal 106. In the alternative case that the repetitive signal is smaller than the reference signal 106, the logical value of the digital result signal 110 is "0".
• the output signal calculation unit 115 may perform an interpolation so as to derive the output signal 116 to be essentially uniformly spaced in time. For this purpose, a plurality of signal transformation algorithms may be applied by the output signal generation unit 115.
• the clock generation unit 108 generates a first clock signal 109a for the repetitive signal source 101 and a second clock signal 109b for the reference signal generator 107.
• the clock generation unit 108 generates a common clock signal for the repetitive signal source 101 and for the reference signal generator 107.
• Fig. 1 enables a measurement of transition times for analog waveform reconstruction. This will be further clarified on the basis of the diagrams 200 and diagram 250 shown in Fig. 2.
• the signal 102 to be sampled has a sine-like shape, but can have any alternative shape, particularly periodic shape.
• N and M may be coprime or relatively prime.
• the transition times 251 of the repetitive digital compare signal 120 may be evaluated or estimated accurately through coherent digital sampling using a digital ATE channel.
• the time interval between two measurement moments 203 may be denoted as Ts, and the time duration of a period of the repetitive signal 102 may be denoted as T R .
• Ts time duration of a period of the repetitive signal 102
• T R time duration of a period of the repetitive signal 102
• the transition time 251 is between the time of the last sample before the transition and the time of the first sample after transition.
• Level accuracy of samples may only be determined by the accuracy of transition time measurements, not for instance by the number of static compare levels.
• a coherency feature according to an exemplary embodiment of the invention will be explained based on the signal processing device 300 shown in Fig. 3.
• Fig. 3 shows a device under test 301.
• the device under test 301 generates a signal under test s(t) (wherein t is the time) which is supplied to a first signal input of a comparator 302.
• a reference signal r(t) is supplied to a second signal input of the comparator 302 and is been generated by a reference signal generator 303.
• a compare signal c(t) is provided which is supplied to a flip-flop 304.
• the output of the flip-flop 304 is coupled to an input of a memory 305.
• An output of the memory 305 is coupled to an input of a transition time algorithm unit 306 for determining the desired transition time(s).
• the data processing device 300 comprises a common clock generator unit 307 which generates a common clock for different components of the system 300.
• the clock generator unit 307 is coupled to a divider DN unit 308 for supplying a clock signal to the flip-flop 304. Further, the clock generator unit 307 is coupled to a divider Dref 309 generating a clock signal to be supplied to the reference signal generator 303. Moreover, the clock generator 307 is coupled to a divider DM 310 which is, in turn, coupled to the device under test 301 so as to generate a clock signal for the device under test 301.
• coherency may be ensured for instance through the common clock reference.
• the signal under test repeats after the time T R (controlled by the divider DM 308).
• the dynamic reference signal has a period T Re f and is controlled by the divider Dref unit 309.
• a static compare level requires no clock.
• a digital sample period T s may be implemented controlled by the divider unit DN 310.
• blocks 304 to 306 of the system 300 may be substituted by any desired time to digital converter unit.
• the conversion from non- equidistant samples into equidistant samples may be performed with any signal processing scheme, more particularly may be applied to any digitalization of a signal with time stamps.
• the generation of equidistant samples from non- equidistant samples is not restricted to repetitive signals.
• Fig. 4 shows diagrams 400, 430, 450 illustrating the situation of Fig. 2 in the context of the measurement of transition times of imperfect signals, that is to say of signals which are disturbed by noise and/or jitter.
• jitter may allow interpolation between samples. It is also possible to add jitter artificially if not noisy enough (for instance some small PRBS signal to sample clock, or connect a noisy diode to comparator input).
• the plot in Fig. 4 includes a level of noise of 0.02 rms.
• Fig. 5 again shows a diagram 500 which is similar to the diagram 400 of Fig. 4 and shows a diagram 550 which is similar to the diagram 450 of Fig. 4.
• One easy way of determining a transition time without averaging is to take the first "1".
• the total number of samples is 256.
• the last "0" can be selected, which would result in the estimation of the transition time at measurement point 203 #22.
• a first diagram 600 shows the time dependence of the signals s(t), r(t) and c(t) in accordance with Fig. 3 for a first resolution value of 0.005.
• a second diagram 650 shows the time dependence of these signals s(t), r(t) and c(t) for a second resolution value of 0.0001.
• Circles in diagram 600, 650 show the "measured" samples (T k , V k ) for a resolution of 0.005 (diagram 600) and 0.0001 (diagram 650).
• Fig. 7 The left hand side of Fig. 7 essentially equals to Fig. 3, so that only the additional components will be explained in the following.
• the signal processing device 700 comprises a uniform interpolation unit 701 , a Fast Fourier Transformation unit 702, a Non-Uniform Fast Fourier Transformation unit 703, an Inverse Fast Fourier Transformation unit 704, a Non-Uniform Discrete Fourier Transformation unit 705, a down conversion unit (frequency shift) 706 and an Inverse Fast Fourier Transformation unit 707.
• An output of the transition time algorithm unit 306 is supplied to a first output 708 as a non-uniform time sample signal. Furthermore, the output of the transition time algorithm unit 306 is supplied to an input of the uniform interpolation unit 701. An output of the uniform interpolation unit 701 supplies a uniform time sample signal 709.
• the output of the uniform interpolation unit 701 is coupled to an input of the FFT unit 702, wherein an output of the FFT unit 702 provides a uniform spectrum signal 710.
• the output of the transition time algorithm unit 306 is supplied to an input of the NUFFT unit 703.
• a uniform spectrum signal 711 is provided.
• the output of the NUFFT unit 703 is coupled to an input of the Inverse FFT unit 704.
• uniform time samples 712 are provided.
• the output signals of the transition time algorithm unit 306 are supplied to the Non-Uniform DFT unit 705.
• a signal 713 is provided which is indicative of a spectrum at selected user-defined frequencies.
• the output of the Non- Uniform DFT unit 705 is coupled to an input of the down conversion unit 706.
• a baseband spectrum signal 714 is provided at an output of the down conversion unit 706, a baseband spectrum signal 714 is provided. Furthermore, the output of the down conversion unit 706 is coupled to an input of the Inverse FFT unit 707. At an output of the Inverse FFT unit 707, a uniform baseband sample time signal 715 is provided. In a practical application, usually only a few of the outputs are foreseen, for instance one or two.
• non-uniform samples (T 1 , V 1 ) are fine, for instance for eye diagram.
• many applications require data representation with uniformly spaced time samples or spectrum at uniformly spaced frequencies.
• NUFFT Non-Uniform Fast Fourier Transformation
• FMM Fast Multipole Method
• Non-Uniform DFT Non-Uniform Discrete Fourier Transformation, not so "fast”
• This may be useful for narrowband (for instance RF) signals.
• Fig. 8 shows a first diagram 800 and a second diagram 850 which are similar to the diagrams of Fig. 6.
• Fig. 8 illustrates uniform interpolation. It is possible to use reconstruction algorithms to obtain uniformly spaced time data. For this purpose, a Sinc(t) interpolation is possible, a polynomial interpolation (Lagrange interpolation, spline interpolation, linear interpolation) is possible, and/or fractional delay filters may be implemented.
• the diagram 850 illustrates by the circles non-uniform samples from transition times of a compare signal. The dotted line shows the true DUT waveform.
• the stars in diagram 850 show the result of a uniform interpolation using spline interpolation, for instance MATLAB interp1 (..., 'spline').
• the Fourier matrix is a product of a Vandermonde Matrix and a diagonal matrix which may simplify inversion.
• Fig. 9 shows a measurement apparatus 900 according to an exemplary embodiment of the invention.
• the measurement apparatus 900 comprises a control computer (like a workstation, a PC or a laptop) 901 which controls the entire test of the measurement apparatus.
• a test control unit 902 generates and/or receives from DUTs 903, 904 signals, including a repetitive signal 102 related to the measurement carried out by the measurement apparatus 900.
• a signal processing device 100 having the features as described in Fig. 1 is implemented.
• the test control unit 902 comprises a plurality of pins 905 which are connected to the devices under test 903, 904 (for instance memories, chips for mobile phones, etc.).
• stimulus signals are supplied to the DUTs 903, 904 so as to perform a specific test pattern, and response signals are evaluated by the test control unit 902 and by the control computer 901.

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