TWI337458B - Converting non-equidistant signals into equidistant signals - Google Patents

Converting non-equidistant signals into equidistant signals Download PDF

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Publication number
TWI337458B
TWI337458B TW096106459A TW96106459A TWI337458B TW I337458 B TWI337458 B TW I337458B TW 096106459 A TW096106459 A TW 096106459A TW 96106459 A TW96106459 A TW 96106459A TW I337458 B TWI337458 B TW I337458B
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signal
signal processing
processing device
signals
time
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TW096106459A
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Chinese (zh)
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TW200812247A (en
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Jochen Rivoir
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Verigy Pte Ltd Singapore
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2506Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
    • G01R19/2509Details concerning sampling, digitizing or waveform capturing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods
    • H03M1/1285Synchronous circular sampling, i.e. using undersampling of periodic input signals

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)

Description

九、發明說明:Nine, invention description:

【考务明戶斤屬支斗軒々員J 本發明是關於信號處理的技術。 C «tr 4¾. ]3[Course of the Ming Dynasty is a branch of the Xuan Xuan staff J This invention is about signal processing technology. C «tr 43⁄4. ]3

由相同的申請者Agilent Technologies申請的US 6,462,693 B1揭露了將一類比信號轉換為數個數位信號的 表不。該方法包含以下步驟:將該類比信號中的一振幅值 與數個參考振幅值相比較,以決定是否該類比值比一參考 值大或是小。該方法進一步包含以下步驟:對應於比較步 驟中的決定,產生一數位信號中的一邏輯位準〇evd)。該方 法貫貝上將s亥類比彳§號轉換為一時間表示,然後將該時間 表示轉換為一數位表示。該設備包含數個比較器,每一比 較器被連接以接收該類比信號,分別接收該等參考值的不 同值,及產生該數位信號。該類比德號自該數位表示被重 新建構。 由相同的申請者Agilent Technologies申請的us 6’429’799 Βι揭露了將一類比信號轉換為一數位的表示。亨 方法包含以下步驟:產生數個時變參考信號’將該類比^ 號的一振幅與該等參考信號之每一個的一振幅相比較,以 決疋疋否該類比彳έ號振幅大於、小於或等於參考信號择 幅,且每次該類比信號振幅與該等參考信號振幅相等時產 生一時戳。該設備包含一參考信號產生器和數個比較器, 該等比較器之每一個被連接以接收該類比信號,分別接收 該等參考信號的不同個,且產生一數位信號。該類比信號 可自該數位表示被重新建構。 由相同申請者Agilent Technologies申請的US 2004/0070529 A1揭露了預處理一類比信號且將該已預處理 的信號轉換為一數位表示。該方法包含以下步驟:預處理 該類比信號’產生數個參考信號,將該已預處理的信號之 一振幅與該等參考信號的一振幅相比較,以決定是否該已 預處理的信號振幅大於、小於或等於參考信號振幅,以及 在該已預處理之信號振幅和該等參考信號振幅相等時產生 一時戳。該設備包含一預處理器、一參考信號產生器和數 個比較器。該等比較器之一比較器接收來自該預處理器的 該已預處理的信號,分別接收一參考信號,且產生—數位US 6,462,693 B1, filed by the same applicant, Agilent Technologies, discloses the conversion of a class of analog signals into a plurality of digital signals. The method includes the steps of comparing an amplitude value in the analog signal with a plurality of reference amplitude values to determine whether the analog value is greater or less than a reference value. The method further includes the step of generating a logical level evd in a digital signal corresponding to the decision in the comparing step. The method converts the sig-class § § into a time representation and then converts the time representation into a one-digit representation. The device includes a plurality of comparators, each comparator being coupled to receive the analog signal, separately receiving different values of the reference values, and generating the digital signal. The class is decremented from the digit representation. Us 6' 429' 799 ι, filed by the same applicant, Agilent Technologies, discloses a representation of converting a class of analog signals into a single digit. The hen method includes the steps of: generating a plurality of time-varying reference signals 'compacting an amplitude of the analog-to-number with an amplitude of each of the reference signals to determine whether the analog apostrophe amplitude is greater than or less than Or equal to the reference signal amplitude, and each time the analog signal amplitude is equal to the amplitude of the reference signals, a time stamp is generated. The apparatus includes a reference signal generator and a plurality of comparators, each of the comparators being coupled to receive the analog signal, respectively receiving a different one of the reference signals and generating a digital signal. The analog signal can be reconstructed from the digital representation. US 2004/0070529 A1, filed by the same applicant, Agilent Technologies, discloses pre-processing an analog signal and converting the pre-processed signal into a digital representation. The method includes the steps of: preprocessing the analog signal to generate a plurality of reference signals, comparing an amplitude of the preprocessed signal with an amplitude of the reference signals to determine whether the preprocessed signal amplitude is greater than , less than or equal to the reference signal amplitude, and a time stamp generated when the preprocessed signal amplitude and the reference signal amplitudes are equal. The device includes a pre-processor, a reference signal generator, and a plurality of comparators. One of the comparators receives the preprocessed signal from the preprocessor, receives a reference signal, respectively, and generates a digital

Is號。該已預處理的信號或該類比信號可自該數位表示被 重新建構。 S· Sunter 在 2004 年於 IEEE International TestIs number. The preprocessed signal or the analog signal can be reconstructed from the digital representation. S·Sunter in IEEE International Test in 2004

Conference 第 95-104 頁 “An Automated,Complete, StructuralConference Pages 95-104 “An Automated, Complete, Structural

Test Solution for SERDES’,中揭露了已變成主要的晶片間 及板間(interboard)資料傳輸技術的十億赫序列化及還原序 列化(SERDES)的抖動職。信號完整性是決定其位元錯誤 率(典型地小於1〇七)的主要隨,因此該主要的生產測試挑 戰是測試漠秒抖動及信號開眼(signaUye 〇pening)。晶片外 抖動及上升/下降時間測量被硬體複雜性、存取、頻寬及雜 訊所限制。已公佈的晶片内測量技術被延遲線抖動所限 制。本文呈現-種新的抖制試技術,該技術已在一 上被示範以實現小於lps的RMS自我抖動,以及一種具有不 叉限制之頻寬的新的信號眼測試;二者測試都不是用高速 電路。該全數位技術使用接收器本身來解調該信號抖動至 —低速位元流,該低速位元流被一個單—時鐘領域可合成 之電路分析。這與邏輯BIST及1149.6邊界掃描相組合以完 全測試一 1C。 然而’仍存在對有效信號處理的需要。 |[考务明内j 發明概要 本發明一目的是能夠進行有效的信號處理。該目的被 申請專利範圍的獨立項解決。進一步的實施例被申請專利 範圍的依附項所顯示。 依據本發明一示範性實施例,一種用於處理一信號的 L號處理裝置被提供,該信號處理裝置包含一用於將該信 號與一參考信號相比較的比較器單元、一用於產生指示該 比較結果的數位結果信號的產生單元、一用於決定該等數 位結果信叙ϋ料間的評估單元,以及—剌於(依據例 如非等距的數位結果信號)計算實質上均勻間隔的輸出信 號的輸出信號計算單元。 依據另一示範性實施例,—種測量設備被提供’該測 里设備包含一具有上述特徵的信號處理裝置該信號處理 裝置用於處理一與被該測量設備執行之測量相關的(例如 反覆)信號。 依據另一示範性實施例,—種處理一信號的信號處理 方法被提供’該方法包含以下步驟:將該信號與一參考信 1337458 號相比較、產生指示該比較結果的數位結果信號、決定該 等數位結果信號的過渡時間,以及計算實質上均勻間隔的 輸出信號(例如依據該等數位結果信號)。 依據另一示範性實施例,一種電腦可讀媒體被提供, 5 處理一信號的一電腦程式被儲存在該電腦可讀媒體中,該 電腦程式在被一處理器執行時適用於控制或執行上述方 法。 依據又一示範性實施例,一種處理一信號的程式元件 被提供,該程式元件在被一處理器執行時適用於控制或執 10 行上述方法。 本發明之實施例可被一個或多個適合的軟體程式部分 或全部體現或支援,該一個或多個軟體程式可被儲存在任 何類型的資料載體中或可被任何類型的資料載體提供,且 其(等)可在任何適合的資料處理單元中被執行或被任何適 15 合的資料處理單元執行。軟體程式或常式可被較佳地用於 處理一信號。依據本發明一實施例的信號處理可被一電腦 程式(即軟體)或利用一個或多個特定電子最佳化電路(即硬 體)或以混合形式(即利用軟體元件與硬體元件)執行。 依據一示範性實施例,以任何信號處理方案所獲得的 20 非等距信號可被調處,從而產生實質上等距(例如在時域中) 的信號。因此,一個均勻信號重新建構方案可被提供,允 許提供某一格式的輸出信號,該格式是稍為“標準化的”(對 於該等信號之一時間序列而言)且因此對於許多後處理方 案而言是適當的。 8 1337458 依據一示範性實施例,一種具有某種週期性(以致被反 覆數次)的信號藉由低抽樣被處理。在此文中,措辭“低抽 樣”可表示一種抽樣方案,在其中一信號以一小於該信號頻 寬的二倍之抽樣率被抽樣。在已決定出在其上該抽樣需被 5 執行的數個時間點例如實質上等距的時間點之後,該反覆 信號與一比較或參考信號在這些時間點上進行比較。此比 較的結果可能是該反覆信號大於該參考信號、小於該參考 信號或等於該參考信號。因此,某種數位結果信號可被產 生以指示此比較的一結果。關於該反覆信號的資訊可在該 10 等時間點内被“編碼”,在該等時間點上此數位結果信號從 “0”過渡到“Γ,或反之。換句話說,關於該需被處理之信 號的一資訊可被包括在時間點内,在該等時間點上發生該 比較結果之邏輯值的過渡。該類比信號可自該數位表示被 重新建構。 15 執行所謂的“同調抽樣’’(coherent sampling)可能是有利 的,也就是說確保了在該信號處理裝置之個別元件(特別是 產生該參考信號及決定信號的單元)操作之間的一定義的 時間相關性。例如,藉由對此等元件提供一共同的時鐘信 號,或藉由嚴格連結或耦合此等元件的時序,例如利用鎖 20 頻或類似方式,此一同調性可被獲得。 更特別地,利用同調數位自動測試設備(ATE)通道來低 抽樣一類比信號可被執行。 對於測試電子裝置而言,特別是提供數位電子輸出信 號的積體電子電路而言,一測試或刺激信號可被饋送給待 9 1337458 測裝置(DUT)的一輸入,且來自該待測裝置的回應信號可被 一自動測試設備評估,例如藉由與期望的資料相比較。此 一自動測試設備可能已包括一特定測試功能,即該測試設 備可執行的測試功能或常式。該測試功能可以以可執行軟 5 體程式碼的形式被合併進一測試設備中。當測試信號(可能 是反覆信號)在此一電子測試裝置内被傳輸時,也可能發生 的是信號在類比與數位格式之間被轉換。為了執行此轉 換,依據一示範性實施例的低抽樣特徵可被實現。從以下 事實中可獲益,此等刺激信號及/或回應信號可具有一特定 10 週期性,即可能是反覆信號。 示範性實施例可將此一資料處理的結果變換為一“標 準”類比至數位轉換器(ADC)結果格式。例如,以該反覆信 號週期内不同時間點已低抽樣該反覆信號複數次之後,重 新排列該等資料點,以致在該反覆信號之每一新的疊代時 15 獲得在資料點之間的内插可能是有利的。然而藉由執行此 一重新排列,該等信號的等距特性可能受到影響,因此該 等輸出信號可能是非等距的。本發明之實施例可接受此等 非等距信號且後處理它們,以致得到實質上等距的輸出信 號序列,例如實質上在時間或頻率中等距。 20 特別地,本發明之實施例可在一類比至數位轉換器 (ADC)内被實現,其中一類比信號會被數位化。換句話說, 一類比波形可被轉換為一數位信號。在此文中,一反覆信 號可被低抽樣。在此文中,措辭“類比”可表示一具有一連 續位準的信號(例如一已調變的射頻信號)。措辭“數位”可特 10 1337458 別表示一具有離散位準(例如一邏輯值“1”或‘‘〇,,)的信號。 本發明之實施例的示範性應用領域是“自動測試設 僙,,,即在測試一待測裝置(DUT)中類比測試信號的數位 化。因為此一測試是可反覆的,因此低抽樣一反覆信號的 5概念可被應用。 - 措辭“同調抽樣”可被特別理解為“低抽樣,,的派生形 - 式。“低抽樣”可表示相較於在沒有反覆時所必要以獲取所 有需要的"貝汛,以一較慢的方式或以一較慢的抽樣率來執 • 行抽樣。在“同調抽樣”環境中,在抽樣時期和信號反覆時 10間之間一被定義的比率可被確保或被調整。當執行此一低 抽樣時,較佳地使用同調抽樣,需要得到的資訊被編碼進 ' 該數位比較信號的過渡時間内。該信號被分析複數次,例 如二次。對於每次疊代,新的中間測量點被獲得以連續地 精煉(refine)該測量‘數位低抽樣,,可被執行,目的是測量 15具有增加之精確性的過渡時間或時戳。對於過渡時間的此 • —同調測量而言,該反覆信號被抽樣複數次,且在信號頻 率和抽樣率之間的-分頻比可被選擇。採用此測量,中間 樣本點可被產生,從而増加了已決定的過渡時間的精確 性。藉由反覆該波形很多次,且藉由選擇一充分高的抽樣 率,精確性可特別被增加。 依據-示範性實施例,-類比至數位轉換 供,實現用於測量重新建構-類比波形之過渡時間的同調 插樣。特別地,此一ADC可在一測量裝置(如用於測試一待 測裝置(DUT)的一測試裝置)内被有利地實現。 11 一控制時鐘單元可提供一時鐘信號,該時鐘信號可被 該信號處理裝置全局使用,從而能夠進行同調時間戳記。 同調抽樣可增加在已決定的時間點上抽樣的精確性。 因此’依據一示範實施例,反覆類比信號(包括已調變 的RF信號)的低抽樣(或某種數位化)可被執行。此等信號可 特別具有在1 OOMHz至10GHz之間的一頻率範圍。例如,作 為一調變方案,振幅調變、頻率調變或面調變(face modulation)可被使用〇 此一低抽樣可被内含在自動測試設備(ATE)領域中,其 中混合的信號/RF測試被執行且在此信號可被反覆。因此, 反覆信號出現在其中的任何技術領域可以是示範性實施例 的一潛在應用領域。在很多情形中,測試準則假定從如一 習知的ADC均勻存取空間樣本,或假定存取到信號頻譜。 措辭“數位”表示獨立於時間的兩個位準。措辭“類比” 表示獨立於時間連續的位準。類比信號可包括已調變的RF L號。措辭“同調’’表示一個N/M頻率或週期比率,其中n可 以是樣本點的數目且M可以是需要抽樣之信號的反覆數 目’且其中:N和Μ互質。 依據示範性貫施例,一信號處理裝置可被提供,其 反覆類比彳έ號被評估。對於此一類比信號而言,與一 —位準或數個已知位準或任何其他波形的一比較可被執 /、匕比車乂的結果可以是一數位信號。該數位比較信號然 後可被同調抽樣,以致獲得數位樣本。接下來,精確過渡 可乂比較仏波的數位樣本被決定。利用過渡時間加上 在過渡時間上已知波形的位準,樣本 可取捨地,可議反覆㈣與==、多個靜 態位準、正弦波、其他動態波形或已預處理的信號相比較。 可能使用-數位ATE通道作為同調抽樣器。此外,抖動可 5被選擇性加到該信號以改良解析度/精韻。當檢測過渡 時’在過渡後的“第一,,信號可被決定出,在過渡前的“最後,, 信號可被決定出,在該最後一點及該第一點之間的一“中 間”時間可被決定出’或-“計數,,可在—過渡之前及過渡之 後的測量點之間的一間隔時被執行。 1〇 ㈣另—示範性實施例’―類比信號可被該信號處理 裝置處理。該類比信號可與已知位準相比較。然後,比較 信號的過渡時間可被決定出。樣本可被建構出。這些樣本 可被轉換為一個通常的“ADC”格式。在此文中,一内插可 被執行’非均勻快速傅立葉轉換_Fft)可被執行及/或 15非均勻離散傅立葉轉換(NUDFT)可被執行。在NUDFT情 形中,可能執行(已調變之)!^信號的一直接降頻轉換。也 可能藉&在NUDFT中包括Dc項執行一偏移校正 。藉由在 :UDFT中包括已知的寄生頻率,寄生遏止⑽㈣卿⑽ 可被致月b。此外’雜訊遏止可被實現。可能使用在一個單 連續的頻率範圍内同等間隔的頻率(例如在一習知的砰丁 内)。 依據一不範性實施例,使用數位ATE通道的—RF接收 $可被提供。在此文中,_(已調變的)窄頻(rf)信號可被使 用/、可與一個(或多個)靜態位準相比較。一數位ATE通道 13 1337458 可被用於同調抽樣。精確的橫跨時間可被決定出。一窄頻 譜可被重新建構(NUDFT)。藉由簡單的頻移,該結果可被 降頻轉換。 接著,本發明進一步的示範性實施例將被解釋。 5 在下文中,該信號處理裝置的進一步示範性實施例將 被解釋。然而,這些實施例也應用於測量設備、方法、程 式元件及電腦可讀媒體。 該信號處理裝置可適用於處理一反覆類比信號。此類 比信號可代表任何連續值。措辭反覆可具有以下意思,該 10 信號具有某種週期性且被反覆複數次。 此外,該信號處理裝置可適用於處理一反覆已調變的 射頻(RF)信號。特別是,此信號處理可被執行於一RF接收 機的情形中。 該信號處理裝置可適用作一類比至數位轉換器 15 (A D C ),用於將一反覆類比信號轉換為一數位信號。在此轉 換中實現該同調抽樣可允許高精確度執行該轉換。重新計 算該結果信號以致獲得等距間隔之結果信號可簡化此已轉 換之信號的後處理。 決定單元可適用於決定對於複數次反覆之每一次不同 20 的時間點。當此反覆信號的不同時期基於不同反覆進行比 較時,隨後時期的抽樣點可相對彼此位移。藉由採取這種 方式,抽樣的中間點可被獲得,以致精煉該分析。 該決定單元適用於決定對於複數次反覆之每一次不同 的時間點,以致實質上獲得均勻間隔的時間資料。藉由選 14 1337458 擇在被抽樣點和過渡數目之_ 勾的間隔_频可朗料以ϋ數值,此均 的一有效方法也入。 ⑽的每-反覆獲得中間點Test Solution for SERDES' reveals the jitter of the 1 billion Hz serialization and reduction sequence (SERDES) that has become the main inter-wafer and interboard data transmission technology. Signal integrity is the primary factor in determining its bit error rate (typically less than 1〇7), so the main production test challenge is to test the jitter jitter and signal open eye (signaUye 〇pening). Out-of-chip jitter and rise/fall time measurements are limited by hardware complexity, access, bandwidth, and noise. Published in-wafer measurement techniques are limited by delay line jitter. This paper presents a new dithering technique that has been demonstrated to achieve RMS self-jittering less than lps and a new signal eye test with unbalanced bandwidth; neither test is used High speed circuit. The all-digital technique uses the receiver itself to demodulate the signal jitter to a low-speed bit stream that is analyzed by a single-clock domain synthesizable circuit. This is combined with the logical BIST and 1149.6 boundary scans to fully test a 1C. However, there is still a need for efficient signal processing. |[考务明内j SUMMARY OF THE INVENTION One object of the present invention is to enable efficient signal processing. This purpose is solved by a separate item of the patent application scope. Further embodiments are shown in the dependent claims of the scope of the patent application. In accordance with an exemplary embodiment of the present invention, an L-number processing device for processing a signal is provided, the signal processing device including a comparator unit for comparing the signal with a reference signal, and a a unit for generating a digital result signal of the comparison result, an evaluation unit for determining the correspondence between the digital result representations, and - for calculating a substantially evenly spaced output (based on, for example, a non-equidistant digital result signal) The output signal calculation unit of the signal. According to another exemplary embodiment, a measuring device is provided 'the metering device comprises a signal processing device having the above features, the signal processing device for processing a measurement related to the measurement performed by the measuring device (eg, repeating )signal. According to another exemplary embodiment, a signal processing method for processing a signal is provided. The method includes the steps of: comparing the signal with a reference signal 1337458, generating a digital result signal indicating the comparison result, and determining the The transition time of the equal-numbered result signals, and the calculation of substantially evenly spaced output signals (eg, based on the digital result signals). According to another exemplary embodiment, a computer readable medium is provided, 5 a computer program for processing a signal stored in the computer readable medium, the computer program being adapted to control or execute the above when executed by a processor method. In accordance with yet another exemplary embodiment, a program element for processing a signal is provided that, when executed by a processor, is adapted to control or perform the above method. Embodiments of the invention may be embodied or supported in part or in whole by one or more suitable software programs, which may be stored in any type of data carrier or may be provided by any type of data carrier, and It may or may be executed in any suitable data processing unit or by any suitable data processing unit. A software program or routine can be preferably used to process a signal. Signal processing in accordance with an embodiment of the present invention may be performed by a computer program (ie, software) or by one or more specific electronic optimization circuits (ie, hardware) or in a hybrid form (ie, using software components and hardware components) . In accordance with an exemplary embodiment, the 20 non-equidistant signals obtained in any signal processing scheme can be tuned to produce signals that are substantially equidistant (e.g., in the time domain). Thus, a uniform signal reconstruction scheme can be provided that allows for the provision of an output signal of a certain format that is slightly "normalized" (for a time series of one of the signals) and thus for many post-processing schemes It is appropriate. 8 1337458 According to an exemplary embodiment, a signal having a certain periodicity (so that it is repeated several times) is processed by low sampling. In this context, the phrase "low sampling" may refer to a sampling scheme in which a signal is sampled at a sampling rate less than twice the bandwidth of the signal. The repetitive signal is compared to a comparison or reference signal at these points in time after it has been determined at a number of time points on which the sample is to be performed by 5, for example substantially equidistant. The result of this comparison may be that the repetitive signal is greater than the reference signal, less than the reference signal, or equal to the reference signal. Therefore, a certain digital result signal can be generated to indicate a result of this comparison. Information about the repeated signal may be "encoded" at the 10th time point at which the digital result signal transitions from "0" to "Γ, or vice versa. In other words, regarding the need to be processed A message of the signal can be included at a point in time at which a transition of the logical value of the comparison occurs. The analog signal can be reconstructed from the digit representation. 15 Performing a so-called "coherent sampling" Coherent sampling may be advantageous, that is to say a defined time dependency between the operation of the individual components of the signal processing device, in particular the unit generating the reference signal and the decision signal. This homology can be obtained, for example, by providing a common clock signal to such elements, or by strictly joining or coupling the timing of such elements, e.g., using a lock 20 or the like. More specifically, a low-sampling analog signal can be performed using a homophone automatic test equipment (ATE) channel. For test electronics, particularly integrated electronic circuits that provide digital electronic output signals, a test or stimulus signal can be fed to an input to be tested by the DUT and from the device under test. The response signal can be evaluated by an automated test device, for example by comparison with the desired data. This automated test equipment may already include a specific test function, which is the test function or routine that the test equipment can perform. This test function can be incorporated into a test device in the form of an executable software code. When a test signal (possibly a repetitive signal) is transmitted within this electronic test set, it may also happen that the signal is converted between analog and digital formats. In order to perform this conversion, a low sampling feature in accordance with an exemplary embodiment can be implemented. It may be beneficial from the fact that such stimulation signals and/or response signals may have a specific 10 periodicity, i.e., may be a repetitive signal. The exemplary embodiment can transform the results of this data processing into a "standard" analog to digital converter (ADC) result format. For example, after the repeated signals are low-sampled at different time points in the repeated signal period, the data points are rearranged so that each new iteration 15 of the repeated signal is obtained between the data points. Inserting may be advantageous. However, by performing this rearrangement, the equidistant characteristics of the signals may be affected, so the output signals may be non-equidistant. Embodiments of the present invention can accept such non-equidistant signals and post-process them such that substantially equidistant output signal sequences are obtained, such as substantially at equal intervals in time or frequency. In particular, embodiments of the invention may be implemented in a analog to digital converter (ADC) where an analog signal is digitized. In other words, an analog waveform can be converted to a digital signal. In this context, a repeated signal can be sampled low. In this context, the phrase "analog" may refer to a signal having a continuous level (e.g., a modulated radio frequency signal). The word "digit" can be used to indicate a signal having a discrete level (e.g., a logical value of "1" or ‘‘〇,,). An exemplary field of application of embodiments of the present invention is "automatic test setup, ie, digitization of analog test signals in testing a device under test (DUT). Because this test is reversible, low sampling one The concept of a repetitive signal can be applied. - The wording "coherent sampling" can be specifically understood as "low sampling, the derivative form". "Low sampling" can mean that sampling is performed in a slower manner or at a slower sampling rate than is necessary to obtain all the necessary conditions when there is no repetition. In the "coherent sampling" environment, a defined ratio between the sampling period and the signal repetition can be ensured or adjusted. When performing this low sampling, it is preferred to use coherent sampling, and the information to be obtained is encoded into the transition time of the digital comparison signal. This signal is analyzed multiple times, for example twice. For each iteration, a new intermediate measurement point is obtained to continuously refine the measurement 'digital low sample, which can be performed, with the goal of measuring 15 transition time or time stamp with increased accuracy. For the coherent measurement of the transition time, the repetitive signal is sampled a plurality of times, and the -divide ratio between the signal frequency and the sampling rate can be selected. With this measurement, intermediate sample points can be generated, which increases the accuracy of the determined transition time. By repeating the waveform many times, and by selecting a sufficiently high sampling rate, the accuracy can be particularly increased. According to an exemplary embodiment, an analog-to-digital conversion is provided to implement a coherent interpolation for measuring the transition time of the reconstructed-analog waveform. In particular, such an ADC can be advantageously implemented in a measuring device such as a test device for testing a device under test (DUT). A control clock unit can provide a clock signal that can be used globally by the signal processing device to enable coherent time stamping. Coherent sampling increases the accuracy of sampling at a determined point in time. Thus, according to an exemplary embodiment, low sampling (or some digitization) of the inverse analog signal (including the modulated RF signal) can be performed. These signals may in particular have a frequency range between 1 00 MHz and 10 GHz. For example, as a modulation scheme, amplitude modulation, frequency modulation, or face modulation can be used. This low sampling can be included in the field of automatic test equipment (ATE), where mixed signals / The RF test is performed and the signal can be repeated here. Therefore, any technical field in which a repetitive signal appears may be a potential field of application of the exemplary embodiment. In many cases, the test criteria assume uniform access to spatial samples from a conventional ADC, or assume access to the signal spectrum. The wording "digit" means two levels that are independent of time. The wording "analog" means a level that is independent of time. The analog signal can include the modulated RF L number. The phrase "coherent" means an N/M frequency or period ratio, where n can be the number of sample points and M can be the inverse number of signals that need to be sampled' and where: N and Μ are mutually prime. According to an exemplary embodiment A signal processing device can be provided, which is evaluated by a repeated analog nickname. For this analog signal, a comparison with one-level or several known levels or any other waveform can be performed. The result of the 乂 乂 can be a digital signal. The digital comparison signal can then be sampled by homology to obtain a digital sample. Next, the precise transition can be determined by comparing the digital samples of the chopping. The level of the known waveform in time, the sample can be selected, can be repeated (four) and ==, multiple static levels, sine waves, other dynamic waveforms or pre-processed signals. May use the -digit ATE channel as Coherent sampler. In addition, jitter 5 can be selectively added to the signal to improve resolution/fine rhyme. When detecting transitions, 'before the transition', the signal can be determined before the transition. "Finally, the signal can be determined, and an "intermediate" time between the last point and the first point can be determined as a 'or-' count, which can be measured before and after the transition. An interval between them is executed. 1 (4) Another - Exemplary Embodiment '- Analog signal can be processed by the signal processing device. The analog signal can be compared to known levels. Then, the transition time of the comparison signal can be determined. Samples can be constructed. These samples can be converted to a common "ADC" format. In this context, an interpolation can be performed 'non-uniform fast Fourier transform _Fft' can be performed and/or 15 non-uniform discrete Fourier transform (NUDFT) can be performed. In the NUDFT scenario, a direct down-conversion of the (modulated)!^ signal may be performed. It is also possible to perform an offset correction by including the Dc item in the NUDFT. By including a known parasitic frequency in the :UDFT, parasitic suppression (10) (4) Qing (10) can be caused by the month b. In addition, 'noise suppression can be achieved. It is possible to use equally spaced frequencies in a single continuous frequency range (e.g., within a conventional cartridge). According to an exemplary embodiment, the RF reception $ using the digital ATE channel can be provided. In this context, the _ (modulated) narrowband (rf) signal can be used with / and can be compared to one (or more) static levels. A digital ATE channel 13 1337458 can be used for coherent sampling. The exact span time can be determined. A narrow spectrum can be reconstructed (NUDFT). This result can be downconverted by a simple frequency shift. Next, further exemplary embodiments of the present invention will be explained. 5 In the following, a further exemplary embodiment of the signal processing device will be explained. However, these embodiments are also applicable to measurement devices, methods, program components, and computer readable media. The signal processing device can be adapted to process a repeated analog signal. Such a ratio signal can represent any continuous value. The wording can have the following meaning repeatedly, the 10 signal has some periodicity and is repeated multiple times. Additionally, the signal processing device can be adapted to process a repetitive modulated radio frequency (RF) signal. In particular, this signal processing can be performed in the case of an RF receiver. The signal processing device can be adapted to be an analog to digital converter 15 (A D C ) for converting a reverse analog signal into a digital signal. Implementing this coherent sampling in this conversion allows the conversion to be performed with high precision. Recalculating the resulting signal so that the resulting signal at equidistant intervals simplifies the post processing of the converted signal. The decision unit can be adapted to determine the point in time for each of the multiple repetitions of 20. When the different periods of the repetitive signal are compared based on different iterations, the sampling points of the subsequent period may be displaced relative to each other. By taking this approach, the intermediate points of the sample can be obtained, so that the analysis is refined. The decision unit is adapted to determine each of the different time points for the plurality of iterations such that substantially evenly spaced time data is obtained. By selecting 14 1337458, the interval between the sampled point and the number of transitions is set to ϋ, and an effective method of this is also entered. (10) every time - repeatedly get the middle point

…以是由一個在時間中不變的單-信號、每 變化的Γ =的複數個信號、依據—預定波形在時間中 :的…以及-正弦信號組成的群組中的一個。铁 :任何牛其他波形是可能的,例如任何三角函數、-鑛齒 函數、一步進函數等等。 10 15... is one of a group consisting of a single-signal that is constant over time, a complex number of signals per change Γ =, a basis - a predetermined waveform in time: ... and a sinusoidal signal. Iron: Any other waveform of the cow is possible, such as any trigonometric function, - mineral tooth function, a step function, and so on. 10 15

20 、用於考録與複數個反覆之^同個相關 上的信號,決定過渡時間。因此,不同的反覆樣 本㈣可被組合以增加精確度,特顧以獲得在兩個資料 ’.··占之間的巾間#號。這可精煉資料格式轉換。 時間點的數目可大於反覆的數目。在時間點數目和反 覆數目之間的比率可以是—非餘值。後者方式可確保額 外的反覆提供關於該信號的額外資訊。 有利地,該信號處理裝置可包含一排列單元,該排列 單元適用於依據在反覆信號週期内相對應之時間點的一年 代表(chronology) ’將與不同反覆相關的數位結果信號排 列°藉由在低抽樣之後重新排列或重新排序該等信號,在 數位結果信號過渡的情形中的數個點可被精煉(refine)。 產生單元可適用於產生一具有一第一邏輯值(例如“1”) 的數位結果信號(在此情形中各別的反覆信號大於參考信 號)’且適用於產生一具有一第二邏輯值(例如“〇”)的數位結 果信號(在此情形中各別的反覆信號小於該參考信號)。因 15 1337458 此,該過渡時間可被計算為一時間點,在該時間點上從該 第一邏輯值過渡到該第二邏輯值。出於此目的,該評估單 元可根據一序列中對最後時間點的分析來決定該等過渡時 間,在該序列中該數位結果信號具有第一邏輯值。另外, 5 一第一時間點可被決定為一序列中的過渡時間,在該序列 中該數位結果信號具有該第二邏輯值。也可能計算在該第 一邏輯值之此最後的時間點和該第二邏輯值之第一時間點 之間的一平均時間。 另外,藉由執行一過渡間隔的一統計分析,可能進一 10 步精煉評估該過渡時間的精確度。例如,由於例如抖動、 雜訊或其他信號失真的影響,可能發生在一過渡時間周圍 出現該第一邏輯值和該第二邏輯值之一交互值序列。在此 情景中,統計分析此區域中的資料點且計算一(最)可能的過 渡時間是更合理的。這可包括内插、統計平均,使一數學 15 概率函數擬合已決定的數位值(某種溫度計程式碼),例如一 累積的概率密度函數等等。 該評估單元可適用於依據一操作模式(其根據信號抖 動或信號雜訊的存在程度被選擇出)決定該等過渡時間。當 信號抖動/雜訊較大時,相對可能的是出現信號失真且過渡 20 間隔包含一些失真的測量點。當信號抖動較小時,數字上 較容易的解決方法是較佳的,即使用該第一邏輯值的最後 時間點或該第二邏輯值的第一時間點或其等的平均值為一 實際的過渡時間。 該信號處理裝置可包含一輸出信號計算單元,該輸出 16 1337458 信號計算單元適用於計算實質上均勻間隔的輸出信號。藉 由該重新排序,等距可被實現。然而,對於該等信號的後 處理這可能是想要的,該等信號被實質上均勻地間隔,特 別是在時間内均勻地間隔或在頻率内被均勻地間隔。 5 為了獲得此一均勻間隔的信號,該輸出信號計算單元 可適用於藉由使用一辛克(Sine)内插(即由該引數正弦與該 引數之比率形成的一數學函數,其中該引數可以是時間)、 一多項式内插(例如一拉格朗日(Lagrange)内插、一樣條内 插或一線性内插)來決定實質上均勻間隔的輸出信號。也可 10 能實現一小數延遲濾波器。 該輸出信號計算單元可適用於藉由執行由一快速傅立 葉轉換(FFT)、一非均勻快速傅立葉轉換(NUFFT)、一具有 快速多極方法(FMM)之非均勻快速傅立葉轉換(NUFFT)以 及一非均勻離散傅立葉轉換(NUDFT)組成的群組中的至少 15 一個來計算該輸出信號。特別地,該信號處理裝置可適用 於利用同調抽樣處理反覆信號。同調抽樣表示抽樣的時間 特性是良好建立的。 藉由實現一時鐘產生單元,同調抽樣可被致能,該時 鐘產生單元適用於對該信號處理裝置的複數個元件產生一 20 共同的時鐘信號。例如,此一時鐘產生單元可提供一共同 的時鐘信號給一待測裝置、一用於產生該參考信號的參考 信號產生器以及一用於評估或處理該比較信號的單元。因 此,該時鐘產生單元可對該信號處理裝置的一部分或全部 元件產生一共同的時鐘信號。 17 1337458 另外,複數個時鐘產生單元可被提供,每一個適用於 對該信號處理裝置之一被指定的元件產生一個別的時鐘信 號,其中該等時鐘產生單元可以是鎖頻的。例如,三個具 有相同輸出頻率的鎖頻產生器可被提供以對該待測裝置、 5 一參考信號產生器及一用於評估該比較信號的單元產生個 別的時鐘信號。 另外,三個具有充分精確度以確保想要的輸出頻率的 獨立時鐘產生器可被實現。 該信號處理裝置進一步包含一抖動增加單元,該抖動 10 增加單元適用於選擇性增加枓動到該反覆信號及/或該比 較信號及/或該同調抽樣時鐘。藉由採取此種方式,該信號 可以一種已定義的方式被抹去(smeared out)以增加該信號 轉換的精確度。 該信號處理裝置可包含一對DUT提供一環境的自動測 15 試設備單元(ATE),從而該DUT是一用於提供該反覆信號的 來源,例如一Agilent 93000測試設備。因此,該信號處理 裝置可特別被實現為一用於測試一待測裝置(例如一行動 電話的一晶片)之ATE的一 ADC。此一自動測試設備可對 DUT提供一環境從而該DUT是一用於提供該反覆信號的來 20 源,且可被實現用於測試一待測裝置。 在下文中,測量設備的進一步示範性實施例將被解 釋。然而,這些實施例也應用於該信號處理裝置、該方法、 該程式元件和該電腦可讀媒體。 該測量設備的一信號產生單元可適用於產生一刺激信 18 1337458 號(作為該反覆信號或-反覆信號的一基本),該刺激信號被 施加到一待測裝置以測試該待測裝置。也可能該基於 該測量設備的一(反覆或非反覆)刺激信號產生一反覆信 號。此一刺激信號可以是被施加到一 DUT(例如一被測晶片) 5之接腳的任何信號圖形,且一回應信號可在該DUT的其他 接腳上被檢測到。藉由將此等回應信號與期望信號相比 較,可決疋疋否该待測裝置是可接受的或需被拒絕。當應 用測試序列到此一待測裝置時,該等信號通常被反覆複數 次。因此,依據一示範性實施例的一信號處理裝置可在此 10 一測量設備中被有利地實現,特別是在被用於此一測量設 備的一ADC情形中。 該測量設備可進一步適用於從一待測裝置接收一回應 k號(作為該反覆信號),回應於將一刺激信號施加到該待測 裝置以測試該待測裝置。在此一情景中,該待測裝置可產 15生反覆信號,該反覆信號然後可被該測量設備的一信號處 理器評估。 較特別地,該測量設備可包含由一類比至數位轉換器 (ADC)、一感測器裝置(例如用於感測一dut的一參數)、一 用於測試一待測裝置或一物的測試裝置(例如Agilem 93〇⑽ 20系列的一設備)、一用於化學、生物學及/或藥學分析的裝 置、一適用於分離流體混合物的流體分離系統、一毛細管 電泳裝置、一液體層析裝置、一氣體層析裝置、_電子測 量裝置以及一質譜裝置組成的群組中的至少一個。更—般 地,實施例可被用於電子和測量應用的很多領域中,例如 19 在生命科學體制中,或可被用於類比或數位電子學的任何 7貝域中,在該等領域中精確的信號轉換或信號處理是一間 題’特別是當一反覆信號被使用時。 圖式簡單說明 藉由結合附圖參考以下詳細描述,本發明之實施例的 其他目的和很多附加優點容易明白且變得較好理解。實質 上或功能上等同或類似的特徵由相同的參考符號表示。 第1圖顯不依據本發明一示範性實施例的一信號處理 裝置。 第2圖顯示在同調時間戳記情形中的圖式。 第3圖舉例說明依據一示範性實施例的一信號處理裝 置。 第4圖顯示舉例說明在有抖動時一信號處理裝置之功 能的圖式。 第5圖顯示舉例說明在有抖動時一資料處理裝置之一 操作模式的圖式。 第6圖顯示依據-示範性實施例,在一信號處理裝置用 於類比波形重新建構的一操作期間的圖式。 第7圖舉例s兒明依據本發明一示範性實施例的一資料 處理裝置。 、 第8圖舉例說明依據一示範性實施例一信號處理裝置 情形中的均勻内插。 第9圖顯示依據一示範性實施例的一測量設備。 圖式中的舉例說明是示意性的。 ⑴7458 【實施今式】 較佳實施例之詳細說明 在下文中’參考第1圖’依據本發明一示範性實施例的 一信號處理裝置100將被解釋。 5 一反覆信號源101適用於產生一週期反覆信號102。該 反覆信號102是一數次反覆的週期信號。此反覆信號102被 用於研究一待測裝置的情形中。該反覆信號102被提供給— 決定單元103的一輸入。該決定單元103適用於決定數個用 於低抽樣該反覆信號102的時間點。在其等上該反覆信號 10 10 2被抽樣的這些時間點可以一控制信號10 4的形式被提供 給正反器】3〇,該正反器130位於一比較器單元1 〇5的一輸 出處’在該比較器單元105之輸出處一比較器信號120可被 提供以指示比較的一結果。該反覆信號102被提供給該比較 器單元105的一第一信號輸入。一由一參考信號產生器單元 15 107產生的參考信號106被提供給該比較器單元105的一第 一k號輸入。如第1圖中可得的,一時鐘產生單元1〇8產生 時鐘信號109a、l〇9b,該等時鐘信號109a、109b被各別提 供給該反覆信號源10】和該參考信號產生器107。在此情形 中,可確保的是該反覆信號源101和該參考信號產生器107 20 被同步以致致能同調抽樣。 該比較器單元105適用於將該反覆信號1〇2與該參考信 號106進行比較。此比較的結果在被耦接到該正反器130之 一輸入的該比較器單元105之一輸出處被提供。在該比較器 單元105之輸出處被提供的該比較信號120被提供給該正反 21 1337458 器130 ’且考慮指示數個特定比較時間的該控制信號1 , 該正反器130產生-數位結果信號丨1〇。該數位結果信號㈣ 被提供給-重新排列單元lu,該重新排列單元lu適用於 依據在該反覆賤K) 2之·内由該時間控制信號1 〇 4定義 5之相對應之時間點的年代表,而將與該反覆信號⑽之不同 • 反覆相關的該等數位結果信號Η 〇重新排列(見第2圖所 不)。在已將該信號110的成分重新排序之後,其被提供給 φ 一評估單元112,用於決定該數位結果信號1〗0的過渡時 間。該等過渡時間被假定為包括得自該系統之信號處理 10 的資訊。 該評估單元112根據該等已排列的信號丨13評估過渡時 間信號114 ’該等過渡時間信號114被提供給一輸出信號產 生單兀115。該輸出信號計算單元115計算輸出信號116,該 等輸出信號116實質上在時間内被均勻間隔且被提供在該 - 15信號處理裝置100的一輸出處。 % 該反覆信號】02是一反覆類比信號,更特別的是一反覆 的已調變的射頻信號。該信號處理裝置1〇〇適用於類比至數 位信號轉換,以致提供一指示該信號丨〇2之類比波形的數位 信號116。 20 如下文參考第2圖詳細解釋的,該決定單元1〇3對該信 號102之複數次反覆之每一次決定不同的時間點,辛該等時 間點上比較被該比較器單元1〇5執行。因此,由該^皐元 1 〇 3產生的信號實質上在時間中被均勻間隔開。該參考信號 106在第1圖的實施例中是一固定信號(c〇nstam。在 22 1337458 該反覆《大於或等於該參考信㈣㈣㈣下(在一特定 的時間點上),該數位結果信號110具有-邏輯們”。在該 反覆信號小於該參考信號106的另一情形下,該數位結奸 號110的邏輯值為。 5 該輸出信號計算單元115可執行-内插,以致得到實質 上在時間内被均勾間隔的輸出信號u 6。出於此目的,複數 個信號轉換運算法可被該輸出信號產生單元115應用。 該時鐘產生單元108對該反覆信號源1〇1產生一第—時 鐘信號109a’對該參考信號產生器1〇7產生一第二時鐘信號 10 109b。作為提供兩個個別的時鐘信號109a、10%的另—選 擇,也可能該時鐘產生單元1〇8對該反覆信號源1〇1和該參 考信號產生器107產生一共同的時鐘信號。 因此,第1圖的實施例致能用於類比波形重新建構之過 渡時間.的一測量。根據第2圖所示之圖式2〇〇和25〇,這將被 15 進一步闡明。 沿著圖式200的一橫座標201,時間被描繪。沿著該圖 式200的一縱座標2〇2,一信號值被描繪。一第一圖形顯示 該反覆類比信號102。一第二圖形顯示該固定參考信號 106。類似步進函數之比較信號丨2〇的時間點2〇3在第2圖中 20 被進一步顯示。 沿著該圖式250的一橫座標210,一被修改的時間轴 210(時間模數】/m=i/3)被顯示。沿著該圖式250的一縱座標 211 ’ 一信號值被描繪。已重新排列的資料點2〇3也被顯示 在圖式250中。此外,比較信號120被顯示。除此之外,過 23 渡時間251可被得自第2圖的圖式250中。 依據第2圖的術語,r=〇.7是該參考信號1 〇6的值,n=32 是資料點203的數目。M=3是反覆信號102的反覆次數。因 此,依據第2圖,該需被抽樣的信號1〇2具有一類似正弦的 形狀,不過可具有任何可選擇的形狀,特別是週期形狀。 有利地,N和Μ互質或互素。20, used to test and a number of repeated signals on the same correlation, determine the transition time. Therefore, different repetitive samples (4) can be combined to increase the accuracy, and special attention is obtained to obtain the ## between the two materials '. This refines the data format conversion. The number of time points can be greater than the number of times. The ratio between the number of time points and the number of times of the reverse may be - non-residual value. The latter approach ensures that additional feedback provides additional information about the signal. Advantageously, the signal processing means may comprise an arranging unit adapted to align the digital result signals associated with the different replies by means of a one-year chronology at a corresponding point in time in the repetitive signal period. After rearranging or reordering the signals after low sampling, several points in the case of a digital result signal transition can be refined. The generating unit may be adapted to generate a digital result signal having a first logical value (eg, "1") (in this case, each of the repeated signals is greater than the reference signal) and is adapted to generate a second logical value ( For example, "〇") the digital result signal (in this case the respective repeated signals are smaller than the reference signal). As a result of 15 1337458, the transition time can be calculated as a point in time at which the transition from the first logical value to the second logical value occurs. For this purpose, the evaluation unit can determine the transition time based on an analysis of the last time point in a sequence in which the digital result signal has a first logical value. Additionally, a first time point may be determined as a transition time in a sequence in which the digital result signal has the second logic value. It is also possible to calculate an average time between the last time point of the first logical value and the first time point of the second logical value. In addition, by performing a statistical analysis of the transition interval, it is possible to refine the accuracy of the transition time in a further step. For example, due to effects such as jitter, noise, or other signal distortion, it may occur that a sequence of interaction values of the first logical value and the second logical value occurs around a transition time. In this scenario, it is more reasonable to statistically analyze the data points in this area and calculate a (most) possible transition time. This can include interpolation, statistical averaging, fitting a mathematical 15 probability function to a determined digit value (some thermometer code), such as a cumulative probability density function, and so on. The evaluation unit can be adapted to determine the transition times in accordance with an operational mode that is selected based on the degree of signal jitter or the presence of signal noise. When signal jitter/noise is large, it is relatively possible that signal distortion occurs and the transition 20 interval contains some distorted measurement points. When the signal jitter is small, a numerically easier solution is preferred, that is, using the last time point of the first logic value or the first time point of the second logic value or an average thereof is an actual Transition time. The signal processing device can include an output signal calculation unit, the output 16 1337458 signal calculation unit being adapted to calculate substantially evenly spaced output signals. By this reordering, equidistance can be achieved. However, it may be desirable for post processing of the signals that are substantially evenly spaced, particularly evenly spaced over time or evenly spaced within frequency. 5 in order to obtain such a uniformly spaced signal, the output signal calculation unit may be adapted to use a mathematical function formed by using a Sine interpolation (ie, a ratio of the sine of the argument to the argument, wherein The argument can be time), a polynomial interpolation (such as a Lagrange interpolation, the same strip interpolation, or a linear interpolation) to determine the substantially evenly spaced output signal. It is also possible to implement a fractional delay filter. The output signal calculation unit is applicable to perform non-uniform fast Fourier transform (NUFFT) with a fast multi-pole transform (FFT), a non-uniform fast Fourier transform (NUFFT), and a fast multi-pole method (FMM), and a At least 15 of the groups consisting of non-uniform discrete Fourier transforms (NUDFT) are used to calculate the output signal. In particular, the signal processing device can be adapted to process the repetitive signal using coherent sampling. Coherent sampling indicates that the time characteristics of the sampling are well established. Coherent sampling can be enabled by implementing a clock generating unit adapted to generate a 20 common clock signal for a plurality of elements of the signal processing device. For example, the clock generating unit can provide a common clock signal to a device under test, a reference signal generator for generating the reference signal, and a unit for evaluating or processing the comparison signal. Therefore, the clock generating unit can generate a common clock signal to some or all of the components of the signal processing device. 17 1337458 Additionally, a plurality of clock generating units can be provided, each adapted to generate an additional clock signal to the designated component of one of the signal processing devices, wherein the clock generating units can be frequency locked. For example, three lock frequency generators having the same output frequency can be provided to generate a separate clock signal for the device under test, a reference signal generator, and a unit for evaluating the comparison signal. In addition, three independent clock generators with sufficient accuracy to ensure the desired output frequency can be implemented. The signal processing device further includes a jitter increasing unit adapted to selectively increase the sway to the repetitive signal and/or the comparison signal and/or the coherent sampling clock. By doing this, the signal can be smeared out in a defined manner to increase the accuracy of the signal conversion. The signal processing device can include a pair of DUTs providing an environment for an automated test equipment unit (ATE) such that the DUT is a source for providing the repetitive signal, such as an Agilent 93000 test device. Thus, the signal processing device can be implemented in particular as an ADC for testing the ATE of a device under test (e.g., a wafer of a mobile phone). The automatic test equipment can provide an environment to the DUT such that the DUT is a source for providing the repetitive signal and can be implemented for testing a device under test. In the following, further exemplary embodiments of the measuring device will be explained. However, these embodiments are also applicable to the signal processing apparatus, the method, the program element, and the computer readable medium. A signal generating unit of the measuring device is adapted to generate an stimulating signal 18 1337458 (as a basis for the repetitive signal or the repetitive signal), the stimuli signal being applied to a device under test to test the device under test. It is also possible to generate a repetitive signal based on a (repetitive or non-repetitive) stimulation signal of the measuring device. The stimulus signal can be any signal pattern applied to the pins of a DUT (e.g., a wafer under test) 5, and a response signal can be detected on the other pins of the DUT. By comparing these response signals with the desired signals, it can be determined whether the device under test is acceptable or needs to be rejected. When the test sequence is applied to the device under test, the signals are usually repeated several times. Thus, a signal processing device in accordance with an exemplary embodiment can be advantageously implemented in such a measurement device, particularly in the case of an ADC used in such a measurement device. The measuring device can be further adapted to receive a response k number (as the repetitive signal) from a device under test in response to applying a stimulus signal to the device under test to test the device under test. In this scenario, the device under test can generate a repeat signal that can then be evaluated by a signal processor of the measuring device. More particularly, the measuring device can include an analog to digital converter (ADC), a sensor device (eg, a parameter for sensing a dut), a test device or device for testing Test device (such as a device of the Agilem 93(10) 20 series), a device for chemical, biological and/or pharmaceutical analysis, a fluid separation system suitable for separating a fluid mixture, a capillary electrophoresis device, a liquid chromatography At least one of a group consisting of a device, a gas chromatography device, an electronic measuring device, and a mass spectrometer. More generally, embodiments can be used in many fields of electronics and measurement applications, such as 19 in a life sciences system, or in any 7-bay domain that can be used for analog or digital electronics, in such fields. Accurate signal conversion or signal processing is a question 'especially when a repeated signal is used. BRIEF DESCRIPTION OF THE DRAWINGS Other objects and many additional advantages of the embodiments of the present invention will be apparent from the description and appended claims Features that are substantially or functionally equivalent or similar are denoted by the same reference symbols. Fig. 1 shows a signal processing apparatus in accordance with an exemplary embodiment of the present invention. Figure 2 shows the schema in the case of a coherent time stamp. Figure 3 illustrates a signal processing apparatus in accordance with an exemplary embodiment. Figure 4 shows a diagram illustrating the function of a signal processing device when there is jitter. Figure 5 shows a diagram illustrating an operational mode of a data processing device when there is jitter. Figure 6 shows a diagram during an operation of a signal processing device for reconstructing an analog waveform in accordance with an exemplary embodiment. Fig. 7 is a view showing a data processing apparatus according to an exemplary embodiment of the present invention. Figure 8 illustrates a uniform interpolation in the case of a signal processing device in accordance with an exemplary embodiment. Figure 9 shows a measuring device in accordance with an exemplary embodiment. The illustrations in the drawings are schematic. (1) 7458 [Embodiment of the present invention] A detailed description of the preferred embodiment will be explained hereinafter with reference to Fig. 1 a signal processing apparatus 100 according to an exemplary embodiment of the present invention. 5 A repetitive signal source 101 is adapted to generate a periodic repetitive signal 102. The inverted signal 102 is a periodic signal that is repeated several times. This repetitive signal 102 is used in the case of studying a device under test. The repeated signal 102 is provided to an input of the decision unit 103. The decision unit 103 is adapted to determine a number of time points for the low sampling of the repeated signal 102. The time points at which the repetitive signal 10 10 2 is sampled may be supplied to the flip-flop [3] in the form of a control signal 104, the flip-flop 130 being located at an output of a comparator unit 1 〇5. A comparator signal 120 can be provided at the output of the comparator unit 105 to indicate a result of the comparison. The inverted signal 102 is provided to a first signal input of the comparator unit 105. A reference signal 106 generated by a reference signal generator unit 15 107 is supplied to a first k-number input of the comparator unit 105. As can be seen in FIG. 1, a clock generating unit 1A8 generates clock signals 109a, 10b, which are separately supplied to the inverted signal source 10 and the reference signal generator 107. . In this case, it can be ensured that the repetitive signal source 101 and the reference signal generator 107 20 are synchronized to enable coherent sampling. The comparator unit 105 is adapted to compare the repeated signal 1〇2 with the reference signal 106. The result of this comparison is provided at the output of one of the comparator units 105 coupled to one of the inputs of the flip-flop 130. The comparison signal 120 provided at the output of the comparator unit 105 is provided to the positive and negative 21 1337 458 finder 130' and takes into account the control signal 1 indicating a number of specific comparison times, the flip flop 130 producing a digital result The signal is 丨1〇. The digital result signal (4) is supplied to the rearrangement unit lu, and the rearrangement unit lu is adapted to be used according to the time point corresponding to the time point defined by the time control signal 1 〇4 within the inverse 贱K) 2 Representative, and the digital result signals that are inversely related to the repeated signal (10) are rearranged (see Figure 2). After the components of the signal 110 have been reordered, they are provided to φ an evaluation unit 112 for determining the transition time of the digital result signal 1 "0". These transition times are assumed to include information from signal processing 10 of the system. The evaluation unit 112 evaluates the transition time signal 114' based on the aligned signals 丨13. The transition time signals 114 are provided to an output signal generating unit 115. The output signal calculation unit 115 calculates an output signal 116 that is substantially evenly spaced over time and is provided at an output of the signal processing device 100. % The repeated signal] 02 is a repeated analog signal, and more particularly a repeated modulated RF signal. The signal processing device 1 is adapted for analog to digital signal conversion such that a digital signal 116 indicative of the analog waveform of the signal 丨〇2 is provided. 20 As explained in detail below with reference to FIG. 2, the decision unit 1-3 determines a different time point for each of the plurality of repetitions of the signal 102, and the comparison is performed by the comparator unit 〇5 at the time points. . Therefore, the signals generated by the cells 1 〇 3 are substantially evenly spaced apart in time. The reference signal 106 is a fixed signal (c〇nstam) in the embodiment of Fig. 1. At 22 1337458, the repeated "greater than or equal to the reference signal (4) (four) (four) (at a particular point in time), the digital result signal 110 In another case where the repeated signal is less than the reference signal 106, the logical value of the digital signature number 110. 5 The output signal calculation unit 115 can perform - interpolation so that substantially The output signal u 6 is evenly spaced in time. For this purpose, a plurality of signal conversion algorithms can be applied by the output signal generating unit 115. The clock generating unit 108 generates a first for the repeated signal source 1〇1. The clock signal 109a' generates a second clock signal 10 109b to the reference signal generator 1 。 7. As another option for providing two individual clock signals 109a, 10%, it is also possible that the clock generating unit 1 〇 8 The repetitive signal source 101 and the reference signal generator 107 generate a common clock signal. Thus, the embodiment of Fig. 1 enables a measurement of the transition time of the analog waveform reconstruction. The figures 2 〇〇 and 25 图 shown in the figure, which will be further clarified by 15. The time is depicted along a transverse coordinate 201 of the drawing 200. Alonging the ordinate of the drawing 200 2 〇 2, one The signal value is depicted. A first graphic displays the inverse analog signal 102. A second graphic displays the fixed reference signal 106. The time point 2〇3 of the comparison signal 丨2〇 similar to the step function is shown in FIG. Further shown. Along a coordinate 210 of the graph 250, a modified time axis 210 (time modulus) / m = i / 3) is displayed. An ordinate 211 ' along the pattern 250 The signal values are depicted. The rearranged data points 2〇3 are also displayed in the graph 250. In addition, the comparison signal 120 is displayed. In addition, the overtravel time 251 can be obtained from the graph of Fig. 2. In the formula 250, r=〇.7 is the value of the reference signal 1 〇6, n=32 is the number of data points 203. M=3 is the number of times the repeated signal 102 is repeated. Therefore, In Fig. 2, the signal 1〇2 to be sampled has a sinusoidal shape, but may have any alternative shape, especially week. The shape of the period. Advantageously, N and Μ are either prime or mutually prime.

依據被描述的實施例,該反覆數位比較信號的過渡 了間251可藉由利用一數位ΑΤΕ通道的同調數位抽樣被精 確評估或估計。 1〇 在兩個測量暫態2〇3之間的時間間隔可被表示為Ts,該 反覆信號102之一週期的持續時間可被表示為丁r。較佳地, 方程式NxTs=MxTR保持,其中N與Μ互質,且KxN個樣本被 獲知·。然後依據排列方案iscrt=m〇(l(ixM,N)樣本可被重新排In accordance with the described embodiment, the transition 251 of the repeated digital comparison signal can be accurately evaluated or estimated by coherent digital sampling using a digital channel. The time interval between two measured transients 2〇3 can be expressed as Ts, and the duration of one of the repeated signals 102 can be expressed as D. Preferably, the equation NxTs = MxTR is maintained, where N and Μ are mutually prime, and KxN samples are known. Then according to the arrangement scheme iscrt=m〇(l(ixM,N) samples can be rearranged

序。過渡時間251在過渡之前的最後樣本時間和過渡之後的 15第一樣本時間之間。 根據第1圖和第2圖之實施例的同調抽樣方案,任意的 精細時間解析度OVN)可被獲得,特別是當N充分大時。一 實質上線性的時間測量可能產生(對TS假定-固定頻率抽 樣時鐘)。 20 —樣本的位準精確度僅㈣渡時_量_確度所決 定’不由如靜態比較位準的數目決定。 在下文中,根據第3圖所示之信號處理裝置3〇〇,依據 本發明-不範性實施例的-同職特徵將被解釋。 第3圖顯示-待測裝置。該待剛裝請產生一待測 24 1337458 信號s(t)(其中t是時間),該待測信號S⑴被提供給一比較II 302的一第一信號輸入。一參考信號r⑴被提供給該比較器 302的一第二信號輸入且由一參考信號產生器303產生。在 該比較器302的一輸出處,一比較信號c(t)被提供,該比較 5 信號c(t)被提供給一正反器304。該正反器304的輸出被轉接 到一記憶體305的一輸入。該記憶體305的一輸出被耦接到 一過渡時間運算單元306的一輸入,用於決定想要的過渡時 間。sequence. The transition time 251 is between the last sample time before the transition and the first sample time after the transition. According to the coherent sampling scheme of the embodiments of Figs. 1 and 2, an arbitrary fine time resolution OVN) can be obtained, especially when N is sufficiently large. A substantially linear time measurement may result (for the TS hypothesis - fixed frequency sampling clock). 20 — The level accuracy of the sample is determined only by (four) transit time _ quantity _determination' is not determined by the number of static comparison levels. In the following, according to the signal processing device 3 shown in Fig. 3, the same feature will be explained in accordance with the present invention - an exemplary embodiment. Figure 3 shows the device to be tested. To be installed, please generate a signal to be tested 24 1337458 (where t is time), and the signal to be tested S(1) is supplied to a first signal input of comparison II 302. A reference signal r(1) is supplied to a second signal input of the comparator 302 and is generated by a reference signal generator 303. At an output of the comparator 302, a comparison signal c(t) is provided and the comparison 5 signal c(t) is provided to a flip-flop 304. The output of the flip flop 304 is transferred to an input of a memory 305. An output of the memory 305 is coupled to an input of a transition time operation unit 306 for determining the desired transition time.

此外,該資料處理裝置3〇〇包含一共同的時鐘產生器單 10元307,該時鐘產生器單元307對該系統300之不同的元件產 生一共同的時鐘。該時鐘產生器單元307被耦接到一除法器 DN單元308 ’用於將一時鐘信號提供給該正反器3〇4。進一 步’該時鐘產生器單元3〇7被耗接到—除法器Dref 3〇9以產 生需被提供給該參考信號產生器3〇3的一時鐘信號。此外, μ該時鐘產生器307被耗接到一除法器·3ι〇,該除法器圓In addition, the data processing device 3A includes a common clock generator unit 10 307 that produces a common clock for different components of the system 300. The clock generator unit 307 is coupled to a divider DN unit 308' for providing a clock signal to the flip-flop 3〇4. Further, the clock generator unit 3〇7 is consuming to the divider Dref 3〇9 to generate a clock signal to be supplied to the reference signal generator 3〇3. In addition, μ the clock generator 307 is consumed by a divider ·3ι〇, which is round

3H)接著_到該待測裝請,以致對該待測裝侧產生 一時鐘信號。 20 依據第3圖的實施例,例如經由該共同的時鐘參考,同 調性可被確保。該待測信號在時間恤除法議则控制) ^後反覆冑齡考錢具有—週射μ且由紐法器㈣ 早疋309控制。一靜態比較位準不需要時鐘。此外,一數位 樣週期Ts可由該除法器單灿N3G8實現控制。 ^ ;第3圖之實%例可選擇地,可存在三個具有相同 輸出頻率__帅如Μ者,纖精確度可3H) Next _ to the device to be tested, so that a clock signal is generated for the side to be tested. 20 According to the embodiment of Fig. 3, the homology can be ensured, for example via the common clock reference. The signal to be tested is controlled by the time-receiving rule. ^ After the age-receiving test, it has a period of μ and is controlled by the New Zealand device (4). A static comparison level does not require a clock. In addition, the one-digit period Ts can be controlled by the divider single N3G8. ^ ; The actual example of Figure 3 is optional, there may be three with the same output frequency __ handsome, the fiber accuracy can be

I 25 1337458 被提供、.-σ _4固獨立的時鐘產生器,以確保想要的輸出頻率。 柏要/主思的是該系統3〇〇的方塊304至306可被任何想 要的時間至數位轉換器單元所替換。從非等距樣本到等距 樣本的轉換可根據任何信號處理方案被執行 ,特別是可被 5應用到-具有時戰之信號的任何數位化中。換句話說自 非等距樣本產生等距樣本並不限制於反復信號。 第4圖顯說明在測量有缺陷之信號(即被雜訊及/或抖 動干擾的信號)之過渡時間情形中的第2圖之情形的圖式 4〇〇 、 430 、 450 〇 10 在有雜訊或抖動的情形下,藉由查看過渡附近的所有 樣本及選擇一適當的“平均,,過渡點,時戳之一較好的評估 町被獲得。也就是說,抖動可允許在樣本之間的内插。也 •5J*能在如果不夠嘈雜的情形下人工增加抖動(例如增加某 種小的PRBS信號到抽樣時鐘,或連接一嘈雜的二極體到比 15較器輸入)。第4圖中的描繪包括一個0.02 rms的雜訊位準。 在下文中’參考第5圖,測量有缺陷之信號(即有雜訊 或抖動的信號)的過渡時間將被詳細解釋。 第5圖再次顯示一類似第4圖之圖式400的圖式500及一 類似第4圖之圖式450的圖式550。 2〇 一種不用平均而決定一過渡時間的簡單方式是採取第 /個“1”。在第5圖的情景中,測量點203 #12則被選擇成過 渡時間,因此户12/256。樣本的總數是256。可選擇地,最 後的“〇,,可被選擇,這導致在測量點203 #22處評估過渡時 間0 26 1337458 另外,可能實現某種平均。例如,在第一個“1”和最後 的“〇”之間的中間值可被選取。這將導致一過渡時間 t=(22+12)/2/256=17/256。 另外,甚至更多平均可能被包含,這導致一仍非常容 5 易的計算方案和適當的結果。依據此一實施例,值“0”可被 計數。這可導致一過渡時間t= 16/2 5 6。 一更佳的過渡時間評估(但包含較多計算)包含尋找最 小化偏離總和(EiSEJ的時間“T”。S個樣本在過渡周圍, i=l,...,S,每一個具有樣本時間ti、資料值山(“0”或“1”)。 10 以下方程式描述上升過渡的情形: i=\Mi=\Ji<T ί—=1,ί/,=0,Γ2,, Ε2= t(r_〇2+ ί>,-Γ)2 /=l,c/( =\,tt<T /=1.^=0,Γ£/( 在下文中,參考第6圖,類比波形重新建構將被詳細解 釋。 15 一第一圖式600顯示依據第3圖對於0.005的一第一解 析度值的信號s(t)、r⑴及c(t)的時間相依性。一第二圖式650 顯示對於0.0001的一第二解析度值這些信號s(t)、r⑴及c(t) 的時間相依性。 精確的過渡時間Tk如上所述被決定出。被抽樣之位準 20 由已知的參考波形在時間Tk給出,Vk=r(Tk),或正好已知的 靜態位準。樣本可以是(時間,值)對(Tk,Vk)。 圖式600、650中的圓圈顯示對於0.005的一解析度(圖式 27 1337458 600)及0.0001的一解析度(圖式650)“被測量”的樣本(Tk,Vi〇e 在下文中’參考第7圖’依據本發明一示範性實施例的 一信號處理裝置700將被解釋。 第7圖的左手邊實質上等於第3圖,因此在下文僅解釋 5 額外的元件。 該信號處理裝置700包含一個均勻内插單元701、一,决 速傅立葉轉換單元702、一非均勻快速傅立葉轉換單元 703、一反快速傅立葉轉換單元7〇4、一非均勻離散傅立葉 轉換單元705、一降頻轉換單元(頻移)7〇6以及一反快速傅立 10 葉轉換單元707。 該過渡時間運算單元306的一輸出被提供給一第一輸 出708作為一非均勻時間樣本信號。此外,該過渡時間運算 單元306的輸出被提供給該均勻内插單元7〇1的一輸入。該 均勻内插單元701的一輸出提供一個均勻時間樣本信號 15 709。此外,該均勻内插單元701的輸出被耦接到該fft單元 702的一輸入,其中該FFT單元702的一輸出提供一個均勻頻 譜信號710。 除此之外,該過渡時間運算單元3〇6的輸出被提供給該 NUFFT單元703的一輸入。在該nuFFT單元703的一輸出 20處,一個均勻頻譜信號7U被提供。此外,該NUFFT單元703 的輸出被耦接到該反FFT單元7〇4的一輸入。在該反Fft單 tl704的一輸出處,均勻時間樣本712被提供。此外,該過 渡時間運算單元306的輪出信號被提供給該非均勾啦單 凡7〇5。在該非均勻1)1:丁單元7〇5的一輸出處,一信號η]被 28 提供’該仏號713指示在被選擇的使用者定義之頻率處的一 頻譜L此外,該非均句_單元期的輸出被搞接到該降頻 轉奐單元706的輸入。在該降頻轉換單元寫的一輸出 处基頻頻乳號714被提供。此外,該降頻轉換單元706 的輸出被耗接到該反FFT單元7〇7的一輸入。在該反吓丁單 元707的輸出處’―個均勻基頻樣本時間信號715被提 供。在一實際應用中,通常僅有少量輸出被預知,例如一 個或兩個。 依據第7圖之實施例的處理允許將過渡時間轉換為一 10 般的ADC樣本格式。 對於一些應用而言,非均勻樣本(T,,Vi)是精細的,例如 對於眼狀圖而言。然而,很多應用需要具有被均勻間隔的 時間樣本或在被均句間隔之頻率處的頻譜的資料表示。 為了貫現此解決方法’可能使用均勻内插以將該非均 15勻間隔的時間樣本轉換為具有均勻時間間隔的樣本(如在 習知的ADC領域中普遍的)。出於此目的,標準FFT可被應 用。 也可能的是使用非均勻快速傅立葉轉換(NUFFT)以從 非均勻間隔之時間樣本計算均勻間隔之頻率處的一頻譜。 20較佳地,NUFFT可與快速多極方法(FMM)組合用於快速計 算時間。利用標準的反FFT,時間樣本可被計算出。 也可能的是使用非均勻DFT(非均勻離散傅立葉轉換, 不是如此“快速,,的)以將非均勻間隔的時間樣本轉換為在被 選擇之使用者定義的頻率處的頻譜。這對於窄頻(例如rF) 29 1337458 信號是有用的。 第8圖顯示一第一圖式800和一第二圖式850,其等類似 於第6圖的圖式。I 25 1337458 is supplied with a .-σ _4 independent clock generator to ensure the desired output frequency. It is important to think that the blocks 304 to 306 of the system can be replaced by any desired time to digital converter unit. The conversion from non-equidistant samples to equidistant samples can be performed according to any signal processing scheme, and in particular can be applied to any digitization of signals with time warfare. In other words, generating equidistant samples from non-equidistant samples is not limited to repeated signals. Figure 4 shows the pattern of Fig. 4〇〇, 430, 450 〇10 in the case of the second time in the case of measuring the transition time of a defective signal (ie, a signal interfered by noise and/or jitter). In the case of jitter or jitter, by looking at all the samples near the transition and selecting an appropriate "average, transition point, one of the time stamps is better evaluated, the town is obtained. That is, jitter can be allowed between samples. Interpolation. Also • 5J* can artificially increase jitter if not sufficiently noisy (such as adding a small PRBS signal to the sampling clock, or connecting a noisy diode to a 15 input). The depiction in the figure includes a noise level of 0.02 rms. In the following 'refer to Figure 5, the transition time for measuring a defective signal (ie, a signal with noise or jitter) will be explained in detail. Figure 5 shows again A pattern 500 similar to the pattern 400 of FIG. 4 and a pattern 550 similar to the pattern 450 of FIG. 4. 2 A simple way to determine a transition time without averaging is to take the first "1" In the scenario of Figure 5, measurement point 203 #12 It is selected as the transition time, so the household is 12/256. The total number of samples is 256. Alternatively, the last "〇, can be selected, which results in the evaluation of the transition time at measurement point 203 #22 0 26 1337458 Achieve some average. For example, an intermediate value between the first "1" and the last "〇" can be selected. This will result in a transition time t = (22 + 12) / 2 / 256 = 17 / 256. In addition, even more averages may be included, which results in a still very computational solution and appropriate results. According to this embodiment, the value "0" can be counted. This can result in a transition time t = 16/2 5 6 . A better transition time assessment (but with more calculations) involves finding the minimum deviation deviation (EiSEJ time "T". S samples around the transition, i = l, ..., S, each with sample time Ti, data value mountain (“0” or “1”). 10 The following equation describes the case of a rising transition: i=\Mi=\Ji<T ί—=1, ί/,=0,Γ2,, Ε2= t (r_〇2+ ί>,-Γ)2 /=l,c/( =\,tt<T /=1.^=0,Γ£/( In the following, refer to Figure 6, re-construction of analog waveform It will be explained in detail. 15 A first graph 600 shows the time dependence of the signals s(t), r(1) and c(t) for a first resolution value of 0.005 according to Fig. 3. A second pattern 650 The time dependence of these signals s(t), r(1), and c(t) is shown for a second resolution value of 0.0001. The exact transition time Tk is determined as described above. The sampled level 20 is known. The reference waveform is given at time Tk, Vk = r(Tk), or exactly the known static level. The sample can be a (time, value) pair (Tk, Vk). The circles in Figures 600, 650 are shown for 0.005. One resolution (Figure 27 1337458 600) and 0.00 A sample (measured) of a resolution (FIG. 650) of 01 (Tk, Vi〇e hereinafter referred to FIG. 7) will be explained in accordance with a signal processing apparatus 700 according to an exemplary embodiment of the present invention. The left-hand side of the figure is substantially equal to Figure 3, so only five additional elements are explained below. The signal processing device 700 comprises a uniform interpolation unit 701, a fast-speed Fourier transform unit 702, and a non-uniform fast Fourier transform unit. 703, an inverse fast Fourier transform unit 〇4, a non-uniform discrete Fourier transform unit 705, a down conversion unit (frequency shift) 7〇6, and an inverse fast Fourier transform unit 707. The transition time unit An output of 306 is provided to a first output 708 as a non-uniform time sample signal. Furthermore, the output of the transition time operation unit 306 is provided to an input of the uniform interpolation unit 〇1. The uniform interpolation unit An output of 701 provides a uniform time sample signal 15 709. Further, the output of the uniform interpolation unit 701 is coupled to an input of the fft unit 702, wherein an input of the FFT unit 702 A uniform spectral signal 710 is provided. In addition, the output of the transition time arithmetic unit 〇6 is provided to an input of the NUFFT unit 703. At an output 20 of the nuFFT unit 703, a uniform spectral signal 7U is In addition, the output of the NUFFT unit 703 is coupled to an input of the inverse FFT unit 〇 4. At an output of the inverse Fft unit tl 704, a uniform time sample 712 is provided. Further, the round-out signal of the transition time arithmetic unit 306 is supplied to the non-uniform hook. At an output of the non-uniform 1) 1: butyl unit 7 〇 5, a signal η] is provided by 28 'the apostrophe 713 indicating a spectrum L at the selected user-defined frequency. In addition, the non-uniform sentence _ The output of the unit period is coupled to the input of the down conversion unit 706. A base frequency number 714 is provided at an output written by the down conversion unit. Furthermore, the output of the down conversion unit 706 is consumed by an input of the inverse FFT unit 7〇7. At the output of the counter scary unit 707, a uniform fundamental frequency sample time signal 715 is provided. In a practical application, usually only a small number of outputs are predicted, such as one or two. The processing according to the embodiment of Figure 7 allows the transition time to be converted to a 10-like ADC sample format. For some applications, non-uniform samples (T, Vi) are fine, such as for eye diagrams. However, many applications require data samples that are evenly spaced or that are spectrally represented at the frequency of the uniform interval. To achieve this solution, it is possible to use uniform interpolation to convert the non-uniformly spaced time samples into samples with uniform time intervals (as is common in the well-known ADC field). For this purpose, a standard FFT can be applied. It is also possible to use non-uniform fast Fourier transform (NUFFT) to calculate a spectrum at a frequency that is evenly spaced from non-uniformly spaced time samples. Preferably, the NUFFT can be combined with the Fast Multipole Method (FMM) for fast time calculation. Using standard inverse FFT, time samples can be calculated. It is also possible to use non-uniform DFT (non-uniform discrete Fourier transform, not so "fast,") to convert non-uniformly spaced time samples into a spectrum at the frequency defined by the user. This is for narrow frequencies. (e.g., rF) 29 1337458 Signals are useful. Figure 8 shows a first pattern 800 and a second pattern 850, which are similar to the pattern of Figure 6.

第8圖舉例說明均勻内插。可能使用重新建構運算法以 5 獲得均句間隔的時間資料。出於此目的,一個Sine⑴内插 是可能的,一個多項式内插(Lagrange内插、樣條内插、線 性内插)是可能的,及/或小數延遲濾波器可被實現。該圖式 850藉由圓圈舉例說明來自一比較信號之過渡時間的非均 勻樣本。點線顯示真實的DUT波形。圖式850中的星形顯示 10 使用樣條内插(例如MATLAB interpl(…,‘spline’))的一個均 勻内插的結果。 在下文中,NUFFT特徵將被詳細解釋。 出於此目的,該術語將被下文定義: JC,. £/?,/ = 1..1,時間樣本 Λ =0-1)./。已足々二[..#,頻率點 A =X(/;)eC,頻譜 x.=x((i) = fjXkeJ2:l(k-lw· k = \ W = ) = (θ2πα'-1)/ιΛ ),非均勻傅立葉矩陣 wik = (wi)k] >= eJ2nf〇1' 15 /Figure 8 illustrates a uniform interpolation. It is possible to use the reconstruction algorithm to get the time data for the interval between the sentences. For this purpose, a Sine(1) interpolation is possible, a polynomial interpolation (Lagrange interpolation, spline interpolation, linear interpolation) is possible, and/or a fractional delay filter can be implemented. The pattern 850 illustrates a non-uniform sample from the transition time of a comparison signal by a circle. The dotted line shows the true DUT waveform. The star display in Figure 850 10 uses a uniform interpolation of spline interpolation (e.g., MATLAB interpl (..., 'spline')). In the following, the NUFFT feature will be explained in detail. For this purpose, the term will be defined as follows: JC,. £/?, / = 1..1, time sample Λ =0-1)./. Already two [..#, frequency point A =X(/;)eC, spectrum x.=x((i) = fjXkeJ2:l(k-lw· k = \ W = ) = (θ2πα'-1 ) / ιΛ ), non-uniform Fourier matrix wik = (wi)k] >= eJ2nf〇1' 15 /

w 丨 w,2 w2 w22 N-\w 丨 w,2 w2 w22 N-\

N-\ ,矩陣 N-\N-\ , matrix N-\

XX wu X,XX wu X,

WNN N JWNN N J

x = WXx = WX

X = w_1 .x,非均勻FFT 30 1337458 可能使用NUFFT以從非均勻間隔之時間樣本計算在均 勻間隔之頻率上的頻譜。均勻的頻率間隔可使得傅立葉矩 陣是一 Vandermonde矩陣(其對於不同的Xi始終可逆,其中行 是一行向量的冪次方)’與任意頻率相較其允許加速轉換。 在下文中’用於窄頻信號(RF)的NUDFT將被詳細解釋。 出於此目的,術語將在下文被定義: X; €仏_ = 1.._#,時間樣本 力€足灸=1...户,關注頻率 A = ) e C,關注頻率上的頻譜X = w_1 .x, non-uniform FFT 30 1337458 It is possible to use NUFFT to calculate the spectrum at a frequency that is evenly spaced from time samples that are not evenly spaced. A uniform frequency spacing may cause the Fourier matrix to be a Vandermonde matrix (which is always reversible for different Xis, where the row is the power of a row of vectors)' which allows for accelerated conversion compared to any frequency. The NUDFT for narrowband signals (RF) will be explained in detail below. For this purpose, the term will be defined below: X; €仏_ = 1.._#, time sample force foot moxibustion = 1 ... household, attention frequency A = ) e C, attention to frequency spectrum

PP

Xi = x(/,.) = Y^X.e^'· k=\ W =(心)=(e W'),非均勻傅立葉矩陣Xi = x(/,.) = Y^X.e^'· k=\ W =(心)=(e W'), non-uniform Fourier matrix

〜丨1 · • · ·· ww^ • l 乂、 Λ · • . .· WNP, 、XP J~丨1 · • ··· ww^ • l 乂, Λ · • . . . WNP, XP J

x = W.Xx = W.X

x = W+ ·χ,非均勻 DFT W+ sCWWfW·,虛擬反矩陣的定義 w =(w*,),轉置的定義 可能在一(窄)關注頻率範圍[fL,fH]内僅對於p個頻率fk 10計算頻譜,以避免對從DC到RF的數百萬個頻率作計算。 可取捨地,可能在NUDFT中包括DC(f=〇)以容忍偏移誤 差。 可取捨地,可能包括已知的寄生頻率以避免雜訊混疊 (aliasing)進該等關注頻率。 15 也可能在頻域内藉由一簡單的頻移直接執行降頻轉換 為一基頻。在此情景中不需要硬體降頻轉換。 田N&gt;B日守,通常N»p,平均可改良X的評估。w可變 31 1337458 成矩形。利用Moore-Penrose虛擬反矩陣w+,頻譜χ可被 算出。 接下來’另一情景將被描述: ' €心=1...%時間樣本 Λ· =(&lt;+灸-1)./。6/^ = 1_..^/-〈,關注頻率 At =/(/*)eC,關注頻率上的頻譜 kd xi ~ χ(0 = J^XkejU{h^k-])f^ w = (w,,) = (&lt;?/2叫“―”从),非均勻傅立葉矩陣 w =x = W+ ·χ, non-uniform DFT W+ sCWWfW·, definition of virtual inverse matrix w =(w*,), the definition of transpose may be only for p frequencies in a (narrow) frequency range of interest [fL, fH] Fk 10 calculates the spectrum to avoid calculations for millions of frequencies from DC to RF. Alternatively, it is possible to include DC (f = 〇) in the NUDFT to tolerate the offset error. It may be chosen to include known parasitic frequencies to avoid aliasing into these frequencies of interest. 15 It is also possible to directly perform down-conversion to a fundamental frequency in the frequency domain by a simple frequency shift. No hardware down conversion is required in this scenario. Tian N &gt; B day guard, usually N»p, can improve the evaluation of X on average. w variable 31 1337458 into a rectangle. Using the Moore-Penrose virtual inverse matrix w+, the spectrum χ can be calculated. Next, another scenario will be described: '€心=1...% time sample Λ· =(&lt;+moxime-1)./. 6/^ = 1_..^/-<, focus on the frequency At =/(/*)eC, focus on the spectrum on the frequency kd xi ~ χ(0 = J^XkejU{h^k-])f^ w = ( w,,) = (&lt;?/2 is called "-" from), non-uniform Fourier matrix w =

W 、卜 w卜+、w,tt+: W2 VV*,+1 Vl;*i+; • · . • · . • · ♦Al ^·+, ^+: ,Λ - - - 2 12 2w w ::: w' w2 w·W, Bu w Bu +, w, tt+: W2 VV*, +1 Vl; *i+; • · . • · · • ♦Al ^·+, ^+: , Λ - - - 2 12 2w w :: : w' w2 w·

T tH:w V Si Λ, N &gt;T tH:w V Si Λ, N &gt;

χ = W.Xχ = W.X

x = VT1 ·χ,非均勻FFT 當頻率被選擇為在-個單-的連續關注頻率範圍内 (典型的對於RF信號而言)被同等間隔時,該傅立葉矩陣是 一Vandermonde矩陣和一對角線矩陣的乘積,其可簡化倒 置。 第9圖顯示一依據本發明一示範性實 測量設備 32 900。 10 1337458 該測量設備900包含一控制電腦(例如一工作站、一pc 或一膝上型電腦)901,該控制電腦9〇1控制該測量設備的整 個測試。一測試控制單元902產生信號及/或接收來自〇1;丁 903、904的信號,包括一與由該測量設備9〇〇執行之測量相 5關的反覆信號102。在該測試控制單元902内或從其分開 的,具有第1圖所述之特徵的一信號處理裝置1〇〇被實現。 該測試控制單元902包含複數個接腳9〇5,該等接腳9〇5被連 接到該等待測裝置9G3、9G4(例如記憶體、行動電話的晶片 等等)。 10 在測試期間’刺激信號被提供給該等DUT 903、904, 以致執行一特定的測試圖案,且回應信號由該測試控制單 元902和該控制電腦901評估。 而要注意的是措辭“包含”不排除其他元件或特徵,“一 個’’不排除複數個。此外’與不同實施例相關聯描述的元件 15 可被組合。 【圖式簡單說明】 第]圖顯示依據本發明一示範性實施例的一信號處理 裝置。 第2圖顯示在同調時間戳記情形中的圖式。 2〇 第3圖舉例說明依據一示範性實施例的一信號處理裝 置。 第4圖顯示舉例說明在有抖動時—信號處理裝置之功 能的圖式。 第5圖顯示舉例說明在有抖動時一資料處理裝置之— 33 1337458 操作模式的圖式。 第6圖顯示依據一示範性實施例,在一信號處理裝置用 於類比波形重新建構的一操作期間的圖式。 第7圖舉例說明依據本發明一示範性實施例的一資料 5 處理裝置。 第8圖舉例說明依據一示範性實施例一信號處理裝置 情形中的均勻内插。 第9圖顯示依據一示範性實施例的一測量設備。 【主要元件符號說明】 100···信號處理裝置 115…輸出信號產生單元 101···反覆信號源 116…輸出信號 102…週期反覆信號 120…比較器信號 103···決定單元 130…正反器 104…控制信號 200…圖式 105…比較器單元 201…橫座標 106…參考信號 202…縱座標 107···參考信號產生器單元 203…資料點 108···時鐘產生單元 210…橫座標 109a、109b…時鐘信號 211…縱座標 110…數位結果信號 250…圖式 111…重新排列單元 251…過渡時間 112…評估單元 300…信號處理裝置 113···已排列的信號 301…待測裝置 114.··過渡時間信號 302…比較器 34 1337458x = VT1 · χ, non-uniform FFT The Fourier matrix is a Vandermonde matrix and a pair of angles when the frequency is chosen to be equally spaced within a continuous range of frequencies of interest (typically for RF signals) The product of the line matrix, which simplifies the inversion. Figure 9 shows an exemplary real measurement device 32 900 in accordance with the present invention. 10 1337458 The measuring device 900 includes a control computer (e.g., a workstation, a pc or a laptop) 901 that controls the entire test of the measuring device. A test control unit 902 generates signals and/or receives signals from 〇1; 903, 904, including a repetitive signal 102 that is correlated with measurements performed by the measuring device 9A. A signal processing device 1 having the features described in Fig. 1 is implemented within or separated from the test control unit 902. The test control unit 902 includes a plurality of pins 9〇5 that are connected to the standby devices 9G3, 9G4 (e.g., memory, wafers for mobile phones, etc.). The stimulus signal is provided to the DUTs 903, 904 during the test so that a particular test pattern is executed and the response signal is evaluated by the test control unit 902 and the control computer 901. It is to be noted that the word "comprising" does not exclude other elements or features, and "a" does not exclude the plural. In addition, the elements 15 described in association with the different embodiments can be combined. [Simplified illustration] A signal processing apparatus according to an exemplary embodiment of the present invention is shown. Fig. 2 is a diagram showing a case in the case of a coherent time stamp. Fig. 3 is a diagram illustrating a signal processing apparatus according to an exemplary embodiment. The figure shows a diagram illustrating the function of the signal processing device when there is jitter. Figure 5 shows a diagram illustrating the operation mode of a data processing device when there is jitter. Figure 6 shows an exemplary Embodiments, a diagram of a signal processing device for an operation of analog waveform reconstruction. Figure 7 illustrates a data processing device in accordance with an exemplary embodiment of the present invention. Figure 8 illustrates an exemplary Embodiment 1 A uniform interpolation in the case of a signal processing device. Fig. 9 shows a measuring device according to an exemplary embodiment. 100] signal processing device 115...output signal generating unit 101···reverse signal source 116...output signal 102...periodical repeat signal 120...comparator signal 103···determination unit 130...reactor 104...control Signal 200: Fig. 105... Comparator unit 201: abscissa 106... reference signal 202... ordinate 107···reference signal generator unit 203... data point 108···clock generation unit 210...horizontal coordinates 109a, 109b... Clock signal 211... ordinate 110... digital result signal 250... pattern 111... rearrangement unit 251... transition time 112... evaluation unit 300... signal processing device 113···arranged signal 301...device to be tested 114.·· Transition time signal 302... comparator 34 1337458

303···參考信號產生器 304…正反器 305…記憶體 306…過渡時間運算單元 307···時鐘產生器單元 308.. .除法器DN單元 309.. .除法器 Dref 310…除法器DM 400…圖式 430…圖式 450…圖式 500…圖式 550…圖式 600…圖式 650…圖式 700…信號處理裝置 7〇卜..均勻内插單元 702…快速傅立葉轉換單元 703…非均勻快速傅立葉轉換單元 704…反快速傅立葉轉換單元 705.·.非均勻離散傅立葉轉換單元 706··’降頻轉換單元 707··,反快速傅立葉轉換單元 708…輸出 709···均勻時間樣本信號 710.·.均勻頻譜信號 7U...均勻頻譜信號 712···均勻時間樣本 713…信號 714…基頻頻譜信號 715···均勻基頻樣本時間信說 800…圖式 850…圖式 900…測量設備 901·..控制電腦 902…測試控制單元 903.,·待測裝置 904…待測裝置 905…接腳 35303···Reference signal generator 304...Factor 305...Memory 306...Transition time operation unit 307··· Clock generator unit 308.. Divider DN unit 309.. . divider Dref 310...divider DM 400...FIG. 430...Pattern 450...Pattern 500...Pattern 550...Pattern 600...Pattern 650...Pattern 700...Signal Processing Device 7〇. Uniform Interpolation Unit 702...Fast Fourier Transform Unit 703 ...non-uniform fast Fourier transform unit 704...inverse fast Fourier transform unit 705.. non-uniform discrete Fourier transform unit 706··'down-conversion unit 707··, inverse fast Fourier transform unit 708...output 709···even time Sample signal 710.. Uniform spectrum signal 7U... Uniform spectrum signal 712···Uniform time sample 713...Signal 714...Base frequency spectrum signal 715···Uniform base frequency sample Time letter 800...Figure 850... 900...Measurement device 901·..Control computer 902...Test control unit 903.,·Device under test 904...Device under test 905...Pin 35

Claims (1)

^^7458 奢案申請專利範圍替換-本p的09 30·|-- , 一.b修正本 十、申請專利範圍·· - L —種用於處理信號的信號處理裝置,該信號處理裝置包 含: -比較器單元’用於將該信號與_參考信號做比 較, 一產生單元’祕產生指示比較結果的數個數位結 果信號,^^7458 Extravagant patent application scope replacement - this p 09 30·|--, one.b revision ten, patent application scope ·· - L - a signal processing device for processing signals, the signal processing device includes : - a comparator unit 'for comparing the signal with a _ reference signal, a generating unit 'secret generating a plurality of digital result signals indicating a comparison result, 一評估單元,祕較料触結果㈣的過渡時 間, 一輸出信號計算單元,其適於計算實質上均勾間隔 的數個輸出信號。 2·如申請專利範圍第!項之信號處理裝置,其適於處理一 反覆信號。 3·如申請專利範圍第丨項之信號處理裝置其包含: 一決定單元,用於決定低抽樣該信號的多個An evaluation unit, which is a transition time of the result (4), is an output signal calculation unit adapted to calculate a plurality of output signals substantially spaced apart. 2. If you apply for a patent range! The signal processing device of the item is adapted to process a repetitive signal. 3. The signal processing apparatus of claim 3, comprising: a determining unit for determining a plurality of low sampling signals 點。 4. 如申料㈣圍第3項之信號處理裝置,其中該比較單 元適於在該等多個時間點上將該信號與該參考信號做 比較。 5. 如申請專利範圍第丨項之信號處理裝置,其中該輸出信 號計算單元適於基於非均勻間隔的數位結果信號而計 算實質上均勻間隔的輸出信號。 6. 如申請專利範圍第i項之信號處理裝置,其適於處理類 比信號。 36 ,如申請專利範圍第1項之信號處理裝置,其適於處理經 調變射頻信號。 8. 如申請專利範圍第1項之信號處理裝置,其適於作為一 類比至數位轉換器’用以將—類比信號轉換成—數位信 號。 9. 如申請專利範圍第3項之信號處理裝置,其中該決定單 疋適於決定對於複數次反覆的至少一部分而言不同的 數個時間點。 10. 如申請專利範圍第3項之信號處理裝置,其中該決定單 元適於决疋對於複數次反覆的至少一部分而言不同的 數個時間點,以就每一額外反覆精進信號處理的精確 度。 U·如申請專利範圍第1項之信號處理裝置,其中該參考信 號疋由下列項目所組成的群組中之一者:在時間中固定 的單一個信號、各在時間中固定的複數個信號、依據一 預定波形而在時間中變化的一信號、以及一正弦信號。 12.如申凊專利範圍第1項之信號處理裝置,其中該評估單 元適於將與複數次反覆之不同反覆相關的時間點上之 信號納入考量而決定該等過渡時間。 以如申請專利範圍第3項之信號處理裝置,其中該等時間 點的數目大於反覆的次數。 14·如申請專利範圍第3項之信號處理裝置,其包含: 一重新排列單元,其適於依據對應於在該反覆信號 之一週期内之數個時間點的一年表,而重新排列與不同 37 1337458 反覆相關的該等數位結果信號。 15. 如申請專利範圍第丨項之信號處理裝置,其中該產生單 几適於在各別的該信號大於該參考信號時產生具有一 第一邏輯值的一數位結果信號,並在各別的該信號小於 該參考信號時產生具有一第二邏輯值的一數位結果信 號。 16. 如申請專利範圍第丨5項之信號處理裝置其中該評估單 φ 元適於基於由下列項目所組成之群組中之至少一者的 一分析來決定該等過渡時間:當中之數位結果信號具有 該第一邏輯值的一序列中的一最後時間點'及當中之數 位結果k號具有該第二邏輯值的一序列中的一第一時 間點。 π.如申請專利範圍第15項之信號處理裝置,其中該評估單 70適於基於形成一間隔的複數個時間點之統計分析而 決定該等過渡時間,該間隔包含具有該第一邏輯值的數 % 位結果信號並包含具有該第二邏輯值的數位結果信號。 18.如申請專利範圍第15項之信號處理裝置,其中該評估單 元適於: 基於將一數學概率函數,特別是一累積概率密度函 數’與形成一間隔的複數個時間點相擬合而決定該等過 度時間,該間隔包含具有該第一邏輯值的數位結果信號 並包含具有該第二邏輯值的數位結果信號,以及 從擬合結果決定該等過渡時間。 19‘如申請專利範圍第丨項之信號處理裝置,其中該評估單 38 1337458 元適於依據由信號抖動及信號雜訊所組成的群組中之 至少一者的存在程度而決定該等過渡時間。 20. 如申請專利範圍第1項之信號處理裝置,其中該輸出信 號計算單元適於藉由使用由下列項目所組成的群組中 之至少一者而判定實質上均勻間隔的該等輸出信號:辛 克(Sine)内插、多項式内插、拉格朗日(Lagrange) 内插、樣條(spline)内插、線性内插、及分數延遲遽-波器。 21. 如申請專利範圍第1項之信號處理裝置,其中該輸出信 號計算單元適於計算實質上在時間上均勻間隔或實質 上在頻率上均勻間隔的該等輸出信號。 22. 如申請專利範圍第1項之信號處理裝置,其中該輸出信 號計算單元適於藉由執行由下列項目所組成的群組中 之至少一者而計算該輸出信號:快速傅立葉轉換(Fast Fourier Transformation )、非均勻快速傅立葉轉換 (Non-Uniform Fast Fourier Transformation )、具有快速 多極方法(Fast Multipole Method)的非均勻快速傅立 葉轉換、以及非均勻離散傅立葉轉換(Non-Unif〇rm Discrete Fourier Transformation)。 23. 如申請專利範圍第2項之信號處理裝置,其適於利用同 調抽樣來處理該反覆信號。 24. 如申請專利範圍第1項之信號處理裝置,其包含: 一時鐘產生單元,其適於針對該信號處理裝置的複 數個元件而產生一共同時鐘信號。 39 1337458 25. 如申請專利範圍第1項之信號處理裝置,其包含: 複數個時鐘產生單元,其各適於針對該信號處理裝 置的一指定元件而產生個別的時鐘信號,其中該等複數 個時鐘產生單元彼此鎖頻。 26. 如申請專利範圍第1項之信號處理裝置,其包含: 一抖動增加單元,其適於選擇性地增加抖動至該信 號。 27. 如申請專利範圍第1項之信號處理裝置,其包含: 一自動測試器械單元,作為提供該信號的一來源。 28. 如申請專利範圍第1項之信號處理裝置,其適於作為用 於測試一待測裝置的一自動測試器械。 29. —種測量設備,其包含: 如申請專利範圍第1項的一信號處理裝置,用於處 理與由該測量設備所執行之測量相關的信號。 30. 如申請專利範圍第29項之測量設備,其適於產生作為該 信號的一刺激信號,該刺激信號要被施用至一待測裝置 以測試該待測裝置。 31. 如申請專利範圍第29項之測量設備1其適於響應於將一 刺激信號施用至該待測裝置以測試該待測裝置,而從一 待測裝置接收作為該信號的一回應信號。 32. 如申請專利範圍第29項之測量設備,其包含下列中之至 少一者:類比至數位轉換器、感測器裝置 '用於測試待 測裝置或物質的測試裝置、用於化學、生物學及/或藥 學分析的裝置、適用於分離流體之混合物的流體分離系 40 1337458 統、毛細管電泳裝置、液體層析裝置、氣體層析裝置 電子測量裝置、及質譜裝置。 33. —種處理信號的信號處理方法,該方法包含以下步驟 將該信號與一參考信號做比較, 產生指示比較結果的數個數位結果信號, 決定該等數位結果信號的過渡時間, 計算實質上均勻間隔的輸出信號。point. 4. The signal processing device of claim 3, wherein the comparison unit is adapted to compare the signal with the reference signal at the plurality of time points. 5. The signal processing apparatus of claim 3, wherein the output signal calculation unit is adapted to calculate substantially evenly spaced output signals based on the non-uniformly spaced digital result signals. 6. A signal processing device as claimed in claim i, which is adapted to process an analog signal. 36. The signal processing device of claim 1, wherein the signal processing device is adapted to process the modulated RF signal. 8. The signal processing device of claim 1, which is adapted to be used as an analog to digital converter to convert an analog signal into a digital signal. 9. The signal processing apparatus of claim 3, wherein the decision is adapted to determine a plurality of time points that are different for at least a portion of the plurality of repetitions. 10. The signal processing device of claim 3, wherein the determining unit is adapted to determine a plurality of different time points for at least a portion of the plurality of repetitions to optimize the precision of each additional repeated signal processing . U. The signal processing device of claim 1, wherein the reference signal is one of a group consisting of: a single signal fixed in time, and a plurality of signals fixed in time. a signal that changes in time according to a predetermined waveform, and a sinusoidal signal. 12. The signal processing apparatus of claim 1, wherein the evaluation unit is adapted to take into account signals at time points that are inversely related to the plurality of repetitions to determine the transition times. The signal processing device of claim 3, wherein the number of the time points is greater than the number of times of repetition. 14. The signal processing device of claim 3, comprising: a rearrangement unit adapted to rearrange and according to a one-year table corresponding to a plurality of time points within one cycle of the repeated signal The different 37 1337458 are repeatedly related to the digital result signals. 15. The signal processing apparatus of claim </ RTI> wherein the generating unit is adapted to generate a digital result signal having a first logical value when the respective one of the signals is greater than the reference signal, and in each When the signal is smaller than the reference signal, a digital result signal having a second logic value is generated. 16. The signal processing apparatus of claim 5, wherein the evaluation unit φ element is adapted to determine the transition time based on an analysis of at least one of the group consisting of: digit results The signal has a last time point in a sequence of the first logic value and a digit result k number of the first time point in a sequence of the second logic value. π. The signal processing device of claim 15, wherein the evaluation form 70 is adapted to determine the transition time based on a statistical analysis of a plurality of time points forming an interval, the interval including the first logical value The % bit result signal and includes a digital result signal having the second logic value. 18. The signal processing device of claim 15, wherein the evaluation unit is adapted to: determine based on fitting a mathematical probability function, in particular a cumulative probability density function, to a plurality of time points forming an interval The excess time, the interval comprising a digital result signal having the first logical value and comprising a digital result signal having the second logical value, and determining the transition times from the result of the fitting. 19' The signal processing device of claim </ RTI> wherein the evaluation form 38 1337458 is adapted to determine the transition time based on the presence of at least one of the group consisting of signal jitter and signal noise. . 20. The signal processing device of claim 1, wherein the output signal calculation unit is adapted to determine the substantially evenly spaced output signals by using at least one of the group consisting of: Sine interpolation, polynomial interpolation, Lagrange interpolation, spline interpolation, linear interpolation, and fractional delay 遽-wave. 21. The signal processing device of claim 1, wherein the output signal calculation unit is adapted to calculate the output signals that are substantially evenly spaced in time or substantially evenly spaced in frequency. 22. The signal processing apparatus of claim 1, wherein the output signal calculation unit is adapted to calculate the output signal by performing at least one of the group consisting of: Fast Fourier Transform (Fast Fourier) Transformation ), Non-Uniform Fast Fourier Transformation, Non-uniform Fast Fourier Transform with Fast Multipole Method, and Non-Unif〇rm Discrete Fourier Transformation . 23. The signal processing device of claim 2, wherein the signal processing device is adapted to process the repetitive signal using coherent sampling. 24. The signal processing device of claim 1, comprising: a clock generating unit adapted to generate a common clock signal for a plurality of components of the signal processing device. 39. The method of claim 1, wherein the signal processing device comprises: a plurality of clock generating units each adapted to generate an individual clock signal for a specified component of the signal processing device, wherein the plurality of clock signals are generated The clock generating units are frequency locked to each other. 26. The signal processing device of claim 1, comprising: a jitter increasing unit adapted to selectively increase jitter to the signal. 27. The signal processing device of claim 1, comprising: an automatic test instrument unit as a source for providing the signal. 28. The signal processing device of claim 1, wherein the signal processing device is adapted to be an automatic test instrument for testing a device under test. 29. A measuring device comprising: a signal processing device as claimed in claim 1 for processing a signal associated with a measurement performed by the measuring device. 30. The measuring device of claim 29, wherein the measuring device is adapted to generate a stimulation signal as the signal, the stimulation signal being applied to a device under test to test the device to be tested. 31. The measuring device 1 of claim 29, wherein the measuring device 1 is adapted to receive a response signal from the device under test in response to applying a stimulus signal to the device under test to test the device under test. 32. The measuring device of claim 29, comprising at least one of: an analog to digital converter, a sensor device, a test device for testing a device or substance to be tested, for chemistry, biology A device for learning and/or pharmaceutical analysis, a fluid separation system suitable for separating a mixture of fluids, a capillary electrophoresis device, a liquid chromatography device, a gas chromatography device, an electronic measurement device, and a mass spectrometer. 33. A signal processing method for processing a signal, the method comprising the steps of: comparing the signal with a reference signal, generating a plurality of digital result signals indicating a comparison result, determining a transition time of the digital result signals, and calculating substantially Evenly spaced output signals. 从一種儲存有信號處理之電腦程式在内的電腦可讀媒 體,該電腦程式在被-處理H執行時適於㈣或執行 種處理信號的方法,該方法包含以下步驟: 將該信號與一參考信號做比較, 產生指不比較結果的數個數位結果信號, 決定該等數位結果信號的過渡時間, α十算貫為上均勻間隔的輸出信號。 35· 一種信號處理的程U件,該程式元件在被-處理器執From a computer readable medium storing a computer program for signal processing, the computer program is adapted to (4) or perform a method of processing a signal when executed by a processing H, the method comprising the steps of: The signals are compared to generate a plurality of digital result signals indicating non-comparison results, and the transition time of the digital result signals is determined, and the alpha ten is calculated as an evenly spaced output signal. 35. A signal processing U component, the program component is executed by the processor 行時適於控制或執行-種處理信號的方法,該方法包含 以下步驟: 將該信號與一參考信號做比較, 產生指示比較結果的數個數位結果信號, 決定該等數位結果信號的過渡時間/ 計算實質上均勾間隔的輸出_。The method is suitable for controlling or executing a method for processing a signal, the method comprising the steps of: comparing the signal with a reference signal, generating a plurality of digital result signals indicating a comparison result, determining a transition time of the digital result signals / Calculate the output _ that is substantially equally spaced.
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