EP1993109B1 - Matériel absorbant des impulsions parasites avec une fonction électrique supplémentaire - Google Patents

Matériel absorbant des impulsions parasites avec une fonction électrique supplémentaire Download PDF

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Publication number
EP1993109B1
EP1993109B1 EP20070108466 EP07108466A EP1993109B1 EP 1993109 B1 EP1993109 B1 EP 1993109B1 EP 20070108466 EP20070108466 EP 20070108466 EP 07108466 A EP07108466 A EP 07108466A EP 1993109 B1 EP1993109 B1 EP 1993109B1
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EP
European Patent Office
Prior art keywords
absorbing material
glass
surge absorbing
conductive
state component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP20070108466
Other languages
German (de)
English (en)
Other versions
EP1993109A1 (fr
Inventor
Yu-Wen c/o Leader Well Technology Co. Ltd. Tan
Jie-An c/o Leader Well Technology Co. Ltd. Zhu
Li-Yun c/o Leader Well Technology Co. Ltd. Zhang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SFI Electronics Technology Inc
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SFI Electronics Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SFI Electronics Technology Inc filed Critical SFI Electronics Technology Inc
Priority to EP20070108466 priority Critical patent/EP1993109B1/fr
Publication of EP1993109A1 publication Critical patent/EP1993109A1/fr
Application granted granted Critical
Publication of EP1993109B1 publication Critical patent/EP1993109B1/fr
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/12—Overvoltage protection resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/105—Varistor cores

Definitions

  • the present invention relates to a surge absorbing material.
  • surge absorbers or called varistors
  • surge absorbers with good surge absorbing capability are widely used as components for providing protection against electrical overstress or surge of electronic components, electronic circuits or electronic equipment.
  • inductance and capacitance are combined as a single SMD-type (surface mounting device) component to become an inductance-capacitance filter (LC filter) with filtering function; or, resistance and capacitance are combined as a single SMD-type component to become a resistance-capacitance filter (RC filter) with filtering function.
  • LC filter inductance-capacitance filter
  • RC filter resistance-capacitance filter
  • WO 9821731 A1 discloses a low-temperature glass disposed between a surge absorber and a ceramic condenser to enhance the connection of the two materials.
  • China Patent No. 1,858,995 discloses a varistor layer mainly composed of Zinc oxide with different additional elements to provide the material with functions of surge absorber and inductor, and then the two layers are combined by a laminating process and sintered together.
  • KR 20020028279 shows a varistor-capacity multifunctional device based on SrCaTiO 3 .
  • insulating layers with varying contents are disposed between two components.
  • the present invention aims at providing a surge absorbing material for chip absorbers that has an extended range of functions and can be manufactured easily.
  • the present invention provides a surge absorbing material with dual functions.
  • a first-order, second-order or third-order dispersing method conductive or semiconductive particles of micron, submicron and nanometer size are wrapped in a suitable material of a glass phase, and then sintered to have good surge absorbing characteristic.
  • the material of a glass phase is selected from materials with one of the characteristics among capacitance, inductance, voltage suppressor and thermistor
  • the surge absorbing material becomes a material with dual functions having one of the characteristics among capacitance, inductance, voltage suppressor and thermistor in addition to surge absorbing characteristic, and the problem of separation and ineffectiveness occurred when two materials of different characteristics are sintered together into a single structure can be solved.
  • the microcosmic compositions of a surge absorbing material 10 of the present invention include a high electrical resistance glass substrate 11 and micron conductive or semiconductive particles 12, submicron conductive or semiconductive particles 14 and nanometer conductive or semiconductive particles 16 uniformly distributed in the glass substrate 11.
  • micron conductive or semiconductive particles 12 is larger than 0.1 ⁇ m
  • the particle diameter of submicron conductive or semiconductive particles 14 is between 0.1 to 0.01 ⁇ m
  • the nanometer particle diameter of conductive or semiconductive particles 16 is smaller than 0.01 ⁇ m.
  • the conductive particle is selected from one or more of Pt, Pd, W, Au, Al, Ag, Ni, Cu, Fe and alloy thereof.
  • the semiconductive particle is selected from one of ZnO, TiO 2 , SnO 2 , Si, Ge, SiC, Si-Ge alloy, InSb, GaAs, InP, GaP, ZnS, ZnSe, ZnTe, SrTiO 3 and BaTiO 3 .
  • second-order dispersed submicron conductive or semiconductive particles 14 are uniformly distributed in first-order dispersed micron conductive or semiconductive particles 12; as shown in Fig. 3 , third-order dispersed nanometer conductive or semiconductive particles 16 are uniformly distributed in second-order dispersed submicron conductive or semiconductive particles 14.
  • the microcosmic compositions of a surge absorbing material 10 include three kinds of low-resistance conductive or semiconductive particles 12, 14 and 16 with different particle diameters uniformly dispersed in the glass substrate 11, and such compositions provide the surge absorbing material 10 with the characteristic of surge absorber.
  • the laminated chip surge absorber 20 is endurable to heat generated from electrostatic shocks and surge overstresses.
  • second-order dispersed submicron conductive or semiconductive particles 14 and third-order dispersed nanometer conductive or semiconductive particles 16 are further contained in the ceramic layer 21, and the particle distances of nanometer conductive or semiconductive particles 16 are so small that a tunnel effect occurs when an abnormal electrical overstress is applied.
  • laminated chip surge absorber 20 has good electrical overstress suppressing capability and electrostatic shock resistance, as well as a good lifespan.
  • the surge absorbing material 10 has one of the characteristics among capacitance, inductance, voltage suppressor and thermistor in addition to surge absorbing characteristic by choosing the glass substrate 11 from one of a capacitance glass state component, an inductance glass state component, a voltage suppressor glass state component and a thermistor glass state component.
  • the surge absorbing material 10 is a material with dual functions.
  • the surge absorbing material 10 of the present invention has one of the characteristics among capacitance, inductance, voltage suppressor and thermistor in addition to surge absorbing characteristic.
  • capacitance, inductance, voltage suppressor and thermistor in addition to surge absorbing characteristic.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Thermistors And Varistors (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Claims (7)

  1. Matériau absorbant des impulsions parasites pourvu d'une des caractéristiques parmi la capacité, l'inductance, un suppresseur de tension et une thermistance aussi bien qu'une caractéristique d'absorption d'impulsions parasites, caractérisé en ce qu'il comprend un substrat en verre à résistance électrique élevée (11) d'environ 3% à environ 60% par poids du matériau absorbant des impulsions parasites; un type de particules conductrices ou semiconductrices (12) de la taille d'un micron ayant un diamètre de particule supérieur à 0,1 µm en une quantité d'environ 40% à environ 97% en poids du matériau absorbant des impulsions parasites et distribuées uniformément dans le substrat en verre, un second type de particules conductrices ou semiconductrices inférieures au micron (14) ayant un diamètre de particules entre 0,1 et 0,01 µm et distribuées dans le substrat en verre et entre les particules conductrices ou semiconductrices de la taille d'un micron; et un troisième type de particules conductrices ou semiconductrices de la taille d'un nanomètre (16) ayant un diamètre de particules inférieur à 0,01 µm et distribuées dans le substrat en verre et entre les particules conductrices ou semiconductrices inférieures au micron et le substrat en verre étant sélectionné dans le groupe consistant en un composant de capacitance à l'état de verre, un composant d'inductance à l'état de verre, un composant suppresseur de tension à l'état de verre et un composant de thermistance à l'état de verre.
  2. Matériau absorbant des impulsions parasites selon la revendication 1, le composant de capacitance à l'état de verre comprenant du verre au silicate, du verre à l'aluminosilicate, du verre au borate et du verre au phosphate avec des caractéristiques de capacitance et du BaTiO3, du SrTiO3, du CaTi O3 et du TiO2.
  3. Matériau absorbant des impulsions parasites selon la revendication 1, le composant d'inductance à l'état de verre comprenant une série de matériau d'inductance au Ni-Zn, au Ni-Cu-Zn avec caractéristiques d'inductance et un matériau CCBT.
  4. Matériau absorbant des impulsions parasites selon la revendication 1, le composant suppresseur de tension à l'état de verre comprenant du BaTiO3, du PZT et du PLZT avec des caractéristiques de suppression de surtension électrique.
  5. Matériau absorbant des impulsions parasites selon la revendication 1, le composant de thermistance à l'état de verre comprenant un système au Mn-Ni, au Mn-Co-Ni avec des caractéristiques CTN et un système de V-P-Fe avec caractéristique CTR.
  6. Matériau absorbant des impulsions parasites selon la revendication 1, la particule conductrice étant sélectionnée dans le groupe consistant en un ou plusieurs des éléments Pt, Pd, W, Au, Al, Ag, Ni, Cu et les alliages de ceux-ci.
  7. Matériau absorbant des impulsions parasites selon la revendication 1, la particule semiconductrice étant sélectionnée dans le groupe consistant en un ou plusieurs des éléments ZnO, TiO2, SnO2, Si, Ge, SiC, alliage de Si-Ge, InSb, GaAs, InP, GaP, ZnS, ZnSe, ZnTe, SrTiO3 et BaTiO3.
EP20070108466 2007-05-18 2007-05-18 Matériel absorbant des impulsions parasites avec une fonction électrique supplémentaire Not-in-force EP1993109B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP20070108466 EP1993109B1 (fr) 2007-05-18 2007-05-18 Matériel absorbant des impulsions parasites avec une fonction électrique supplémentaire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP20070108466 EP1993109B1 (fr) 2007-05-18 2007-05-18 Matériel absorbant des impulsions parasites avec une fonction électrique supplémentaire

Publications (2)

Publication Number Publication Date
EP1993109A1 EP1993109A1 (fr) 2008-11-19
EP1993109B1 true EP1993109B1 (fr) 2014-06-04

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EP20070108466 Not-in-force EP1993109B1 (fr) 2007-05-18 2007-05-18 Matériel absorbant des impulsions parasites avec une fonction électrique supplémentaire

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103971866B (zh) * 2014-05-20 2017-04-12 立昌先进科技股份有限公司 一种具滤波结构的变阻器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4726991A (en) * 1986-07-10 1988-02-23 Eos Technologies Inc. Electrical overstress protection material and process
KR100371056B1 (ko) * 2000-10-09 2003-02-06 한국과학기술연구원 ＳｒＴｉＯ3계 ＳＭＤ형 바리스터-캐패시터 복합기능소자제조기술
ATE403935T1 (de) * 2004-04-06 2008-08-15 Abb Research Ltd Elektrisches nichtlineares material für anwendungen mit hoher und mittlerer spannung

Also Published As

Publication number Publication date
EP1993109A1 (fr) 2008-11-19

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