EP1839154A1 - Systeme et procede d'effacement de support d'enregistrement non volatil - Google Patents

Systeme et procede d'effacement de support d'enregistrement non volatil

Info

Publication number
EP1839154A1
EP1839154A1 EP04813277A EP04813277A EP1839154A1 EP 1839154 A1 EP1839154 A1 EP 1839154A1 EP 04813277 A EP04813277 A EP 04813277A EP 04813277 A EP04813277 A EP 04813277A EP 1839154 A1 EP1839154 A1 EP 1839154A1
Authority
EP
European Patent Office
Prior art keywords
recording medium
volatile recording
erasure
erasure area
area identifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04813277A
Other languages
German (de)
English (en)
Other versions
EP1839154A4 (fr
Inventor
Peter Teac Aerospace Technologies JENSEN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TEAC Aerospace Technologies Inc
Original Assignee
TEAC Aerospace Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TEAC Aerospace Technologies Inc filed Critical TEAC Aerospace Technologies Inc
Publication of EP1839154A1 publication Critical patent/EP1839154A1/fr
Publication of EP1839154A4 publication Critical patent/EP1839154A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/62—Protecting access to data via a platform, e.g. using keys or access control rules
    • G06F21/6209—Protecting access to data via a platform, e.g. using keys or access control rules to a single file or object, e.g. in a secure envelope, encrypted and accessed using a key, or with access control rules appended to the object itself
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/062—Securing storage systems
    • G06F3/0623—Securing storage systems in relation to content
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G06F3/0676—Magnetic disk device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2143—Clearing memory, e.g. to prevent the data from being stolen
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

Definitions

  • the disclosure relates to secure and efficient erasure of data.
  • the disclosure relates to erasure of data that is stored on a recording medium.
  • the non-volatile recording medium controller constructs a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writes at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • the erasure area identifier or the data pattern are pre-stored in a storage device, the storage device coupled with the processor in the computing device.
  • the data pattern is randomly generated or inputted by the user.
  • the processor in the computing device a signal indicative of a status of the data in the erasure area of the non-volatile recording medium.
  • a method of securely erasing data from a non-volatile recording medium An erasure command is transmitted from a processor in a computing device to a non-volatile recording medium controller.
  • the non-volatile recording medium controller is operably connected with the non-volatile recording medium.
  • a plurality of instructions are constructed to overwrite a plurality of memory locations corresponding to an erasure area identified by a pre-stored erasure area identifier.
  • Each of the instructions writes at least one of the memory locations in the erasure area identified by the pre-stored erasure area identifier with a pre-stored data pattern.
  • the erasure area or the data pattern are pre-stored in the non-volatile recording medium.
  • an erasure command is transmitted from the processor in the computing device to the non-volatile recording medium controller, the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier, each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • a non-volatile recording medium erasure system There is a processor in a computing device that transmits an erasure area identifier, a data pattern and an erasure command.
  • the data pattern can being transmitted a single time or a number of times which is less than the number of memory locations in the plurality of memory locations in the erasure area. In another aspect, if the erasure area identifier is zero, all memory locations in the non-volatile recording medium are written with the data pattern.
  • the non-volatile recording medium controller constructing a plurality of instructions to overwrite the plurality of memory locations in the erasure area identified by the erasure area identifier. Each of the instructions writing at least one of the memory locations in the erasure area identified by the erasure area identifier with the data pattern.
  • Figure 1 A illustrates a computing system for securely erasing data stored in a non-volatile recording medium.
  • Figure 3 illustrates a flow diagram of a non-volatile recording medium erasure.
  • the method and system described below provide faster erasure of data stored on non-volatile recording media than previously seen.
  • erasure of data on a non-volatile recording medium involves the use of a data pattern.
  • the data pattern is usually sent to the non-volatile recording medium every time a memory location is overwritten.
  • a large number of transfers of the data pattern is usually required because a secure erase generally involves overwriting thousands, if not millions, of memory locations on the non-volatile recording medium.
  • the transfer of each data pattern to the non-volatile recording medium requires a significant amount of time.
  • the method and system described below reduces the amount of time needed to perform a secure erasure by reducing the number of transfers of the data pattern to the non-volatile recording medium.
  • the input/output device 150 can be a keyboard, a mouse, a touchpad, a joystick, a touch-screen, a voice recognition system, etc.
  • the computing device 140 can be a personal computer, a laptop, a cellular phone, a personal data assistant, a media player, a media recorder, a server, a digital video recorder, an embedded control system in a media recorder, an embedded control system in a digital video recorder, an embedded control system in any other electrical device, etc.
  • the erasure message can include an erasure command, a data pattern, and an erasure area identifier.
  • the CPU 110 generates the data pattern.
  • the data pattern is randomly generated from a random number generator.
  • the CPU 110 has a random number generator.
  • the user inputs the data pattern.
  • the erasure area identifier specifies a collection of memory locations in the storage module 125 where the data to be erased resides.
  • the erasure area identifier is either inputted by the user or generated by the CPU 110.
  • a user may input the name of a file to be deleted.
  • the CPU 110 can search the corresponding address of the file in the nonvolatile recording medium.
  • the CPU 110 can then generate the erasure area identifier based on the size of the file and the starting address in the non-volatile recording medium.
  • the erasure area identifier may define the erasure area in various manners.
  • the erasure area identifier can be a list of memory locations.
  • the erasure area identifier can be a starting memory location and an ending memory location.
  • the erasure area identifier can be a starting memory location and a memory location count.
  • the erasure area identifier can be a flag which indicates that all the writeable locations on the storage module 125 are to be written with the data pattern.
  • the data pattern would normally have to be transferred to the non-volatile recording medium sixty billion times. If the data pattern is only transferred once, the transfer time becomes negligible. The total erasure time is then reduced to the amount of time it takes to write the data in the non-volatile recording medium. In this particular example, the total erasure time is reduced by fifteen minutes. Furthermore, in this example, fifteen minutes would be saved for each additional data pattern used. Thus, if a secure erase requires three data patterns to be used as part of the erasure, 0x55, OxAA, OxFF, the total time saved would be forty-five minutes.
  • the CPU 110 sends multiple erasure messages to the controller 120.
  • all erasure messages contain the same data pattern but different erasure area identifiers.
  • the number of erasure messages is less than the number of total memory locations to be overwritten.
  • the controller 120 receives a first erasure message with a first erasure area identifier and a first data pattern.
  • the controller 120 starts writing the first data pattern on the memory locations of the storage module 120 specified by the first erasure area identifier.
  • the controller 120 receives a second message with a second erasure area and the first data pattern.
  • the number of messages sent to the controller is less than the sum of the number of memory locations in the erasure area of the storage module 125 specified by the erasure area identifier. Therefore, the total transfer time is reduced because not every memory location requires a transfer.
  • multiple erasure messages can contain the same erasure area identifier but different data patterns. For instance, a first erasure message can overwrite a rage of memory locations with a first data pattern while a second erasure message can erase the same set of memory locations with a second data pattern to ensure a secure erasure with multiple data patterns.
  • the first erasure message can overwrite a first range of memory locations, with the first data pattern, and the second erasure message can overwrite a second range of memory locations with the second data pattern.
  • the controller 120 can write to multiple locations at a time. In one embodiment, the controller 120 starts writing the second erasure area before the first erasure command is completed. As a result of the controller 120 simultaneously writing to multiple memory locations of the storage module 125, the time needed to overwrite the data stored in the memory locations is further reduced.
  • the erasure message is then transmitted to the hard disk controller 120 in the hard disk drive 130.
  • the hard disk controller 120 parses the erasure message and identifies the parameters contained in the erasure message such as the erasure command, the data pattern, and the erasure area identifier.
  • the erasure area identifier can be stored in registers 202 through 206.
  • registers 202 through 206 contain a starting address and a sector count.
  • the starting address can be defined by a combination of a cylinder number, a head number and a sector number.
  • the head number is stored in register 206 containing the drive information in bits 1-4, and containing the head information in bit 0.
  • the cylinder information is contained in a cylinder high register 205 for a cylinder high parameter; a cylinder low register 204 for a cylinder low parameter.
  • the cylinder number uses one or both registers depending on the length of the cylinder.
  • a sector number register 203 indicates the first sector for writing.
  • Figure 3 illustrates a process 300 of erasing data from non-volatile recording medium.
  • the data pattern is set.
  • the data pattern can be set by user input, computer random generation, computer calculation, etc.
  • the erasure area identifier is set.
  • the set erasure area identifier, the set data pattern, and an erasure command are transmitted to the non-volatile recording medium.
  • the data pattern, the erasure command and the erasure area identifier are transmitted to a hard disk drive controller.
  • the data pattern, the erasure command and the erasure area identifier are transmitted to a flash memory controller.
  • all three components can be transmitted together in a single erasure message.
  • a subcombination of the three components can be transmitted in a single erasure message.
  • a construction instruction is performed at process block 318.
  • the construction instruction creates a write instruction that includes the memory address to be overwritten, the data pattern used, and a write command.
  • the write instruction is interpreted and the data pattern is written to the memory location indicated by the write instruction.
  • a decision block 325 logic is utilized to decide whether to continue writing or not. To accomplish this, the erasure area identifier is examined to determine whether there are remaining locations in the erasure area to write the data pattern. If there are remaining locations in the erasure area, another write instruction is constructed by process block 318 and executed by process block 320. After the write instruction is executed at process block 320, the erasure area identifier is examined again at decision block 325 to determine whether there are any more locations to write the data pattern. If so, another write instruction is constructed and execute on the next memory location, and so on.
  • a counter may be used and initialized with a value equivalent to the memory location count value. The counter can then be decreased every time a memory location is written with the data pattern. If the counter value is zero, then there are no more memory locations to be written over. In another embodiment, the counter can be initialized with a value of zero, and increased by a value of one every time a memory location is written with the data pattern. If the counter value is equivalent to the number of memory locations in the erasure area then there are no more memory locations to be written over. [0048] Once all memory locations have been written over, a status signal can be sent at process block 330 from the non-volatile recording medium indicating that the secure erase has been successful. In one embodiment, the CPU receives the status signal.

Abstract

La présente invention concerne un procédé et un système d'effacement de données sur un support d'enregistrement non volatil. Un tel système comporte une unité centrale, ainsi qu'un support d'enregistrement non volatil et son contrôleur. Le procédé consiste à envoyer en une seule fois au support d'enregistrement non volatil la séquence de données à utiliser pour la commande d'effacement. Cela permet de ramener à un minimum la quantité de données transférées vers le contrôleur. A la réception de la commande d'effacement, le contrôleur écrase les données de la zone d'effacement au moyen de la séquence de données.
EP04813277A 2004-12-06 2004-12-06 Systeme et procede d'effacement de support d'enregistrement non volatil Withdrawn EP1839154A4 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2004/040940 WO2006062511A1 (fr) 2004-12-06 2004-12-06 Systeme et procede d'effacement de support d'enregistrement non volatil

Publications (2)

Publication Number Publication Date
EP1839154A1 true EP1839154A1 (fr) 2007-10-03
EP1839154A4 EP1839154A4 (fr) 2008-07-09

Family

ID=36578211

Family Applications (1)

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EP04813277A Withdrawn EP1839154A4 (fr) 2004-12-06 2004-12-06 Systeme et procede d'effacement de support d'enregistrement non volatil

Country Status (6)

Country Link
EP (1) EP1839154A4 (fr)
JP (1) JP2008523468A (fr)
AU (1) AU2004325580A1 (fr)
CA (1) CA2591333A1 (fr)
IL (1) IL183682A0 (fr)
WO (1) WO2006062511A1 (fr)

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Also Published As

Publication number Publication date
CA2591333A1 (fr) 2006-06-15
EP1839154A4 (fr) 2008-07-09
WO2006062511A1 (fr) 2006-06-15
AU2004325580A1 (en) 2006-06-15
JP2008523468A (ja) 2008-07-03
IL183682A0 (en) 2007-09-20

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