EP1784863A1 - Module de semi-conducteurs de puissance - Google Patents

Module de semi-conducteurs de puissance

Info

Publication number
EP1784863A1
EP1784863A1 EP05754424A EP05754424A EP1784863A1 EP 1784863 A1 EP1784863 A1 EP 1784863A1 EP 05754424 A EP05754424 A EP 05754424A EP 05754424 A EP05754424 A EP 05754424A EP 1784863 A1 EP1784863 A1 EP 1784863A1
Authority
EP
European Patent Office
Prior art keywords
power semiconductor
substrates
substrate
bottom plate
semiconductor module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05754424A
Other languages
German (de)
English (en)
Inventor
Thomas NÜBEL
Oliver Schilling
Reinhold Spanke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EUPEC GmbH
Original Assignee
EUPEC GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EUPEC GmbH filed Critical EUPEC GmbH
Publication of EP1784863A1 publication Critical patent/EP1784863A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the power semiconductor module includes
  • the invention relates to a power semiconductor module with a thermally conductive bottom plate, on which at least four substrates are arranged, each substrate carrying at least one operating heat-dissipating power semiconductor component.
  • semiconductor modules for switching high currents or high powers (hereinafter: power semiconductor modules)
  • one or more semiconductor components (hereinafter also referred to as semiconductor chips) are usually applied to e.g. assembled from ceramic substrates.
  • a power semiconductor module with a metallic bottom plate is disclosed in EP 0 584 668 A1.
  • a plurality of substrates are symmetrically applied, which are electrically insulated from the bottom plate by an insulating layer lying therebetween.
  • On the interconnects a plurality of power semiconductors connected in parallel are arranged symmetrically. The bottom plate can be pressed against the heat dissipation to a cooling surface not described in detail.
  • EP 0 584 668 A1 addresses the problem of asymmetrical parasitic inductances in the case of unequal current paths. A structure of semiconductor devices on separate substrates, their mounting on a common base plate and their optimal cooling are not addressed.
  • the power semiconductor module according to the invention thus comprises four or more substrates, on each of which at least one semiconductor component is connected. These substrates are in turn in good heat-conducting contact with the top of the bottom plate.
  • An essential aspect of the invention is that the substrates are arranged in only one row. This allows a relatively substrate-like action of the pressure devices on the bottom plate.
  • Pressure devices Eg spring-loaded fasteners but also Siri ⁇ gangsbohrungen for mounting screws into consideration.
  • the pressure devices provided on both longitudinal sides of the bottom plate parallel to the substrate row can therefore press the bottom plate particularly homogeneously and with little tension on a suitable cooling surface.
  • the cooling surface can be, for example, a surface of an air- or liquid-cooled heat sink.
  • the underside of the bottom plate can thus be designed plan; namely, it does not have to cause any, or at least no such great compensation of the distances of the pressure devices to the substrates or their heat-generating power semiconductors, since these distances can be realized in any case significantly less than in the embodiment described above.
  • each substrate preferably a plurality of power semiconductors may be electrically connected in parallel and the power semiconductor circuits thus constructed on the substrates may also be electrically connected in parallel. This makes it possible to switch particularly high currents.
  • the substrates can be known per se known circuit variants such. Single switch, dual switch or full bridge circuits by the Substrat ⁇ layout or be realized by a corresponding interconnection.
  • the substrates have a substantially angular shape and that in the region of each substrate corner a pressure device is provided and / or that in each case in the middle area of the substrate longitudinal edges opposite, edge-near pressure devices are provided. This results in a particularly uniform introduction of the pressure forces, which ensures low and homogeneous mechanical loading of the bottom plate or the substrates with minimized thermal resistance to the cooling surface.
  • Figure 1 an inventive power semiconductor module in supervision
  • FIG. 2 heat conduction-relevant distances in the case of a multi-row power semiconductor module compared to a module according to the invention in comparison.
  • FIG. 1 shows a power semiconductor module 1 with a total of six electrically insulating substrates 2, 3, 4, 5, 6, 7.
  • the substrates have a substantially identical layout, wherein a plurality of semiconductor components in the form of semiconductor chips (eg 8, 9) are arranged on each substrate and are electrically connected via bonding wires, not shown.
  • the substrates are in turn connected in parallel in a manner not shown in detail.
  • the substrates are mounted on the top 10 of a common base plate 11 made of copper or a metallic composite material (eg Al-SiC), arranged in a single row 12.
  • the bottom plate 11 has contact pressure devices on its longitudinal sides IIa, IIb in two rows 13, 14 running close to the substrate, which are known to be regular spaced holes 15, 16 are realized. Through these holes penetrate screws, not shown, with which the power semiconductor module can be screwed onto the surface of a (not shown ge) heat sink.
  • the substrates have a substantially rectangular shape and are thus positioned or the bores are produced such that a bore 15, 16 is located in the region of each substrate corner (for example 2a, 2b, 2c, 2d).
  • bores 15 ', 16 may alternatively or additionally be provided in the respective central region (eg 17, 18 of the substrate 3) of the respective longitudinal edge 19, 20 of the substrate 3 This ensures that the contact forces and thus the contact pressure are introduced close to the substrate, which are produced by the screws penetrating through the bores 15, 16 or 15 ", 16".
  • FIG. 2 shows a schematic detail of the conditions in a power semiconductor module 1 according to the invention (left part) and in a module 1 'with substrates (right part) arranged in two rows 21, 22 and two corresponding rows of pressing devices 25, 26.
  • the relevant distance (a) is only about 70% of the corresponding distance (b) in the power semiconductor module 1 "with a double-row arrangement of the substrates This is the reason for the substantially improved initiation of the contact pressure devices generated contact pressure and the significantly reduced mechanical load of Boden ⁇ plate or substrates.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'invention concerne un module de semi-conducteurs de puissance (1) comprenant une plaque de base (11) thermoconductrice, sur laquelle sont disposés au moins trois substrats (2, 3, 4, 5, 6, 7). Chaque substrat portant au moins un composant semi-conducteur de puissance (8, 9) dégageant une chaleur d'exploitation. L'invention vise à optimiser un module de semi-conducteurs de puissance de ce type, en termes de sollicitation mécanique et de dégagement de chaleur. A cet effet, les substrats (2, 3, 4, 5, 6, 7) sont disposés sur la plaque de base (11), sur une rangée (12) et des dispositifs d'application par compression (15, 16) sont prévus sur les deux grands côtés (11a, 11b) de la plaque de base (11), parallèlement à la rangée (12), à proximité du substrat, lesdits dispositifs servant à comprimer la plaque de base (11) sur une surface de refroidissement.
EP05754424A 2004-09-01 2005-05-20 Module de semi-conducteurs de puissance Withdrawn EP1784863A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004042367A DE102004042367B4 (de) 2004-09-01 2004-09-01 Leistungshalbleitermodul
PCT/EP2005/005505 WO2006024330A1 (fr) 2004-09-01 2005-05-20 Module de semi-conducteurs de puissance

Publications (1)

Publication Number Publication Date
EP1784863A1 true EP1784863A1 (fr) 2007-05-16

Family

ID=34970880

Family Applications (1)

Application Number Title Priority Date Filing Date
EP05754424A Withdrawn EP1784863A1 (fr) 2004-09-01 2005-05-20 Module de semi-conducteurs de puissance

Country Status (5)

Country Link
US (1) US7968988B2 (fr)
EP (1) EP1784863A1 (fr)
JP (1) JP4759716B2 (fr)
DE (1) DE102004042367B4 (fr)
WO (1) WO2006024330A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10352671A1 (de) 2003-11-11 2005-06-23 eupec Europäische Gesellschaft für Leistungshalbleiter mbH Leistungsmodul
JP5550225B2 (ja) * 2008-09-29 2014-07-16 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置
DE112016003111B4 (de) * 2015-07-09 2024-07-18 Mitsubishi Electric Corporation Leistungs-halbleitermodul
CN111052357B (zh) 2018-03-20 2023-12-19 富士电机株式会社 半导体装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1104025A1 (fr) * 1999-05-11 2001-05-30 Mitsubishi Denki Kabushiki Kaisha Dispositif a semi-conducteur
WO2003021680A2 (fr) * 2001-09-01 2003-03-13 Eupec Gmbh Module de puissance a semi-conducteur

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0584668B1 (fr) * 1992-08-26 1996-12-18 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Module semi-conducteur de puissance
DE4338107C1 (de) 1993-11-08 1995-03-09 Eupec Gmbh & Co Kg Halbleiter-Modul
JP3316714B2 (ja) * 1994-05-31 2002-08-19 三菱電機株式会社 半導体装置
EP0710983B1 (fr) * 1994-11-07 2001-02-28 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Module à pont
JP3269745B2 (ja) * 1995-01-17 2002-04-02 株式会社日立製作所 モジュール型半導体装置
KR100272737B1 (ko) * 1998-01-09 2001-01-15 윤종용 릴인쇄회로기판및그를이용한칩온보드패키지
DE19942915A1 (de) * 1999-09-08 2001-03-15 Still Gmbh Leistungshalbleitermodul
US6416332B1 (en) * 2000-12-20 2002-07-09 Nortel Networks Limited Direct BGA socket for high speed use
JP3997730B2 (ja) * 2001-06-20 2007-10-24 株式会社日立製作所 電力変換装置及びそれを備えた移動体
DE10139287A1 (de) * 2001-08-09 2003-03-13 Bombardier Transp Gmbh Halbleitermodul
DE10231219C1 (de) * 2002-07-11 2003-05-22 Semikron Elektronik Gmbh Druckkontaktiertes Halbleiterrelais
JP4063091B2 (ja) * 2003-01-28 2008-03-19 株式会社日立製作所 パワー半導体モジュール

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1104025A1 (fr) * 1999-05-11 2001-05-30 Mitsubishi Denki Kabushiki Kaisha Dispositif a semi-conducteur
WO2003021680A2 (fr) * 2001-09-01 2003-03-13 Eupec Gmbh Module de puissance a semi-conducteur

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2006024330A1 *

Also Published As

Publication number Publication date
WO2006024330A1 (fr) 2006-03-09
US7968988B2 (en) 2011-06-28
DE102004042367B4 (de) 2008-07-10
JP4759716B2 (ja) 2011-08-31
JP2008511974A (ja) 2008-04-17
US20070205500A1 (en) 2007-09-06
DE102004042367A1 (de) 2006-03-09

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