EP1763119B1 - Steuersignalerzeugungsschaltung und Batterieverwaltungssystem zur Anwendung derselben - Google Patents

Steuersignalerzeugungsschaltung und Batterieverwaltungssystem zur Anwendung derselben Download PDF

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Publication number
EP1763119B1
EP1763119B1 EP06120364A EP06120364A EP1763119B1 EP 1763119 B1 EP1763119 B1 EP 1763119B1 EP 06120364 A EP06120364 A EP 06120364A EP 06120364 A EP06120364 A EP 06120364A EP 1763119 B1 EP1763119 B1 EP 1763119B1
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EP
European Patent Office
Prior art keywords
control signal
level
electrode
control
control signals
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EP06120364A
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English (en)
French (fr)
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EP1763119A3 (de
EP1763119A2 (de
Inventor
Han-Seok Legal & IP Team Samsung SDI Co. Ltd. Yun
Se-Wook Legal & IP Team Samsung SDI Co. Ltd. Seo
Gye-Jong Legal & IP Team Samsung SDI Co. Ltd Lim
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Samsung SDI Co Ltd
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Samsung SDI Co Ltd
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Publication of EP1763119A3 publication Critical patent/EP1763119A3/de
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014—Circuits for equalisation of charge between batteries
    • H02J7/0019—Circuits for equalisation of charge between batteries using switched or multiplexed charge circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L50/00—Electric propulsion with power supplied within the vehicle
    • B60L50/50—Electric propulsion with power supplied within the vehicle using propulsion power supplied by batteries or fuel cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00—Road transport of goods or passengers
    • Y02T10/60—Other road transportation technologies with climate change mitigation effect
    • Y02T10/70—Energy storage systems for electromobility, e.g. batteries

Definitions

  • An aspect of the present invention relates to a battery management system. More particularly, an aspect of the present invention relates to a battery management system of a vehicle utilizing electrical energy.
  • An electric vehicle uses a battery engine run by electrical energy output by a battery. Since the electric vehicle mainly uses a battery formed by one battery pack including a plurality of rechargeable/dischargeable secondary cells, the electric vehicle has no gas emissions and produces less noise.
  • a hybrid vehicle commonly refers to a gasoline-electric hybrid vehicle that uses gasoline to power an internal combustion engine and an electric battery to power an electric motor.
  • hybrid vehicles using an internal combustion engine and fuel cells and hybrid vehicles using a battery and fuel cells have been developed.
  • the fuel cells directly obtain electrical energy by generating a chemical reaction while hydrogen and oxygen are continuously provided.
  • each battery cell Since battery performance directly affects a vehicle using electrical energy, it is required that each battery cell has great performance. Also, it is required to provide a battery management system measuring a voltage and a current of the overall battery to efficiently manage charging/discharging operations of each battery cell.
  • An aspect of the present invention has been made in an effort to provide a battery management system having advantages of more efficiently measuring a battery cell voltage using a small number of elements.
  • a battery management system coupled to a battery formed with one pack having a plurality of battery cells including first and second battery cells may include: a control signal generator outputting a first control signal and second, third, and fourth control signals having a first level at different timing from the first control signal; first and second relays respectively transmitting cell voltages of the first and second battery cells by being turned on in response to the first level of the first and second control signals; a third relay transmitting the cell voltage transmitted through one of the first and second relays in response to the third control signal with the first level; a charging unit storing the cell voltage transmitted from the third relay; a fourth relay transmitting the stored cell voltage of the charging unit in response to the first level of the fourth control signal; and an A/D converter converting the cell voltage transmitted through the fourth relay into digital data, wherein the control signal generator makes the first and second control signals to be a second level excluding the first level when the fourth control signal is the first level and makes the third control signal to be the second level.
  • the control signal generator may include a common electrode having a potential of the second level; a first transistor including a first electrode applied with the first control signal, a second electrode coupled to the common electrode, and a first control electrode applied with the fourth control signal, and electrically connecting the first and second electrodes by being turned on when the fourth control signal is the first level; and a second transistor including a third electrode applied with the second control signal, a fourth electrode coupled to the common electrode, and a second control electrode applied with the fourth control signal, and electrically connecting the third and fourth electrodes by being turned on when the fourth control signal is the first level.
  • the first control signal may be input through a predetermined resistor to the first electrode and the second control signal may be input through a predetermined resistor to the second electrode.
  • the fourth control signal may be input through a predetermined resistor to the first electrode and the fourth control signal may be input through a predetermined resistor to the second electrode.
  • Another battery management system coupled to a battery formed with one pack having a plurality of battery cells including first and second battery cells may include: a control signal generator outputting a first control signal, second, third, and fourth control signals having a first level at different timing from the first control signal, and a fifth control signal shifted from the fourth control signal by a predetermined time; first and second relays respectively transmitting cell voltages of the first and second battery cells by being turned on in response to the first level of the first and second control signals; a third relay transmitting the cell voltage transmitted through one of the first and second relays in response to the third control signal with the first level; a charging unit storing the cell voltage transmitted from the third relay; a fourth relay transmitting the stored cell voltage of the charging unit in response to the first level of the fourth control signal; and an A/D converter converting the cell voltage transmitted through the fourth relay into digital data, wherein the control signal generator makes the first and second control signals to be a second level inverted from the first level when the fourth or fifth control signal is the
  • the control signal generator may include: a common electrode having a potential of the first level; a first transistor including a first electrode applied with the converted first control signal, a second electrode coupled to the common electrode, and a first control electrode applied with the fourth control signal, and electrically connecting the first and second electrodes by being turned on when the converted fourth control signal or the converted fifth control signal is the second level; and a second transistor including a third electrode applied with the converted second control signal and a fourth electrode coupled to the common electrode, and electrically connecting the third and fourth electrodes by being turned on when the converted fourth control signal or the converted fifth control signal is the first level; and an inverter outputting first, second, fourth, and fifth control signals by respectively converting the converted first, second, fourth, and fifth control signals respectively transmitted through the first electrode of the first transistor and the third electrode of the second transistor.
  • the first and second transistors may respectively include first and second control electrodes
  • the converted fourth control signal may be respectively input through the first resistor to the first and second control electrodes
  • the converted fifth control signal may be respectively input through the second resistor to the first and second control electrodes.
  • the control signal generator may further include a circuit unit receiving the fourth and fifth control signals output from the inverter and outputting the third control signal.
  • the circuit unit may be a NAND gate outputting the third control signal of the first level when the fourth and fifth control signals output from the inverter are the second level.
  • the control signal generator may comprise a common electrode having a potential of the first level, a first transistor including a first electrode applied with the first control signal and a second electrode coupled to the common electrode, and electrically connecting the first and second electrodes by being turned on when the fourth control signal or the fifth control signal is the second level; a second transistor including a third electrode applied with the second control signal and a fourth electrode coupled to the common electrode, and electrically connecting the third and fourth electrodes by being turned on when the fourth control signal or the fifth control signal is the first level; and a buffer outputting first, second, fourth, and fifth control signals by respectively receiving the first, second, fourth, and fifth control signals respectively transmitted through the first electrode of the first transistor and the third electrode of the second transistor.
  • the control signal generator may further include a circuit unit receiving the fourth and fifth control signals output from the buffer and outputting the third control signal.
  • the circuit unit may be a NOR gate outputting the third control signal of the first level when the fourth and fifth control signals output from the buffer are the second level.
  • the NOR gate may prevent the first, second and fourth relays from being simultaneously turned on by controlling the first control signal to be on while the second and third control signals are turned off.
  • Yet another battery management system may include a plurality of battery cells, the system comprising a main control unit controlling the operation of the battery cells, a control signal generator connected to the main control unit and transmitting a plurality of control signals, a cell voltage measurer measuring analog voltages of the battery cells based on the control signals transmitted from the control signal generator and outputting analog voltage values of the battery cells, and an analog/digital converter converting the analog voltage values received from the cell voltage measurer into digital data and outputting the digital data to the main control unit, wherein the main control unit prevents a simultaneous transmission of stored cell voltages of the battery cells to the analog/digital converter based on the digital data received from the analog/digital converter.
  • FIG. 1 schematically illustrates a battery, a battery management system (BMS), and peripheral devices thereof.
  • BMS battery management system
  • a BMS 1, a battery 2, a current sensor 3, a cooling fan 4, a fuse 5, and a main switch 6 are included.
  • the current sensor 3 measures an output current amount of the battery 2 and outputs the same to the BMS 1.
  • the cooling fan 4 cools heat generated by the charging/discharging of the battery 2 in response to a control signal of the BMS 1, and prevents the charge/discharge efficiency of the battery 2 from being deteriorated and reduced due to an increase of temperature.
  • the fuse 5 prevents an overflow current due to a disconnection or a short circuit of the battery 2 from being transmitted to a power generator (not shown). That is, when the overflow current occurs, the fuse 5 is disconnected to interrupt the transmission of the overflow current.
  • the main switch 6 turns on/off the battery 2 in response to the control signal of the BMS 1 when an abnormal phenomenon, including an over voltage, an overflow current, and a high temperature, occur.
  • the battery 2 includes eight sub-packs 210 to 280 coupled in series to each other, output terminals 291 and 292, and a safety switch 293 provided between the sub-packs 240 and 250.
  • the sub-pack 210 includes five secondary battery cells coupled in series to each other.
  • the respective sub-packs 220 to 280 each include five secondary battery cells coupled in series to each other, and accordingly, the battery 2 includes a total of 40 battery cells.
  • the sub-packs are expressed as having a group of five secondary batteries.
  • the battery may include 40 secondary battery cells directly coupled to each other without the sub-packs 210 to 280.
  • the output terminals 291 and 292 are coupled to the power generator (not shown) of the vehicle and supply electrical energy to an engine thereof.
  • the safety switch 293 is a switch provided between the sub-packs 240 and 250, and is manually turned on/off so as to protect a worker when the worker replaces or handles the battery. In this embodiment, the safety switch 293 may be provided between the sub-packs 240 and 250, but is not limited thereto.
  • the BMS 1 includes a sensing unit 10, a main control unit (MCU) 20, an internal power supply 30, a cell balance unit 40, a storage unit 50, a communication unit 60, a protection circuit unit 70, a power-on reset unit 80, and an external interface 90.
  • MCU main control unit
  • the BMS 1 includes a sensing unit 10, a main control unit (MCU) 20, an internal power supply 30, a cell balance unit 40, a storage unit 50, a communication unit 60, a protection circuit unit 70, a power-on reset unit 80, and an external interface 90.
  • the sensing unit 10 measures an overall battery pack current, an overall battery pack voltage, each battery cell voltage, each battery cell temperature, and a peripheral temperature, converts the measured values into digital data, and transmits the measured values to the MCU 20.
  • the MCU 20 generates five control signals BANK1_SENSE to BANK5_SENSE (not shown) and two control signals MODULE+_V and MODULE-_V (not shown) and outputs the generated signals to the sensing unit 10, determines a state of charging (SOC) and a state of health (SOH) of the battery 2 based on the measured value transmitted from the sensing unit 10, and controls the charging/discharging of the battery 2.
  • SOC state of charging
  • SOH state of health
  • the internal power supply 30 supplies power to the BMS 1 using a backup battery.
  • the cell balance unit 40 checks a balance of the charging state of each cell. That is, cells of a relatively high charged state may be discharged and cells of a relatively low charged state may be charged.
  • the storage unit 50 stores data of the present SOC, SOH, or the like when the power source of the BMS 1 is turned off.
  • the storage unit 50 may be an EEPROM as an electrically erasable and writable non-volatile memory.
  • the communication unit 60 communicates with a controller (not shown) of the power generator of the vehicle.
  • the protection circuit 70 protects the battery 2 from an external impact, an over-flowed current, or a low voltage by using a firmware.
  • the power-on reset unit 80 resets the overall system when the power source of the BMS 1 is turned on.
  • the external interface 90 couples the BMS auxiliary devices, including the cooling fan 4 and the main switch 6, to the MCU 20.
  • the cooling fan 4 and the main switch 6 are illustrated as the auxiliary device of the BMS 1, but this is not restrictive.
  • FIG. 2 schematically illustrates a sensing unit according to an embodiment of the present invention.
  • the sensing unit 10 includes a control signal generator 110, a cell voltage measurer 120, a pack voltage measurer 130, a pack current measurer 140, a temperature measurer 150, and an A/D converter 160.
  • the control signal generator 110 receives the control signals BANK1_SENSE to BANK5_SENSE, and MODULE+_V, and MODULE-_V from the MCU 20 and transmits the control signals BANK1_SENSE to BANK5_SENSE, MODULE+_V, and MODULE-_V, and MODULE_SW_1 to MODULE_SW_4 (see FIG. 3 ) to the cell voltage measurer 120.
  • the cell voltage measurer 120 measures analog voltages of the 40 battery cells 211 to 285 of the battery 2 and outputs the measured analog voltages to the A/D converter 160 based on the control signals BANK1_SENSE to BANK5_SENSE, MODULE+_V, and MODULE-_V, and MODULE_SW_1 to MODULE_SW_4 transmitted from the control signal generator 110.
  • the pack voltage measurer 130 measures an analog voltage value between the output terminals 291 and 292 of the battery 2 (see FIG. 1 ) and outputs the measured analog voltage to the A/D converter 160.
  • the pack current measurer 140 receives the current value measured from the current sensor 3 (see FIG. 1 ), converts the received current value into an analog voltage signal, and outputs the converted value to the A/D converter 160.
  • the temperature measurer 150 measures temperatures of the battery 2 and the surrounding environment thereof in digital values and outputs the measured digital values to the MCU 20.
  • the A/D converter 160 converts the analog values received from the cell voltage measurer 120, the pack voltage measurer 130, and the pack current measurer 140 into digital data and outputs the converted digital data to the MCU 20 (see FIG. 1 ).
  • the A/D converter 160 includes 10 input terminals and sequentially converts each analog data input from the input terminal into each digital data.
  • eight input terminals (referred to as first to eighth input terminals) among the 10 input terminals are coupled to the output terminal of the cell voltage measurer 120, another input terminal (referred to as a ninth input terminal) is coupled to the pack voltage measurer 130, and the remaining input terminal (referred to as a tenth input terminal) is coupled to the pack current measurer 140.
  • FIG. 3 illustrates in detail a cell voltage measurer.
  • the sub-packs 230 to 270 provided between the sub-packs 220 and 280 are not illustrated for simplification and clarification of the drawing.
  • charging relays 121c to 121 g, leakproof relays 122c to 122g, charging units 123c to 123g, transmitting units 124c to 124g, and buffers 125c to 125g are not illustrated for a brief drawing.
  • the control signal generator 110 receives the five control signals BANK1_SENSE to BANK5_SENSE and the two control signals MODULE+_V and MODULE-_V, that is, a total of 7 control signals from the MCU 20 and outputs the control signals BANK1_SENSE to BANK5_SENSE, the control signals MODULE+_V and MODULE-_V, and the control signals MODULE_SW_1 to MODULE_SW_4 to the cell voltage measurer 120.
  • the cell voltage measurer 120 includes the charging relays 121 a to 121h respectively coupled to the respective sub-packs 210 to 280, the leakproof relays 122a to 122h, the charging units 123a to 123h, the transmitting units 124a to 124h, and the buffers 125a to 125h.
  • the charging relay 121 a includes five cell relays 121a_1 to 121a_5, which are respectively on/off based on the five control signals BANK1_SENSE to BANK5_SENSE output from the control signal generator 110.
  • the cell relay 121a_1 is coupled to a negative terminal 121- and a positive terminal 121+ of the cell 211, and is turned on based on the input control signal BANK1_SENSE and transmits a voltage of the cell 211.
  • the cell relay 121a_2 is coupled to a negative terminal 122- and a positive terminal 122+ of the cell 212, and is turned on based on the input control signal BANK2_SENSE and transmits a voltage of the cell 212.
  • the cell relays 121a_3 to 121a_5 are turned on based on the input control signals BANK3_SENSE to BANK5_SENSE and transmit a voltage of the cells 213 to 215.
  • the leakproof relay 122a transmits a voltage output from the charging relay 121 a to the charging unit 123a based on the control signal MODULE_SW transmitted from the control signal generator 110.
  • the leakproof relays 122a to 122h may be operated based on one of the four control signals MODULE_SW_1 to MODULE_SW_4.
  • the leakproof relays 122a and 122e are operated based on the control signal MODULE SW_1
  • the leakproof relays 122b and 122f are operated based on the control signal MODULE_SW_2
  • the leakproof relays 122c and 122g are operated based on the control signal MODULE_SW_3
  • the leakproof relays 122d and 122h are operated based on the control signal MODULE_SW_4.
  • a current amount of the control signal MODULE_SW_1 may be reduced.
  • the charging unit 123a includes at least one capacitor and is charged with the cell voltage transmitted from the leakproof relay 122a.
  • the transmitting unit 124a is turned on based on the two control signals MODULE+_V and MODULE-_V transmitted from the control signal generator 110 and outputs the cell voltage stored in the charging unit 123a to the buffer 125a. That is, the transmitting unit 124a is turned on and transmits a cell voltage to the buffer 125a when both the control signals MODULE+_V and MODULE-_V are given as a high level.
  • the buffer 125a clamps the cell voltage output from the transmitting unit 124a in the range of a predetermined voltage and outputs the clamped voltage to the first input terminal of the A/D converter 160.
  • each structure and operation of the charging relays 121 b to 121 h, the leakproof relays 122b to 122h, the charging units 123b to 123h, the transmitting units 124b to 124h, and the buffers 125b to 125h is respectively the same as that of the charging relay 121 a, the leakproof relay 122a, the charging unit 123a, the transmitting unit 124a, and the buffer 125a. Accordingly, each structure and operation thereof will be not described.
  • FIG. 4 is a timing diagram of a waveform of a control signal input from a control signal generator to a cell voltage measurer according to a first embodiment of the present invention.
  • FIG. 4 briefly illustrates the time T2 shorter than the actual length although a time T2 must be illustrated longer than a time T1 because the time T2 corresponds to about 20 times the time T1.
  • the control signals BANK1_SENSE and MODULE SW_1 are given as the high level and the control signals BANK2_SENSE to BANK5_SENSE, MODULE+_V and MODULE-_V are given as the low level. Accordingly, the cell relay 121 a_1 of the charging relay 121 a is turned on by the high level of the control signal BANK1_SENSE, and leakproof relays 122a is turned on by the high level of the control signal MODULE_SW_1. The cell relays 121a_2 to 121a_5 are turned off by the low level of the control signals BANK2_SENSE to BANK5_SENSE.
  • the transmitting unit 124a is turned off since both the control signals MODULE+_V and MODULE-_V are given as the low level. Accordingly, a voltage of the cell 211 is stored in the charging unit 123a through the charging relay 121 a and the leakproof relay 122a.
  • the cell relays 121b_1, 121c_1, 121d_1, 121e_1, 121f_1, 121g_1, and 121h_1 and the leakproof relays 122b, 122c, 122d, 122e, 122f, 122g, and 122h are turned on so that the voltages of the cells 221, 231, 241, 251, 261, 271, and 281 are respectively stored in the charging units 123b, 123c, 123d, 123e, 123f, 123g, and 123h.
  • the control signals BANK1_SENSE to BANK5_SENSE and MODULE_SW_1 are given as the low level. Accordingly, the cell relay 121a_1 and the leakproof relay 122a are turned off.
  • the transmitting unit 124a is turned on by the high level of the control signal MODULE so that the voltage of the cell 211 stored in the charging unit 123a is transmitted through the buffer 125a to a first input terminal of the A/D converter 160.
  • the voltages of the cells 221, 231, 241, 251, 261, 271, and 281 respectively stored in the charging units 123b, 123c, 123d, 123e, 123f, 123g, and 123h are transmitted by the transmitting units 124b, 124c, 124d, 124e, 124f, 124g, and 124h through the buffers 125b, 125c, 125d, 125e, 125f, 125g, and 125h to the second to eighth input terminals of the A/D converter 160.
  • the ninth and tenth input terminals of the A/D converter 160 receive the outputs of the pack voltage measurer 130 and the pack current measurer 140.
  • the A/D converter 160 sequentially reads the first input terminal, the second input terminal, the ninth input terminal, the tenth input terminal, the third input terminal, the fourth input terminal, the ninth input terminal, the tenth input terminal, the fifth input terminal, the sixth input terminal, the ninth input terminal, the tenth input terminal, the seventh input terminal, the eighth input terminal, the ninth input terminal, and the tenth input terminal (a total of 16 times) and changes the read data into digital data during the time Ton.
  • the cell voltages of the first battery cells respectively included in the eight sub-packs 210 to 280 during the times T1 and T2 may be measured.
  • each cell voltage of each of the second battery cells 212 to 282, third battery cells 213 to 283, fourth battery cells 214 to 284, and fifth battery cells 215 to 285 included in the eight sub-packs 210 to 280 may be measured during the times T3 and T4, times T5 and T6, times T7 and T8, and times T9 and T10.
  • the A/D converter 160 outputs the cell voltages of the 40 cells measured in this manner to the MCU 20 (see FIG. 1 ). As such, the cell voltages of the battery 2 may be exactly and finely measured.
  • a control signal generator according to a first embodiment of the present invention will be described with reference to FIG. 5 to FIG. 7 .
  • FIG. 5 illustrates in detail a control signal generator according to the first embodiment of the present invention
  • FIG. 6 is a timing diagram of a control signal changed by a transistor of FIG. 5
  • FIG. 7 is a timing diagram showing an operation of a NOR gate of FIG. 5 .
  • the control signal generator 110 includes five resistors 111 a to 111 e, five resistors 112a to 112e, two resistors 113 and 114, five transistors 115a to 115e, a buffer 116, and a NOR gate 117.
  • the five resistors 111a to 111e are for respectively stabilizing voltage amplitude of the five control signals BANK1_SENSE to BANK5_SENSE input from the MCU 20.
  • the five resistors 112a to 112e are for respectively stabilizing current amplitude of the five control signals BANK1_SENSE to BANK5_SENSE input from the MCU 20.
  • the two resistors 113 and 114 transmit the voltages of the control signals MODULE+_V and MODULE-_V input from the MCU 20 to a base electrode B of the five transistors 115a to 115e.
  • the transistor 115a is turned on when the base electrode B thereof is applied with a predetermined current through the resistors 113 and 114 during the times T2, T4, T6, T8, and T10 during which at least one of the control signals MODULE+_V and MODULE-_V is given as the high level. Accordingly, the control signal BANK1_SENSE is forcibly given as the low level because the current flows from a collector C to an emitter E. For example, as shown in FIG. 6 , when the error and the delay of the signal transmission are generated at the MCU 20 (see FIG.
  • the control signal BANK1_SENSE is changed into the signal BANK1_SENSE_err and the changed signal is transmitted to the control signal generator 110, the high level of the signal BANK1_SENSE_err is forcibly corrected to the low level of the signal BANK1_SENSE_col during a time Terr1 of the time T2.
  • the time Ton during which the transmitting unit 124a is turned on by the high level of the control signals MODULE+_V and MODULE-_V is not overlapped with the time during which the charging relay 121a_1 is turned on by the high level of the signal BANK1_SENSE_col.
  • the transistor 115b is turned on when the predetermined voltage is applied to the base electrode B thereof through the resistors 113 and 114 during the times T2, T4, T6, T8, and T10 during which at least one of the control signals MODULE+_V and MODULE-_V is given as the high level. Accordingly, the control signal BANK2_SENSE is forcibly given as the low level because the current is flown from the collector C to the emitter E. For example, as shown in FIG. 6 , when the error and the delay of the signal transmission are generated at the MCU 20 (see FIG.
  • the control signal BANK2_SENSE is changed into the signal BANK2_SENSE_err and the changed signal is transmitted to the control signal generator 110, the high level of the signal BANK2_SENSE_err is forcibly corrected to the low level of the signal BANK2_SENSE_col during times Terr2 and Terr3 of the times T2 and T4.
  • the time Ton during which the transmitting unit 124a is turned on by the high level of the control signals MODULE+_V and MODULE-_V is not overlapped with the time during which the charging relay 121a_2 is turned on by the high level of the signal BANK2_SENSE_col.
  • the transistors 115c to 115e are turned on during the times T2, T4, T6, T8, and T10, and accordingly, the respective control signals BANK3_SENSE to BANK5_SENSE are forcibly given as the low level.
  • the buffer 116 receives the control signals BANK1_SENSE to BANK5_SENSE respectively amended by the transistors 115a to 115e, performs buffering thereof, and outputs the buffered control signals to the charging relays 121 a to 121h, and also receives the control signals MODULE+_V and MODULE-_V, performs buffering thereof, and outputs the buffered control signals to the transmitting units 124a to 124h.
  • the NOR gate 117 receives the control signals MODULE+_V and MODULE-_V, generates the 4 control signals MODULE_SW_1 to MODULE_SW_4, and outputs the same 4 control signals MODULE_SW_1 to MODULE_SW_4 to the leakproof relays 123a to 123h. As shown in FIG. 7 , the NOR gate 117 outputs the 4 control signals MODULE_SW_1 to MODULE_SW_4 to be high level when both the control signals MODULE+_V and MODULE-_V are given as the low level.
  • the control signal generator prevents all the control signals MODULE+_V, MODULE-_V and BANK1_SENSE to BANK5_SENSE from simultaneously being high level by turning off the five transistors by forcibly changing the control signals BANK1_SENSE to BANK5_SENSE to be off (low level) when at least one of the control signals MODULE+_V and MODULE-_V is given as on (high level). Since the charging relays 121 a to 121 h and the transmitting units 124a to 124h are not simultaneously turned on, the cell voltages may be more exactly and reliably measured.
  • control signal generator prevents the leakproof relays 122a to 122h and the transmitting units 124a to 124h from being simultaneously turned on by generating the four control signals MODULE_SW_1 to MODULE_SW_4 to be turned on when both the control signals MODULE+_V and MODULE-_V are off by using the NOR gate. Accordingly, the cell voltages may be reliably measured.
  • a BMS according to a second embodiment of the present invention will be described in detail with reference to FIG. 8 to FIG. 10 .
  • the BMS according to the second embodiment has the same structure and operation as the cell voltage measurer 120 according to the first embodiment except that the cell voltage measurer is turned on when the charging relay, leakproof relay, and transmitting unit are given as the low level.
  • FIG. 8 is a timing diagram of a waveform of control signals input from a control signal generator to a cell voltage measurer according to a second embodiment of the present invention.
  • the control signal generator 110 receives the five control signals BANK1_SENSE to BANK5_SENSE and the two control signals MODULE+_V and MODULE-_V, that is, a total of 7 control signals from the MCU 20, and outputs control signals /BANK1_SENSE to /BANK5_SENSE, /MODULE+_V and /MODULE-_V, and /MODULE_SW_1 to /MODULE_SW_4 to the cell voltage measurer 120.
  • the control signals /BANK1_SENSE to /BANK5_SENSE, /MODULE+_V and /MODULE-_V, and /MODULE_SW_1 to /MODULE_SW_4 respectively have an inverse phase of the control signals BANK1_SENSE to BANK5_SENSE, MODULE+_V and MODULE-_V, and MODULE_SW_1 to MODULE_SW_4 shown in FIG. 4 .
  • FIG. 9 illustrates in detail a control signal generator according to the second embodiment of the present invention and FIG. 10 is a timing diagram showing an operation of a NAND gate of FIG. 9 .
  • the control signal generator 210 according to the second embodiment is different from the control signal generator 110 according to the first embodiment in that the control signal generator 210 includes an inverter 216 and a NAND gate 217.
  • the five resistors 211 a to 211 e, the five resistors 212a to 212e, the two resistors 213 and 214, and the five transistors 215a to 215e shown in FIG. 9 have the same structures and functions as the five resistors 111 a to 111 e, the five resistors 112a to 112e, the two resistors 113 and 114, and the five transistors 115a to 115e shown in FIG. 5 , and accordingly, are not described in further detail.
  • the inverter 216 receives the control signals BANK1_SENSE to BANK5_SENSE respectively corrected by the transistors 215a to 215e and outputs inverted control signals /BANK1_SENSE to /BANK5_SENSE to the charging relays 121 a to 121h, and also receives the control signals MODULE+_V and MODULE-_V and outputs inverted control signals /MODULE+_V and /MODULE-_V to the transmitting units124a to 124h.
  • the NAND gate 217 receives the control signals /MODULE+_V and /MODULE-_V, generates the 4 control signals /MODULE_SW_1 to /MODULE_SW_4, and outputs the generated control signals /MODULE_SW_1 to /MODULE_SW_4 to the leakproof relays 122a to 122h. As shown in FIG. 10 , the NAND gate 217 outputs the 4 control signals /MODULE_SW_1 to /MODULE_SW_4 to be the low level when the control signals /MODULE+_V and /MODULE-_V are given as the high level.
  • the control signals /BANK1_SENSE to /BANK5_SENSE and the control signals /MODULE+_V and /MODULE-_V may not be simultaneously given as the low level, and the control signals /MODULE+_V and /MODULE-_V and the control signals /MODULE_SW_1 to /MODULE_SW_4 may not be simultaneously given as the low level.
  • the charging relays 121a to 121h and the transmitting units124a to 124h may not be simultaneously turned on and the leakproof relays 122a to 122h and the transmitting units 124a to 124h may not be simultaneously turned on. Accordingly, the cell voltages may be reliably measured.
  • the simultaneous turn-on of the charging relays and the transmitting units transmitting the stored cell voltages of the charging units to the A/D converter may be effectively prevented.
  • the cell voltages may be more reliably measured, and errors of the BMS generated by the simultaneous turn-on of the charging relays and transmitting units may be effectively prevented.
  • the simultaneous turn-on of the leakproof relays, transmitting the cell voltages to the charging units through the charging relays, and of the transmitting units, transmitting the stored cell voltages of the charging units to the A/D converter may be effectively prevented.
  • the cell voltages may be more reliably measured, and errors of the BMS generated by the simultaneous turn-on of the leakproof relays and the transmitting units may be effectively prevented.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Transportation (AREA)
  • Mechanical Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Claims (14)

  1. Ein Batterieverwaltungssystem, das mit einer Batterie verbunden ist, die mit einem Pack mit einer Vielzahl von Batteriezellen einschließlich ersten und zweiten Batteriezellen ausgebildet ist, wobei das Batterieverwaltungssystem Folgendes umfasst:
    einen Steuersignalgenerator, der ein erstes, zweites, drittes und viertes Steuersignal (BANK1_SENSE, BANK2_SENSE, MODULE_SW_1, MODULE+_V) ausgibt, wobei der erste Pegel des dritten und vierten Steuersignals zu jeweils verschiedenen Zeiten auftritt;
    erste und zweite Relais (121_a1, 121a_2 ...), die Zellenspannungen der ersten beziehungsweise zweiten Batteriezellen übertragen, indem sie als Antwort auf den ersten Pegel der ersten und zweiten Steuersignale eingeschaltet sind;
    ein drittes Relais (122a), das als Antwort auf das dritte Steuersignal mit dem ersten Pegel die über eines der ersten und zweiten Relais übertragene Zellenspannung überträgt;
    eine Ladeeinheit (123a), die die von dem dritten Relais übertragene Zellenspannung speichert;
    ein viertes Relais (124a), das als Antwort auf den ersten Pegel des vierten Steuersignals die gespeicherte Zellenspannung der Ladeeinheit überträgt; und
    einen A/D-Wandler, der die durch das vierte Relais übertragene Zellenspannung in digitale Daten umwandelt.
  2. Das Batterieverwaltungssystem nach Anspruch 1,
    wobei der Steuersignalgenerator die ersten und zweiten Steuersignale auf einen zweiten Pegel setzt, der den ersten Pegel ausschließt, wenn das vierte Steuersignal auf dem ersten Pegel ist, und das dritte Steuersignal auf den zweiten Pegel setzt.
  3. Das Batterieverwaltungssystem nach Anspruch 2, wobei der Steuersignalgenerator Folgendes umfasst:
    eine gemeinsame Elektrode, die ein Potential auf dem zweiten Pegel aufweist;
    einen ersten Transistor (115a), der eine erste Elektrode, an die das erste Steuersignal angelegt wird, eine mit der gemeinsamen Elektrode verbundene zweite Elektrode sowie eine erste Steuerelektrode, an die das vierte Steuersignal angelegt wird, beinhaltet und die ersten und zweiten Elektroden leitend verbindet, indem er eingeschaltet ist, wenn das vierte Steuersignal auf dem ersten Pegel ist; und
    einen zweiten Transistor (115b), der eine dritte Elektrode, an die das zweite Steuersignal angelegt wird, eine mit der gemeinsamen Elektrode verbundene vierte Elektrode sowie eine zweite Steuerelektrode, an die das vierte Steuersignal angelegt wird, beinhaltet und die dritten und vierten Elektroden leitend verbindet, indem er eingeschaltet ist, wenn das vierte Steuersignal auf dem ersten Pegel ist.
  4. Das Batterieverwaltungssystem nach Anspruch 3, wobei das erste Steuersignal durch einen vorbestimmten Widerstand der ersten Elektrode eingegeben wird und das zweite Steuersignal durch einen vorbestimmten Widerstand der zweiten Elektrode eingegeben wird.
  5. Das Batterieverwaltungssystem nach Anspruch 3, wobei das vierte Steuersignal durch einen vorbestimmten Widerstand der ersten Elektrode eingegeben wird und das vierte Steuersignal durch einen vorbestimmten Widerstand der zweiten Elektrode eingegeben wird.
  6. Das Batterieverwaltungssystem nach Anspruch 1,
    wobei der Steuersignalgenerator ferner ein fünftes Steuersignal (MODULE-_V) ausgibt, das um eine vorbestimmte Zeit gegenüber dem vierten Steuersignal verschoben ist, und
    wobei der Steuersignalgenerator die ersten und zweiten Steuersignale auf einen gegenüber dem ersten Pegel invertierten zweiten Pegel setzt, wenn das vierte oder fünfte Steuersignal auf dem ersten Pegel ist, und die dritten Steuersignale auf den ersten Pegel setzt, wenn die vierten und fünften Steuersignale auf dem zweiten Pegel sind.
  7. Das Batterieverwaltungssystem nach Anspruch 6, wobei der Steuersignalgenerator Folgendes umfasst:
    eine gemeinsame Elektrode, die ein Potential des ersten Pegels aufweist;
    einen ersten Transistor, der eine erste Elektrode, an die das umgewandelte erste Steuersignal angelegt wird, eine mit der gemeinsamen Elektrode verbundene zweite Elektrode sowie eine erste Steuerelektrode, an die das vierte Steuersignal angelegt wird, beinhaltet und die ersten und zweiten Elektroden leitend verbindet, indem er eingeschaltet ist, wenn das umgewandelte vierte Steuersignal oder das umgewandelte fünfte Steuersignal auf dem zweiten Pegel ist;
    einen zweiten Transistor, der eine dritte Elektrode, an die das umgewandelte zweite Steuersignal angelegt wird, sowie eine mit der gemeinsamen Elektrode verbundene vierte Elektrode beinhaltet und die dritten und vierten Elektroden leitend verbindet, indem er eingeschaltet ist, wenn das umgewandelte vierte Steuersignal oder das umgewandelte fünfte Steuersignal auf dem ersten Pegel ist; und
    einen Inverter, der erste, zweite, vierte und fünfte Steuersignale ausgibt, indem er die durch die erste Elektrode des ersten Transistors beziehungsweise die dritte Elektrode des zweiten Transistors übertragenen umgewandelten ersten, zweiten, vierten beziehungsweise fünften Steuersignale umwandelt.
  8. Das Batterieverwaltungssystem nach Anspruch 7, wobei die ersten und zweiten Transistoren erste beziehungsweise zweite Steuerelektroden beinhalten, das umgewandelte vierte Steuersignal über den ersten Widerstand den ersten beziehungsweise zweiten Steuerelektroden eingegeben wird und das umgewandelte fünfte Steuersignal über den zweiten Widerstand den ersten beziehungsweise zweiten Steuerelektroden eingegeben wird.
  9. Das Batterieverwaltungssystem nach Anspruch 7 oder 8, wobei der Steuersignalgenerator ferner eine Schaltungseinheit beinhaltet, die die von dem Inverter ausgegebenen vierten und fünften Steuersignale empfängt und das dritte Steuersignal ausgibt.
  10. Das Batterieverwaltungssystem nach Anspruch 9, wobei die Schaltungseinheit ein NAND-Gatter ist, das das dritte Steuersignal auf dem ersten Pegel ausgibt, wenn die von dem Inverter ausgegebenen vierten und fünften Steuersignale auf dem zweiten Pegel sind.
  11. Das Batterieverwaltungssystem nach Anspruch 6, wobei der Steuersignalgenerator Folgendes umfasst:
    eine gemeinsame Elektrode, die ein Potential des ersten Pegels aufweist;
    einen ersten Transistor, der eine erste Elektrode, an die das erste Steuersignal angelegt wird, sowie eine mit der gemeinsamen Elektrode verbundene zweite Elektrode beinhaltet und die ersten und zweiten Elektroden leitend verbindet, indem er eingeschaltet ist, wenn das vierte Steuersignal oder das fünfte Steuersignal auf dem zweiten Pegel ist;
    einen zweiten Transistor, der eine dritte Elektrode, an die das zweite Steuersignal angelegt wird, sowie eine mit der gemeinsamen Elektrode verbundene vierte Elektrode beinhaltet und die dritten und vierten Elektroden leitend verbindet, indem er eingeschaltet ist, wenn das vierte Steuersignal oder das fünfte Steuersignal auf dem ersten Pegel ist; und
    einen Puffer, der erste, zweite, vierte und fünfte Steuersignale ausgibt, indem er die durch die erste Elektrode des ersten Transistors beziehungsweise die dritte Elektrode des zweiten Transistors übertragenen ersten, zweiten, vierten beziehungsweise fünften Steuersignale empfängt.
  12. Das Batterieverwaltungssystem nach Anspruch 11, wobei der Steuersignalgenerator ferner eine Schaltungseinheit beinhaltet, die die von dem Puffer ausgegebenen vierten und fünften Steuersignale empfängt und das dritte Steuersignal ausgibt.
  13. Das Batterieverwaltungssystem nach Anspruch 12, wobei die Schaltungseinheit ein NOR-Gatter ist, das das dritte Steuersignal auf dem ersten Pegel ausgibt, wenn die von dem Puffer ausgegebenen vierten und fünften Steuersignale auf dem zweiten Pegel sind.
  14. Die Steuersignalerzeugungsschaltung nach Anspruch 13, wobei das NOR-Gatter verhindert, dass die ersten, zweiten und vierten Relais gleichzeitig eingeschaltet sind, indem es das erste Steuersignal derart steuert, dass es eingeschaltet ist, während die zweiten und dritten Steuersignale ausgeschaltet sind.
EP06120364A 2005-09-08 2006-09-08 Steuersignalerzeugungsschaltung und Batterieverwaltungssystem zur Anwendung derselben Not-in-force EP1763119B1 (de)

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100839382B1 (ko) 2006-10-16 2008-06-20 삼성에스디아이 주식회사 배터리 관리 시스템 및 그의 구동 방법
JP4537993B2 (ja) * 2006-12-19 2010-09-08 本田技研工業株式会社 電圧監視回路
WO2008151659A2 (en) * 2007-06-11 2008-12-18 Abb Research Ltd System and method for equalizing state of charge in a battery system
KR101041124B1 (ko) * 2008-06-24 2011-06-13 삼성에스디아이 주식회사 배터리 관리 시스템 및 그 구동 방법
JP5486780B2 (ja) 2008-07-01 2014-05-07 株式会社日立製作所 電池システム
KR101028756B1 (ko) * 2009-09-10 2011-04-14 이정용 배터리 관리 시스템의 전원 입력 제어 회로
CN110581575B (zh) * 2018-06-07 2023-07-18 南京泉峰科技有限公司 一种电动工具的通信电路和电动工具组合
CN110962631B (zh) * 2018-12-29 2020-11-17 宁德时代新能源科技股份有限公司 电池加热系统及其控制方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04186923A (ja) 1990-11-21 1992-07-03 Fujitsu Ltd 論理回路
JPH04302523A (ja) 1991-03-29 1992-10-26 Fuji Xerox Co Ltd パルス発生装置
EP0589287A3 (de) 1992-09-22 1995-02-01 Mentzer Electronic Gmbh Verfahren zum Laden einer mehrzelligen Batterie.
US5670861A (en) * 1995-01-17 1997-09-23 Norvik Tractions Inc. Battery energy monitoring circuits
EP0992100B1 (de) 1997-07-03 2007-04-25 R.V. Holdings Corp. in Trust Einrichtung und methode für die verwaltung einer batterienotstromversorgungseinrichtung
JP2001204141A (ja) 2000-01-19 2001-07-27 Hitachi Ltd 組電池のセル電圧検出装置及び検出方法
JP3559900B2 (ja) * 2000-07-18 2004-09-02 日産自動車株式会社 組電池診断装置
JP2002290221A (ja) * 2001-03-27 2002-10-04 Nec Corp 半導体出力回路の消費電力低減回路
KR100675273B1 (ko) * 2001-05-17 2007-01-26 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 전압 레벨 및 지연 시간 조절회로
US6404163B1 (en) * 2001-06-25 2002-06-11 General Motors Corporation Method and system for regulating a charge voltage delivered to a battery
JP4605952B2 (ja) * 2001-08-29 2011-01-05 株式会社日立製作所 蓄電装置及びその制御方法
KR100445433B1 (ko) 2002-03-21 2004-08-21 삼성에스디아이 주식회사 유기 전계발광 표시 장치와 그 구동 방법 및 구동 장치
US20050127874A1 (en) 2003-12-12 2005-06-16 Myoungho Lim Method and apparatus for multiple battery cell management
EP1712924A1 (de) * 2004-01-21 2006-10-18 Yazaki Corporation Batterie-reinwiderstands-messverfahren und -vorrichtung
US7557585B2 (en) * 2004-06-21 2009-07-07 Panasonic Ev Energy Co., Ltd. Abnormal voltage detection apparatus for detecting voltage abnormality in assembled battery
JP4732182B2 (ja) * 2006-02-15 2011-07-27 ルネサスエレクトロニクス株式会社 電池電圧監視装置
JP5109304B2 (ja) * 2006-08-03 2012-12-26 日産自動車株式会社 電池の残存容量検出装置
KR100839382B1 (ko) * 2006-10-16 2008-06-20 삼성에스디아이 주식회사 배터리 관리 시스템 및 그의 구동 방법
KR100814883B1 (ko) * 2006-10-16 2008-03-20 삼성에스디아이 주식회사 배터리 관리 시스템 및 그의 구동 방법
JP4484858B2 (ja) * 2006-10-19 2010-06-16 日立ビークルエナジー株式会社 蓄電池管理装置およびそれを備える車両制御装置
US20080157718A1 (en) * 2006-12-19 2008-07-03 Honda Motor Co., Ltd. Voltage monitor circuit

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DE602006006766D1 (de) 2009-06-25
US20070052462A1 (en) 2007-03-08
EP1763119A3 (de) 2008-03-19
US7593199B2 (en) 2009-09-22
EP1763119A2 (de) 2007-03-14
CN100423403C (zh) 2008-10-01
CN101312300A (zh) 2008-11-26
US7830122B2 (en) 2010-11-09
JP4199274B2 (ja) 2008-12-17
KR20070028906A (ko) 2007-03-13
CN1929237A (zh) 2007-03-14
US20100001694A1 (en) 2010-01-07
KR100740107B1 (ko) 2007-07-16
JP2007074895A (ja) 2007-03-22

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