EP1600999A2 - Ecran de visualisation à plasma - Google Patents

Ecran de visualisation à plasma Download PDF

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Publication number
EP1600999A2
EP1600999A2 EP05010077A EP05010077A EP1600999A2 EP 1600999 A2 EP1600999 A2 EP 1600999A2 EP 05010077 A EP05010077 A EP 05010077A EP 05010077 A EP05010077 A EP 05010077A EP 1600999 A2 EP1600999 A2 EP 1600999A2
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EP
European Patent Office
Prior art keywords
partition wall
wall unit
display panel
electrode
plasma display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05010077A
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German (de)
English (en)
Other versions
EP1600999A3 (fr
Inventor
Masaki Yoshinari
Takashi Yamada
Yoichi Okumura
Tasuku Ishibashi
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Pioneer Corp
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Pioneer Corp
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Filing date
Publication date
Application filed by Pioneer Corp filed Critical Pioneer Corp
Publication of EP1600999A2 publication Critical patent/EP1600999A2/fr
Publication of EP1600999A3 publication Critical patent/EP1600999A3/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
    • H01J11/12—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided on both sides of the discharge space
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/10—AC-PDPs with at least one main electrode being out of contact with the plasma
    • H01J11/16—AC-PDPs with at least one main electrode being out of contact with the plasma with main electrodes provided inside or on the side face of the spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20—Constructional details
    • H01J11/34—Vessels, containers or parts thereof, e.g. substrates
    • H01J11/36—Spacers, barriers, ribs, partitions or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2211/00—Plasma display panels with alternate current induction of the discharge, e.g. AC-PDPs
    • H01J2211/20—Constructional details
    • H01J2211/22—Electrodes
    • H01J2211/32—Disposition of the electrodes
    • H01J2211/326—Disposition of electrodes with respect to cell parameters, e.g. electrodes within the ribs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2211/00—Plasma display panels with alternate current induction of the discharge, e.g. AC-PDPs
    • H01J2211/20—Constructional details
    • H01J2211/34—Vessels, containers or parts thereof, e.g. substrates
    • H01J2211/36—Spacers, barriers, ribs, partitions or the like
    • H01J2211/366—Spacers, barriers, ribs, partitions or the like characterized by the material

Definitions

  • This invention relates to a panel structure of surface-discharge-type alternating-current plasma display panels.
  • Figs. 1 to 3 illustrate the structure of a conventional surface-discharge-type alternating-current plasma display panel (hereinafter referred to as "PDP").
  • Fig. 1 is a front view of the conventional PDP.
  • Fig. 2 is a sectional view taken along the V-V line in Fig. 1 and
  • Fig. 3 is a sectional view taken along the W-W line in Fig. 1.
  • a plurality of sustain electrode pairs (X, Y) is provided on a rear-facing face (i.e. the face facing toward the rear of the PDP) of a front glass substrate 1 forming the display face of the PDP.
  • the sustain electrode pairs (X, Y) extend in the row direction (the right-left direction in Fig. 1) of the front glass substrate 1 and are arranged in parallel.
  • the sustain electrode X(Y) is composed of T-shaped transparent electrodes Xa (Ya) formedof a transparent conductive film made of ITO or the like, and a bus electrode Xb (Yb) formed of a metal film.
  • the bus electrode Xb (Yb) extends in the row direction of the front glass substrate 1.
  • the narrow proximal end (corresponding to the foot of the "T") of each transparent electrode Xa (Ya) is connected to the bus electrode Xb (Yb).
  • the sustain electrodes X and Y are arranged in alternate positions in the column direction of the front glass substrate 1 (the vertical direction in Fig. 1).
  • the transparent electrodes Xa and Ya are regularly spaced along the associated bus electrodes Xb and Yb and each extend out toward its counterpart in the sustain electrode pair, so that the wide distal ends (corresponding to the head of the "T") of the transparent electrodes Xa and Ya face each other with a discharge gap g having a required width in between.
  • a dielectric layer 2 is formed on the rear-facing face of the front glass substrate 1 so as to cover the sustain electrodes X, Y, and has additional dielectric layers 3 projecting therefrom toward the rear of the PDP.
  • Each of the additional dielectric layers 3 extends in parallel to back-to-back bus electrodes Xb and Yb of the adj acent sustain electrode pairs (X, Y) in a position corresponding to the bus electrodes Xb and Yb and to the area between the bus electrodes Xb and Yb.
  • an MgO protective layer 4 is formed.
  • the front glass substrate 1 is parallel to a back glass substrate 5 on both sides of a discharge space S.
  • Address electrodes D are arranged in parallel at predetermined intervals on the front-facing face (i.e. the face facing toward the front of the PDP) of the back glass substrate 5.
  • Each of the address electrodes D extends in a direction at right angles to the sustain electrode pair (X, Y) (i.e. the column direction) in a position confronting the paired transparent electrodes Xa and Ya of the sustain electrode pairs (X, Y).
  • a white column-electrode protective layer (dielectric layer) 6 covers the address electrodes D and in turn a partition wall unit 7 is formed on the column-electrode protective layer 6.
  • the partition wall unit 7 is formed of glass materials by a sandblasting technique, and shaped in substantial grid form of vertical walls 7A and transverse walls 7B.
  • Each of the vertical walls 7A extends in the column direction between adjacent address electrodes D.
  • Each of the transverse walls 7B extends in the row direction in a plane following the strip area including back-to-back bus electrodes Xb and Yb of the adjacent sustain electrode pairs (X, Y) and the area between the bus electrodes Xb and Yb.
  • the grid-shaped partition wall unit 7 partitions the discharge space S between the front glass substrate 1 and the back glass substrate 6 into quadrangles to form discharge cells C in positions each corresponding to the paired transparent electrodes Xa and Ya of each sustain electrode pair (X, Y).
  • the transverse wall 7B of the partition wall 7 is in contact with the additional dielectric layer 3 to block off adjacent discharge cells C from each other in the row direction.
  • a phosphor layer 8 covers five faces: the side faces of the vertical walls 7A and the transverse walls 7B of the partition wall unit 7 and the face of the column-electrode protective layer 6.
  • the three primary colors, red, green and blue, are individually applied to the phosphor layers 8 such that the red, green and blue colors in the discharge cells C are arranged in order in the row direction.
  • the discharge space S between the front glass substrate 1 and the back glass substrate 5 is filled with a discharge gas including xenon.
  • a conventional PDP of such a structure is disclosed in Japanese Patent Laid-open publication 2000-195431, for example.
  • a reset discharge is produced between the sustain electrodes X and Y or between the sustain electrode Y and the address electrode D.
  • an address discharge is produced selectively between the transparent electrode Ya of the sustain electrode Y and the address electrode D, resulting in the deposition of wall charge on the dielectric layer 2 facing the discharge cell C in which the address discharge has been produced.
  • a sustain pulse is applied alternately to the sustain electrodes X and Y in each sustain electrode pair (X, Y), to initiate a sustain discharge in the discharge cell (light-emitting cell) having the deposition of wall charge on the dielectric layer 2.
  • vacuumultraviolet light is emitted from the xenon in the discharge gas filling the light-emitting cell, and excites the red-, green- and blue-colored phosphor layers 8. Thereupon, the phosphor layers 8 emit visible light, thus generating an image on matrix display.
  • the light-emitting efficiency of the PDP structured as described above is related to the volume of the space inside the discharge cell C.
  • the height of the discharge cell C is defined by the height of the partition wall unit 7 and the height of the additional dielectric layer 3 which is connected via the protective layer 4 to the transverse wall 7B of the partition wall unit 7 (see Fig. 2).
  • the partition wall unit 7 of the conventional PDP is formed by using glass materials and sandblasting techniques, the partition wall unit 7 may possibly produce a defect, an inclination and/or the like. This limits the maximum height of the partition wall unit 7.
  • the additional dielectric layer 3 is formed by the use of a method such as printing dielectric materials or applying a film. This limits themaximumheight of the additional dielectric layer 3.
  • An object of the present invention is to solve the problems associated with thesurface-discharge-typealternating-current PDPs as described above.
  • a PDP according to the present invention has a pair of opposing first and second substrates with a discharge space in between, a plurality of row electrode pairs extending in the row direction and regularly arranged in the column direction on the first substrate, a dielectric layer formed on the first substrate and covering the row electrode pairs, and a plurality of column electrodes extending in the column direction, regularly arranged in the row direction and producing a discharge in conjunction with the row electrodes in each unit light-emitting area formed in the discharge space.
  • the PDP further has a first partition wall unit provided on the first substrate for defining the unit light-emitting areas and a second partition wall unit provided on the second substrate for defining the unit light-emitting areas and positioned opposite the first partition wall unit.
  • the first partition wall unit and the second partition wall unit each have a metal-made base formed in a required shape and an insulation film covering the surface of the base.
  • An embodiment of the present invention can be described by citing a PDP having a first partition wall unit and a second partition wall unit partitioning the discharge space between a front glass substrate and a second glass substrate into discharge cells.
  • the first partition wall unit has an insulation film formed of a secondary electron emission material (high ⁇ material), such as MgO, and covering the surface of a metallic base.
  • the first partition wall unit is formed on the face of the front glass substrate facing the back glass substrate.
  • the second partition wall unit has an insulation film covering the surface of a metallic base and is formed on the face of the back glass substrate facing the front glass substrate so as to be in contact with the first partition wall unit.
  • the height (the width in the thickness direction of the panel) of the discharge cell is determined by the height of the first partition wall unit formed on the front glass substrate and the height of the second partition wall unit formed on the back glass substrate.
  • the first and second partition wall units are made of metal.
  • the PDP in this embodiment has the metallic first partition wall unit formed in a position corresponding to the position of the additional dielectric layer formed in the conventional PDP. This makes it possible to make the height of the discharge cell higher than that of the conventional PDP.
  • the first partition wall unit has the function of preventing the spread of a surface discharge initiated between the sustain electrodes outward from the interior of the discharge cell, similar to that of the additional dielectric layer of the conventional PDP.
  • the PDP of the embodiment is enabled to make the height of the discharge cell higher than that of the conventional PDP, thereby improving the light emitting efficiency even when the definition of the PDP is heightened
  • Figs. 4 to 5 illustrate a first embodiment of a PDP according to the present invention.
  • Fig. 4 is a schematic front view of the PDP in the first embodiment.
  • Fig. 5 is a sectional view taken along the VI-VI line in Fig. 4.
  • the PDP 10 has a plurality of sustain electrode pairs (X, Y) extending in the row direction (the right-left direction in Fig. 4) and regularly arranged in the column direction (the vertical direction in Fig. 4) on the rear-facing face of a front glass substrate 1 which serves as the display surface of the PDP.
  • Each of sustain electrodes X and Y constituting a sustain electrode pair (X, Y) is composed of a bus electrodes Xb (Yb) extending in a bar shape in the row direction, and transparent electrodes Xa (Ya) which are spaced at regular intervals along the bus electrode Xb (Yb) and each extends from the bus electrode Xb (Yb) toward its counterpart in the sustain electrode pair, so that the transparent electrodes Xa and Ya face each other across a discharge gap g.
  • a dielectric layer 2 is formed on the rear-facing face of the front glass substrate 1 so as to cover the sustain electrode pairs (X, Y).
  • a first partition wall unit 11 made of metal is formed on a protective layer.
  • the first partition wall unit 11 is composed of a metallic base 11a and an insulation film 11b covering the surface of the base 11a.
  • the first partition wall unit 11 is formed in a substantial grid shape made up of first vertical walls 11A and first transverse walls 11B.
  • Each of the first vertical walls 11A extends in the column direction in a plane following the line of the positions between adjacent transparent electrodes Xa (Ya) arranged along the bus electrodes Xb (Yb) of the sustain electrodes X (Y).
  • Each of the first transverse walls 11B extends in the row direction opposite to back-to-back bus electrodes Xb and Yb of the adj acent sustain electrode pairs (X, Y) and the area between the bus electrodes Xb and Yb.
  • the insulation film 11b partially constituting the first partition wall unit 11 is formed of a high ⁇ insulation film such as MgO, or alternatively an insulation film such as Al 2 Si 3 , or Si 2 O 3 .
  • the protective layer (not shown) formed of a high ⁇ dielectric material such as MgO is formed on the rear-facing face of the dielectric layer 2 and covers the surface of the dielectric layer 2.
  • the front glass substrate 1 is placed opposite a back glass substrate 5 with a discharge space S1 in between.
  • Address electrodes D are arranged in parallel at predetermined intervals on the front-facing face of the back glass substrate 5. Each of the address electrodes D extends in a direction at right angles to the sustain electrode pair (X, Y) (i.e. the column direction) in a position opposite to the paired transparent electrodes Xa and Ya of each sustain electrode pair (X, Y).
  • a white column-electrode protective layer (dielectric layer) 6 covers the address electrodes D.
  • the structure of the back glass substrate 5 as described above is the same as that in the conventional PDP described in Figs. 1 to 3.
  • the same components are designated by the same reference numerals.
  • a second partition wall unit 12 is formed on the column-electrode protectively layer 6.
  • the secondpartitionwall unit 12 is composed of a metallic base 12a and an insulation film 12b covering the surface of the base 12a.
  • the secondpartitionwall unit 12 is formed in a substantial grid shape of second vertical walls 12A and second transverse walls 12B.
  • Each of the second vertical walls 12A extends in the column direction in a position opposite the first vertical wall 11A of the first partition wall unit 11 (i.e. in a plane following the line of the positions between adjacent address electrodes D regularly arranged in the row direction).
  • Each of the second transverse walls 12B extends in the row direction in a position opposite to the first transverse wall 11B of the first partition wall unit 11 (i.e. in a position corresponding to the area including back-to-back bus electrodes Xb and Yb of the adjacent sustain electrode pairs (X, Y) and the area between the bus electrodes Xb and Yb on the front glass substrate 1).
  • the insulation film 12b partially constituting the second partition wall unit 12 is formed of an insulation film such as Al 2 Si 3 , or Si 2 O 3 .
  • the top faces of the second vertical walls 12A and the second transverse walls 12B of the second partition wall unit 12 are parallel to the front glass substrate 1.
  • the top faces of the first vertical walls 11A and the first transverse walls 11B of the first partition wall unit 11 are parallel to the back glass substrate 5.
  • the top faces of the second partition wall unit 12 are in contact with the respective top faces of the first partition wall unit 11.
  • a phosphor layer 18 is formed on five faces: the face of each portion of the column-electrode protective layer 6 defined by the second partition wall unit 12 and the side faces of the two second vertical walls 12 A and the two second transverse walls 12B of the second partition wall unit 12.
  • the red-, green- and blue-colored phosphor layers 18 are arranged in order in the row direction.
  • the discharge space S1 between the front and back glass substrates 1 and 5 is filled with a discharge gas including xenon.
  • a reset discharge is produced between the sustain electrodes X and Y in the sustain electrode pairs (X, Y) or between the sustain electrode Y and the address electrode D.
  • an address discharge is produced between the sustain electrode Y and the address electrode D.
  • a sustain discharge is produced across the discharge gap formed between the opposing transparent electrodes Xa and Ya of the sustain electrodes X and Y constituting the sustain electrode pair (X, Y). Thereby, an image is generated on matrix display.
  • the height (the width in the thickness direction of the PDP 10) of the discharge cell C1 is decided by the heights of the first partition wall unit 11 formed on the front glass substrate 1 and the second partition wall unit 12 formed on the back glass substrate 5 which are in contact with each other at their top faces.
  • the first partition wall unit 11 and the second partition wall unit 12 of the PDP have the bases 11a and 12a formed of metal materials.
  • the partition wall unit is capable of being formed to a required height.
  • the PDP 10 of the first embodiment has the metallic first partition wall unit 11 formed in the position corresponding to the additional dielectric layer formed in the conventional PDP. This makes it possible to design the greater height of the discharge cell C1 as compared with that of the conventional PDP.
  • the first partition wall unit 11 has the function of preventing the spread of a surface discharge initiated between the sustain electrodes outward from the interior of the discharge cell C1, similar to that of the additional dielectric layer of the conventional PDP.
  • the PDP 10 is enabled to have the discharge cell C1 of a greater height than that of the conventional PDP. In turn, this makes it possible to improve the light-emitting efficiency even when the PDP is designed to have a higher definition.
  • an increase in the height of the first partition wall unit 11 means an increase in the area of the insulation film 11b which partially forms the first partition wall unit 11 and is made of the secondary electron emission material (high ⁇ material) such as MgO. Therefore, the insulation layer 11b contributes to an improvement in the secondary electron emission characteristics in the discharge cell C1 as compared with the case of the conventional PDP. This improvement increases the discharge efficiency, resulting also in an increase in the light-emitting efficiency.
  • the layer thickness and the surface area of the phosphor layer 18 formed on the inner surface of the second partition wall unit 12 can be increased, resulting also in an increase in the light-emitting efficiency.
  • the MgO layer (insulation film 11b) is formed only on the front glass substrate 1 and the phosphor layer 18 is formed only on the back glass substrate 5. For these reasons, the manufacturing steps for the front glass substrate 1 and the manufacturing steps for the back glass substrate 5 are performed independently, thus facilitating the entire manufacturing process.
  • the PDP 10 has the metallic first partition wall unit 11 formed on the front glass substrate 1 instead of the conventional additional dielectric layer. This design eliminates the need of the complicated steps for forming the additional dielectric layer. Further, because the previously formed first partition wall unit 11 is mounted on the rear-facing face of the dielectric layer 2, the manufacturing process is simplified.
  • Fig. 6 shows a flowchart of the manufacturing process of the PDP 10.
  • step AS1 the step of performing DFR lamination on a metal plate
  • step AS2 the step of pattern exposure and development
  • step AS3 the step of etching (step AS3) is performed to form the metal plate into a substantial grid-shaped first partition wall unit 11 or a substantial grid-shaped second partition wall unit 12. Then, the step of performing DFR peeling (step AS4) is performed.
  • step AS4 by a technique such as spattering, evaporation or CVD, an insulation film 11b or 12b is formed on the surface of the metal plate which has been formed into the substantial grid shape in step AS4 (step AS5).
  • sustain electrodes X and Y are first formed on the rear-facing face of the front glass substrate 1 (step BS1).
  • Step BS1 includes the step of forming the transparent electrodes Xa and Ya of the sustain electrodes X and Y and the step of forming the bus electrodes Xb and Yb thereof.
  • a dielectric layer 2 is formed on the rear-facing face of the front glass substrate 1 (step BS2), so as to cover the sustain electrode pairs (X, Y) which have been formed in step BS1.
  • step BS2 before the burning of the dielectric layer 2, the first partition wall unit 11 fabricated in the manufacturing process A is precisely positioned on the dielectric layer 2. By burning the dielectric layer 2, the first partition wall unit 11 is joined onto the dielectric layer 2 in a predetermined position (step BS3).
  • step BS3 a protective layer is formed on the rear-facing face of the dielectric layer 2 (step BS4).
  • address electrodes D are first formed in a predetermined position on the front-facing face of the back glass substrate 5 (step CS1). After step CS1, a column-electrode protective layer 6 is formed (step CS2).
  • step CS2 before the burning of the column-electrode protective layer 6, the second partition wall unit 12 fabricated in the manufacturing process A is precisely positioned on the column-electrode protective layer 6. By burning the column-electrode protective layer 6, the second partition wall unit 12 is joined onto the column-electrode protective layer 6 in a predetermined position (step CS3).
  • step CS3 red, green and blue phosphor layers 18 are each formed in each of the areas defined by the grid-shaped second partition wall unit 12 (step CS4). Then, a sealing layer is formed on the periphery edge portion of the front-facing face of the back glass substrate 5 (step CS5).
  • step DS1 The front glass substrate 1 with the various structures thus formed thereon in the manufacturing process B and the back glass substrate 5 with the various structures thus formed thereon in the manufacturing process C are placed on each other with precise alignment so as to form a discharge space between them (step DS1). Then, the step of sealing the discharge space between the front glass substrate 1 and the back glass substrate 5 (step DS2), the step of baking after removing the gases from the discharge space (step DS3), the step of introducing a discharge gas into the discharge space (step DS4), and the step of sealing the discharge gas inside (tip-off) (step DS5) are performed in order to fabricate a PDP10.
  • Figs. 7, 8A and 8B illustrate a second embodiment of a PDP according to the present invention.
  • Fig. 7 is a schematic front view of the PDP in the second embodiment.
  • Fig. 8A is a sectional view taken along the VIII-VIII line in Fig. 7.
  • the PDP 20 has a plurality of sustain electrode pairs (X, Y) extending in the row direction (the right-left direction in Fig. 7) and regularly arranged in the column direction (the vertical direction in Fig. 7) on the rear-facing face of a front glass substrate 1 which serves as the display surface of the PDP.
  • Each of sustain electrodes X and Y constituting a sustain electrode pair (X, Y) is composed of a bus electrode Xb (Yb) extending in a bar shape in the row direction, and transparent electrodes Xa (Ya) which are spaced at regular intervals along the bus electrode Xb (Yb) and each extends from the bus electrodes Xb (Yb) toward its counterpart in the sustain electrode pair, so that the transparent electrodes Xa and Ya face each other with a discharge gap g in between.
  • a dielectric layer 2 is formed on the rear-facing face of the front glass substrate 1 so as to cover the sustain electrode pairs (X, Y).
  • a first partition wall unit 11 made of metal is formed on a protective layer.
  • the first partition wall unit 11 is composed of a metallic base 11a and an insulation film 11b covering the surface of the base 11a.
  • the first partition wall unit 11 is formed in a substantial grid shape made up of first vertical walls 11A and first transverse walls 11B.
  • Each of the first vertical walls 11A extends in the column direction in a plane following the line of the positions between adjacent transparent electrodes Xa (Ya) arranged along the bus electrodes Xb (Yb) of the sustain electrodes X (Y).
  • Each of the first transverse walls 11B extends in the row direction opposite to back-to-back bus electrodes Xb and Yb of the adj acent sustain electrode pairs (X, Y) and the area between the bus electrodes Xb and Yb.
  • the insulation film 11b partially constituting the first partition wall unit 11 is formed of a high y insulation film such as MgO, or alternatively an insulation film such as Al 2 Si 3 or Si 2 O 3 .
  • the protective layer (not shown) formed of a high ⁇ dielectric material such as MgO is formed on the rear-facing face of the dielectric layer 2 and covers the surface of the dielectric layer 2.
  • the top face 11c of the first partition wall unit 11 is parallel to the front glass substrate 1 and faces toward the rear of the PDP 20.
  • Address electrodes D1 are formed on the top face 11c and each extends along the first vertical wall 11A of the first partition wall unit 11 in the column direction.
  • a dielectric cover layer 21 is formed on the top face 11c of the first partition wall unit 11 so as to cover the address electrodes D1.
  • each of the address electrodes D1 can be the central longitudinal position of the top face 11c of the first partition wall unit 11, i.e. opposite the central area between adjacent transparent electrodes Xa (Ya) regularly spaced in the row direction.
  • each of the address electrodes D1 is preferably formed in a position of the top face 11c of the first partition wall unit 11 not central but closer to a transparent electrode Ya paired with the address electrode D1 as described later, in order to reliably initiate an address discharge between the address electrode D1 and the transparent electrode Ya paired therewith and to prevent the occurrence of a false discharge between the address electrode D1 and another adjacent transparent electrode Ya.
  • the front glass substrate 1 is placed opposite a back glass substrate 5 on either side of a discharge space S2.
  • a white dielectric layer 26 is formed on the front-facing face of the back glass substrate 5.
  • a second partition wall unit 12 is formed on the white dielectric layer 26.
  • the secondpartitionwall unit 12 is composedof a metallic base 12a and an insulation film 12b covering the surface of the base 12a.
  • the secondpartitionwall unit 12 is formed in a substantial grid shape of second vertical walls 12A and second transverse walls 12B.
  • Each of the second vertical walls 12A extends in the column direction opposite the first vertical wall 11A of the first partition wall unit 11.
  • Each of the second transverse walls 12B extends in the row direction opposite to the first transverse wall 11B of the first partition wall unit 11.
  • the insulation film 12b partially constituting the second partition wall unit 12 is formed of an insulation film such as Al 2 Si 3 or Si 2 O 3 .
  • the top faces of the second vertical walls 12A and the second transverse walls 12B of the second partition wall unit 12 are parallel to the front glass substrate 1, and in contact with the dielectric cover layer21 formed on the first partition wall unit 11.
  • a phosphor layer 28 is formed on five faces: the face of each portion of the white dielectric layer 26 defined by the second partition wall unit 12 and the side faces of the two second vertical walls 12 A and the two second transverse walls 12B of the second partition wall unit 12.
  • the red-, green- and blue-colored phosphor layers 8 are arranged in order in the row direction.
  • the discharge space S2 between the front and back glass substrates 1 and 5 is filled with a discharge gas including xenon (Xe).
  • a reset discharge is produced between the sustain electrodes X and Y in the sustain electrode pairs (X, Y) or between the sustain electrode Y and the address electrode D1.
  • an address discharge is produced between the sustain electrode Y and the address electrode D1.
  • a sustain discharge is produced across the discharge gap formed between the opposing transparent electrodes Xa and Ya of the sustain electrodes X and Y constituting the sustain electrode pair (X, Y). Thereby, an image is generated on matrix display.
  • the height (the width in the thickness direction of the PDP 20) of the discharge cell C2 is decided by the heights of the first partition wall unit 11 formed on the front glass substrate 1 and the second partition wall unit 12 formed on the back glass substrate 5 which are in contact with each other at their top faces, with the dielectric cover layer 21 in between.
  • the first partition wall unit 11 and the second partition wall unit 12 of the PDP 20 have the bases 11a and 12a formed of metal materials. Hence, as compared with the partition wall of a conventional PDP which is formed using glass materials and sandblasting technique, there is not possibility of a defect, an inclination and/or the like occurring in the partition wall units, and therefore the partition wall unit is capable of being formed to a required height.
  • the PDP 20 has the metallic first partition wall unit 11 formed in the position corresponding to the additional dielectric layer formed in the conventional PDP. This makes it possible to design the greater height of the discharge cell C2 as compared with that of the conventional PDP.
  • the first partition wall unit 11 has the function of preventing the spread of a surface discharge initiatedbetween the sustain electrodes outward from the interior of the discharge cell C2, similar to that of the additional dielectric layer of the conventional PDP.
  • the PDP 20 is enabled to have the discharge cell C2 of a greater height than that of the conventional PDP. In turn, this makes it possible to improve the light-emitting efficiency even when the PDP is designed to have a higher definition.
  • the insulation layer 11b contributes to the improvement of the secondary electron emission characteristics in the discharge cell C2 as compared with the case of the conventional PDP. This improvement increases the discharge efficiency, resulting also in an increase in the light-emitting efficiency.
  • the layer thickness and the surface area of the phosphor layer 28 formed on the inner surface of the second partition wall unit 12 can be increased, resulting also in an increase in the light-emitting efficiency.
  • the discharge distance is shorter than that in the PDP 10. This facilitates the initiation of a discharge between the address electrode D1 and the transparent electrode Ya of the sustain electrode Y. For this reason, the discharge voltage is reduced as compared with that in the PDP 10 and the address margin is widened.
  • the MgO layer (insulation film 11b) is formed only on the front glass substrate 1 and the phosphor layer 28 is formed only on the back glass substrate 5. For these reasons, the manufacturing steps for the front glass substrate 1 and the manufacturing steps for the back glass substrate 5 are performed independently, thus facilitating the entire manufacturing process.
  • the PDP 20 has the metallic first partition wall unit 11 formed on the front glass substrate 1 instead of the conventional additional dielectric layer. This design eliminates the need of the complicated steps for forming the additional dielectric layer. Further, because the previously formed first partition wall unit 11 is mounted on the rear-facing face of the dielectric layer 2, the manufacturing process is simplified.
  • Fig. 9 shows a flowchart of the manufacturing process of the PDP 20.
  • step ES1 the step for DFR lamination on a metal plate
  • step ES2 the step of pattern exposure and development
  • step ES3 the step of etching (step ES3) is performed to form the metal plate into a substantial grid-shaped first partition wall unit 11 or a substantial grid-shaped second partition wall unit 12. Then, the step for DFR peeling (step ES4) is performed.
  • step ES4 by a technique such as sputtering, evaporation or CVD, an insulation film 11b or 12b is formed on the surface of the metal plate which has been formed into the substantial grid shape in step ES4 (step ES5).
  • the manufacturing process E for the metallic partition wall is the same as the manufacturing process A for the metallic partition wall in the first embodiment.
  • sustain electrodes X and Y are first formed on the rear-facing face of the front glass substrate 1 (step FS1).
  • Step FS1 includes the step of forming the transparent electrodes Xa and Ya of the sustain electrodes X and Y and the step of forming the bus electrodes Xb and Yb thereof.
  • a dielectric layer 2 is formed on the rear-facing face of the front glass substrate 1 (step FS2), so as to cover the sustain electrode pairs (X, Y) which have been formed in step FS1.
  • step FS2 before the burning of the dielectric layer 2, the first partition wall unit 11 fabricated in the manufacturing process E is precisely positioned on the dielectric layer 2. By burning the dielectric layer 2, the first partition wall unit 11 is joined onto the dielectric layer 2 in a predetermined position (step FS3).
  • step FS3 address electrodes D1 are formed on the top face 11c of the first partition wall unit 11 (step FS4). Then, a dielectric cover layer 21 is formed to cover the address electrodes D1 (step FS5).
  • step FS6 a protective layer is formed on the rear-facing face of the dielectric layer 2 (step FS6).
  • a white dielectric layer 26 is first formed on the front-facing face of the back glass substrate 5 (step GS1).
  • step GS1 before the burning of the white dielectric layer 26, the second partition wall unit 12 fabricated in the manufacturing process E for the metallic partition wall is precisely positioned on the white dielectric layer 26. By burning the white dielectric layer 26, the second partition wall unit 12 is joined onto the white dielectric layer 26 in a predetermined position (step GS2).
  • red, green and blue phosphor layers 28 are each formed inside the areas defined by the grid-shaped second partition wall unit 12 (step GS3). Then, a sealing layer is formed on the periphery edge portion of the front-facing face of the back glass substrate 5 (step GS4).
  • step HS1 The front glass substrate 1 with the various structures thus formed thereon in the manufacturing process F and the back glass substrate 5 with the various structures thus formed thereon in the manufacturing process G are placed on each other with precise alignment so as to form a discharge space between them (step HS1). Then, the step of sealing the discharge space between the front glass substrate 1 and the back glass substrate 5 (step HS2), the step of baking after removing the gases from the discharge space (step HS3), the step of introducing a discharge gas into the discharge space (step HS4), and the step of sealing the discharge gas inside (tip-off) (step HS5) are performed in order to fabricate a PDP 20.
  • Fig. 10 is a sectional view illustrating a modified example of the PDP of the second embodiment described in Figs. 7, 8A and 8B.
  • the column electrode D1 is formed on the first vertical wall 11A of the first partition wall unit 11 formed on the front glass substrate 1.
  • a column electrode D2 is formed on the second vertical wall 12A (see Fig. 7) of the second partition wall unit 12 formed on the back glass substrate 5, and is covered by a dielectric cover layer 31 that is formed on the top face 12c of the second partition wall unit 12.
  • the structure of the other components is approximately the same as that of the PDP in Figs. 7 and 8A.
  • the same components are designated by the same reference numerals as those in the PDP shown in Figs. 7 and 8A.
  • the PDP in Fig. 10 is capable of exerting the same effects and advantages as those of the PDP described in Fig. 8A.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Gas-Filled Discharge Tubes (AREA)
EP05010077A 2004-05-26 2005-05-09 Ecran de visualisation à plasma Withdrawn EP1600999A3 (fr)

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JP2004156018A JP2005339944A (ja) 2004-05-26 2004-05-26 プラズマディスプレイパネル
JP2004156018 2004-05-26

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EP1600999A2 true EP1600999A2 (fr) 2005-11-30
EP1600999A3 EP1600999A3 (fr) 2007-08-15

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KR100784517B1 (ko) 2006-05-16 2007-12-11 엘지전자 주식회사 플라즈마 디스플레이 패널
KR100762251B1 (ko) 2006-05-30 2007-10-01 엘지전자 주식회사 플라즈마 디스플레이 장치
KR100762249B1 (ko) * 2006-05-30 2007-10-01 엘지전자 주식회사 플라즈마 디스플레이 장치
EP2219202B1 (fr) * 2009-02-17 2013-11-20 Samsung SDI Co., Ltd. Panneau d'affichage à plasma et son procédé de fabrication
KR20110039838A (ko) * 2009-10-12 2011-04-20 삼성에스디아이 주식회사 플라즈마 디스플레이 패널
KR101082445B1 (ko) * 2009-10-30 2011-11-11 삼성에스디아이 주식회사 플라즈마 디스플레이 패널

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WO1991006115A1 (fr) * 1989-10-18 1991-05-02 Noritake Co., Limited Panneau d'affichage au plasma et procede de production
EP0691671A1 (fr) * 1994-07-07 1996-01-10 Technology Trade And Transfer Corporation Appareil afficheur à décharge
US6538381B1 (en) * 1999-03-30 2003-03-25 Nec Corporation Plasma display panel and method for manufacturing the same
US20030227426A1 (en) * 2002-06-07 2003-12-11 Pioneer Corporation Plasma display panel

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JP4177969B2 (ja) * 2001-04-09 2008-11-05 株式会社日立製作所 プラズマディスプレイパネル
US7538491B2 (en) * 2002-12-27 2009-05-26 Lg Electronics Inc. Plasma display panel having differently shaped transparent electrodes

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Publication number Priority date Publication date Assignee Title
WO1991006115A1 (fr) * 1989-10-18 1991-05-02 Noritake Co., Limited Panneau d'affichage au plasma et procede de production
EP0691671A1 (fr) * 1994-07-07 1996-01-10 Technology Trade And Transfer Corporation Appareil afficheur à décharge
US6538381B1 (en) * 1999-03-30 2003-03-25 Nec Corporation Plasma display panel and method for manufacturing the same
US20030227426A1 (en) * 2002-06-07 2003-12-11 Pioneer Corporation Plasma display panel

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EP1600999A3 (fr) 2007-08-15
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