EP1383103B1 - Automatische Anpassung der Versorgungsspannung eines Elektrolumineszenz-Anzeigeschirmes in Abhängigkeit der gewünschten Luminanz - Google Patents

Automatische Anpassung der Versorgungsspannung eines Elektrolumineszenz-Anzeigeschirmes in Abhängigkeit der gewünschten Luminanz Download PDF

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Publication number
EP1383103B1
EP1383103B1 EP03300065A EP03300065A EP1383103B1 EP 1383103 B1 EP1383103 B1 EP 1383103B1 EP 03300065 A EP03300065 A EP 03300065A EP 03300065 A EP03300065 A EP 03300065A EP 1383103 B1 EP1383103 B1 EP 1383103B1
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Prior art keywords
voltage
signal
pol
current
column
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EP03300065A
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English (en)
French (fr)
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EP1383103A1 (de
Inventor
Celine Mas
Eric Benoit
Olivier Scouarnec
Olivier Le Briz
Danika Chaussy
Philippe Maige
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STMicroelectronics SA
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STMicroelectronics SA
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • the present invention relates to electroluminescent display matrix screens composed of a set of light-emitting diodes. These are for example screens composed of organic diodes ("OLED" of the English Organic Light Emitting Display) or polymer ("PLED” of the English Polymer Light Emitting Display).
  • OLED organic diodes
  • PLED polymer
  • the present invention relates more particularly to the regulation of the supply voltage of the control circuits of the light-emitting diodes of such screens.
  • the figure 1 represents a matrix screen comprising n columns C 1 to C n and k lines L 1 to L k for addressing n * k light-emitting diodes d whose anodes are connected to a column and the cathodes to a line.
  • Line control circuits CL 1 to CL k are used to bias lines L 1 to L k respectively . Only one line is activated at a time, and is biased to ground. The unactivated lines are biased to a voltage Vlign.
  • Column control circuits CC 1 to CC n are used to bias the columns C 1 to C n, respectively .
  • the columns addressing the light-emitting diodes that it is desired to activate are biased by a current at a voltage V col greater than the threshold voltage of the light-emitting diodes. of the screen.
  • the columns that we do not want to activate are grounded.
  • a light emitting diode connected to the activated line and a polarized column V-neck is then busy, and emits light.
  • the line voltage V is sufficiently high so that the light-emitting diodes connected to the non-activated lines and to the columns with the voltage V col are not conductive and do not emit light.
  • the figure 2 represents a column control circuit CC and a line control circuit CL respectively addressing a column C and a line L connected to a light emitting diode d of the screen.
  • the line control circuit CL comprises a power inverter 1 controlled by a line control signal ⁇ L.
  • the power inverter 1 comprises an NMOS transistor 2 making it possible to discharge the line L when ⁇ L is at the high level and a PMOS transistor 3 making it possible to charge the line L at the bias voltage V line when ⁇ L is at the low level.
  • the column control circuit CC comprises a current mirror made in the present example with two transistors 4, 5 of the PMOS type.
  • the transistor 4 constitutes the reference branch of the mirror and the transistor 5 constitutes the duplication branch.
  • the sources of transistors 4 and 5 are connected to a bias voltage V pol of the order of 15 V for OLED screens.
  • the gates of transistors 4 and 5 are connected to each other.
  • the drain and the gate of transistor 4 are connected to each other.
  • the transistor 4 is therefore diode-mounted, the source-gate voltage (Vsg 4 ) being equal to the source-drain voltage (Vsd 4 ).
  • the current flowing through the transistor 4 is set by a current source 6 connected to the drain of the transistor 4.
  • the current source 6 supplies a current I l called "luminance".
  • the drain of the transistor 5 is connected to the column C via a column selection circuit composed of a PMOS transistor 7 and an NMOS transistor 8.
  • the source of the PMOS transistor 7 is connected to the drain of the transistor 5 and the drain of the transistor 7 is connected to the column C.
  • the source of the transistor 8 is grounded and its drain is connected to the column C.
  • a column control signal ⁇ C is connected to the gate of the PMOS transistor 7 and to the gate of the NMOS transistor 8.
  • the column control signal ⁇ C When the column control signal ⁇ C is high, the transistor 8 discharges the column C. When it is at the low level, the transistor 7 is on and the column C is charged until to reach the voltage V col .
  • the line control signals ⁇ L and column ⁇ C are respectively high and low, the light emitting diode d is on and the current flowing through the diode is equal to the luminance current I l .
  • the bias voltage V pol is equal to the sum of the source-drain voltage Vsd 2 of the transistor 2, the voltage V d across the electroluminescent diode d, the source-drain voltage Vsd 7 of the transistor 7 and the source-drain voltage Vsd 5 of the transistor 5.
  • the transistor 5 When the copy of the current I l is correct, the transistor 5 is in saturation mode and the voltage Vsd 5 is at least equal to the source-drain voltage Vsd 4 of the transistor 4.
  • a correct copy therefore requires that the bias voltage V pol is at least equal to the sum mentioned above when the current flowing through it is equal to the luminance current I l . If the bias voltage V pol is too low, the current flowing through the light-emitting diode d is lower than the current I l and the luminance of the diodes is insufficient.
  • the luminance current I 1 supplied by the current source 6 can generally vary according to the desired luminance for the screen.
  • the source-drain voltage Vsd 4 of the diode-connected transistor 4 increases and the voltage V d of the light-emitting diode d also increases. It follows that the voltage of V polarity must be large enough that the transistor 5 is in saturation irrespective of the luminance current.
  • the document US5594463A discloses a matrix screen with light-emitting diodes in which the voltage difference on one of the light-emitting diodes is measured and the bias voltage of the current mirror is adapted accordingly.
  • JP2000347613A and JP11272223A describe light emitting diode matrix screens in which the voltage at the output of the current source for one or more light-emitting diodes is measured and the bias voltage of the current sources is adapted accordingly.
  • An object of the present invention is to provide a column control circuit whose bias voltage V pol is the lowest possible regardless of the aging of the light emitting diodes of the screen.
  • Another object of the present invention is to provide a control circuit of simple design.
  • the present invention provides a device for regulating the bias voltage of column control circuits of a matrix screen composed of light-emitting diodes each connected to one of the rows and to one of the columns of the screen, such as as set forth in claim 1.
  • the present invention also provides a method for regulating the bias voltage of column control circuits of a matrix screen composed of light-emitting diodes each connected to one of the rows and to one of the columns of the screen, as stated in FIG. claim 7.
  • the figure 3 is a diagram of an embodiment of column control circuits and polarization voltage regulator device V pol according to the present invention.
  • the column control circuits comprise a current mirror 9 composed of a reference branch b ref and n duplication branches b 1 to b n .
  • Each branch is composed of a PMOS transistor, P ref for the reference branch and P 1 to P n for the branches b 1 to b n.
  • the sources of the transistors of each of the branches are connected to the bias voltage V pol and the gates are connected to each other.
  • the drain and the gate of the transistor P ref of the reference branch are connected to a reference current source 10 at a point C ref .
  • the reference current source 10 provides a luminance current I 1 .
  • each transistor P i i being between 1 and n, is connected to a column C i of the screen via a column selection circuit as described in relation to the figure 2 .
  • the set of column selection circuits are represented by a selection device 11 controlled by a column signal ⁇ C.
  • Each column C 1 to C n is connected to the anode of a diode respectively D 1 to D n .
  • the cathodes of the diodes D 1 to D n are connected to a current source 15 at a point C o .
  • the current source 15 provides a so-called observation current I ob chosen small relative to the minimum luminance current.
  • the connection point C ref is connected to the anode of a diode D ref identical to the diodes D 1 to D n
  • the cathode of the diode D ref is connected at a point C oref to a current source 16 providing a current equal to the observation current I ob .
  • the points C ref and C oref are connected to two inputs of an adjustment circuit CR which supplies the bias voltage V pol .
  • the light-emitting diodes can, even when they are crossed by the same current, have different voltage drops across their terminals. In particular, this voltage drop tends to increase when the light-emitting diodes age.
  • the object of the present invention is to adjust the voltage V pol to take account of these voltage variations and to ensure that the selected luminance current I I circulates in all the selected columns, V pol remaining as small as possible.
  • the diodes D 1 to D n corresponding to the selected columns tend to be conductive.
  • the diode connected to the column having the highest voltage imposes the voltage V o on the cathodes of the diodes D 1 to D n .
  • Others diodes are therefore not conductive because the voltage at their terminals is lower than their threshold voltage.
  • the voltage V o is the image of the voltage on the column at the highest potential offset from a diode threshold voltage.
  • the voltage V oref at the connection point C oref is the image of the voltage Vref shifted by a diode threshold voltage.
  • the adjustment circuit CR then raises the bias voltage V pol until the voltages V o and V oref are equal.
  • the adjustment circuit reduces the bias voltage V bias to the minimum voltage V pol ensuring a circulation of the luminance current I l in all selected columns.
  • the figure 4 is a diagram of the bias voltage adjusting circuit V pol as a function of the difference between the voltages V o and V oref .
  • the adjustment circuit comprises an error amplifier 20, an operational amplifier 21 and an RS flip-flop 22 operating with a low supply voltage, for example 3.3 V.
  • the error amplifier 20 receives on a positive input , the voltage V o and on a negative input, the voltage V oref .
  • the levels of the voltages V o and V oref are very high for the error amplifier 20, it will be possible to provide a voltage converter providing voltages proportional to the voltages V o and V oref , over a voltage range greater than low.
  • the error amplifier 20 amplifies the difference between V o and V oref and provides an error signal er which varies for example between 1 and 2 V.
  • the error signal is for example 1.5 V. the higher the voltage V o is high with respect to V oref, and the error signal er is high and vice versa.
  • the signal er is applied to the positive input of the differential amplifier 21.
  • the output of the differential amplifier 21 is connected to the reset terminal R (reset) of the RS flip-flop 22.
  • the output of an oscillator osc is connected to the activation terminal S (set) of the RS flip-flop 22.
  • the output Q is at the high logic level (for example 3.3 V) when the activation terminal S is at the high level and at the logic low level ( eg 0V) when the reset terminal R is high. When both S activation and R reset terminals are low, the Q output retains the last level set.
  • the output of the RS flip-flop 22 is connected to the gate of an NMOS transistor Tf.
  • a resistor R is placed between the source of the transistor Tf and the ground.
  • a coil L is placed between the drain of the transistor Tf and the supply terminal at a voltage V bat , for example at 3.3 V.
  • the anode of a diode D f is connected to the drain of the transistor Tf and its cathode is connected to a first electrode of a capacitor C.
  • the second electrode of the capacitor C is connected to ground.
  • the first electrode of the capacitor C provides the voltage V pol .
  • the source of the transistor Tf is connected to the negative input of the differential amplifier 21.
  • the Q output of the RS flip-flop 22 goes high.
  • the transistor Tf closes and the voltage across the coil L passes rapidly from 0 to V bat .
  • the voltage V R across the resistor R and the current in the coil L are initially zero.
  • the current in the coil L increases gradually, so the voltage V R also increases.
  • the amplifier 21 changes state and goes high.
  • the Q output of the RS flip-flop 22 goes low and the transistor Tf opens.
  • the voltage on the drain of the transistor Tf increases sharply.
  • the diode Df becomes conducting and the capacitor C is charged.
  • the charging current is higher as the current flowing through the coil L is high when the transistor Tf opens.
  • the signal er When the voltage V o is greater than the voltage V oref , the signal er is relatively high. As a result, the transistor Tf remains longer and the current flowing in the coil L at the moment of the opening of the transistor Tf is important. The capacitor C is charged and the voltage V pol increases. Conversely, when the voltage V o is lower than the voltage V oref , the voltage V pol decreases.
  • the bias voltage V pol is adjusted according to the temporal variations of the voltage across the light emitting diodes of the screen.
  • An advantage of the control device according to the present invention is that the bias voltage is always minimal, which allows energy savings.
  • Another advantage of such a device is that its design is very simple.
  • the figure 5 is a scheme of column control circuits identical to those of the figure 3 and a diagram of an alternative embodiment of the polarization voltage regulator device V pol which overcomes the following problem.
  • V pol When a line of the screen is "black", that is to say that no light-emitting diode of the selected line is conducting, the voltage V o at the point C o of the control circuit of the figure 3 decreases because none of the diodes D 1 to D n is passing.
  • the voltage V o decreasing, the adjustment circuit CR decreases the bias voltage V pol .
  • the bias voltage V pol can greatly decrease.
  • the light-emitting diodes conducting "lighted" lines may then receive a current lower than the luminance current. The overall brightness of the screen decreases.
  • the device for regulating the bias voltage V pol is identical to that of the figure 3 except that the point C o is connected to the adjustment circuit CR via a switch 31.
  • a capacitor 32 is placed between the input of the adjustment circuit CR and the ground.
  • Switch 31 is controlled to be off when a line of the screen is black, i.e. when no light emitting diode of the selected line is conductive.
  • the capacitor 32 retains the value of the voltage V o corresponding to the last non-black line.
  • the control device of the switch not shown, analyzes the column signal ⁇ C to know if at least one column is selected and therefore that at least one diode is conductive.
  • control device of the switch analyzes the control signals of the line control circuits so as to turn on the switch 31 once the voltages of the selected columns have changed from their precharge voltages to their "operating" voltages corresponding to the voltages induced by each of the conductive light emitting diodes.
  • the figure 6 is a diagram of an embodiment of the error amplifier 20 of the CR adjustment circuit of the figure 4 which makes it possible to overcome the following problem.
  • the voltage V o can be very close to the bias voltage V pol .
  • Such a fault leads not only to a disproportionate increase in the bias voltage V pol but also to overvoltages likely among other things to damage the adjustment circuit CR.
  • a wear defect it may be interesting to detect the fault in order to avoid damaging the rest of the circuit and to avoid increasing the power consumption to provide a high voltage V pol .
  • the detection of a manufacturing defect makes it possible to detect the faulty circuits before their marketing.
  • the error amplifier represented in figure 6 comprises two PMOS transistors 40 and 41 whose gates respectively receive the voltages V o and V oref of the control device represented in FIG. figure 3 .
  • Two identical current sources 42 and 43 are placed between the bias voltage V pol and the sources of the transistors 40 and 41.
  • a resistor R1 is placed between the sources of the transistors 40 and 41.
  • the drains of the transistors 40 and 41 are connected to a conversion device 44 which provides the error signal er.
  • a PMOS transistor 45 is placed in parallel on the transistor 40.
  • the source of the transistor 45 is connected to the source of the transistor 40 and the drain of the transistor 45 is connected to the drain of the transistor 40.
  • the gate of the transistor 45 receives a voltage of protection V protect which is provided by a device not shown.
  • the protective voltage V protect corresponds to the maximum voltage V o corresponding to correct operation of the screen and the column and line control circuits.
  • the voltage V o is lower than the protection voltage V protect .
  • the transistors 40, 41 and 45 are such that when they conduct a current equal to that supplied by the current sources 42 and 43, their gate-source voltages is substantially equal to the threshold voltage of a PMOS transistor. Thus, when the voltage V o is lower than the voltage V protect , the transistor 45 is non-conductive. Similarly, when voltages V o and V oref are different the voltages on the sources of transistors 40 and 41 are different. The resistance R1 is then crossed by a current which is higher as the difference between the voltages V o and V oref is high.
  • the conversion device 44 analyzes the current differences in the transistors 40 and 41 and provides an error signal er which is all the greater as the current in the transistor 40 is small relative to the current in the transistor 41 and vice versa.
  • the voltage V o can be very close to the bias voltage V pol .
  • the transistor 45 becomes conductive and the transistor 40 is non-conductive.
  • the bias voltage V pol is then maximal.
  • the maximum value of the voltage V pol depends on the choice of the voltage V protect and the voltage V oref which is a function of the desired luminance current.
  • the presence of the transistor 45 makes it possible to ensure that the bias voltage V pol does not exceed a given maximum value and also makes it possible to eliminate any overvoltages that may damage the adjustment circuit CR.
  • the present invention is susceptible of various variations and modifications which will be apparent to those skilled in the art.
  • one skilled in the art will realize a current mirror different from that described, for example using two transistors per branch.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Claims (8)

  1. Eine Vorrichtung zum Regeln der Bias-Spannung (Vpol) von Spaltensteuerschaltkreisen eines Bildschirmarrays, das aus LEDs gebildet ist, wobei jede zu einer der Zeilen und einer der Spalten des Bildschirms gekoppelt ist, wobei der Spaltensteuerschaltkreis einen Stromspiegel mit einem Referenzzweig (bref) und mehreren Duplizierzweigen (b1 bis bn) aufweist, wobei alle Zweige mit der Bias-Spannung (Vpol) verbunden sind, wobei jeder Duplizierzweig (bi) an eine Spalte (Ci) des Bildschirms über einen Spaltenauswahlschaltkreis (11) gekoppelt ist, wobei der Referenzzweig an einem Referenzknoten (Cref) mit einer Referenzstromquelle (10) verbunden ist, die einen gewünschten Helligkeitsstrom (I1) bereitstellt, wobei die Vorrichtung dadurch gekennzeichnet ist, dass sie Folgendes aufweist:
    erste Messmittel (D1 bis Dn und 15), die angeordnet sind , um ein erstes Signal (Vo) bereitzustellen, das repräsentativ für die Spannung der Spalte an dem höchsten Potential ist;
    zweite Messmittel (Dref und 16), die angeordnet sind, um ein zweites Signal (Voref) bereitzustellen, das repräsentativ für die Spannung (Vref) des Referenzknotens (Cref) ist; und
    einen Einstellschaltkreis (CR), der angeordnet ist, um das erste Signal (Vo) und das zweite Signal (Voref) zu empfangen und der angepasst ist, um die Bias-Spannung (Vpol) zu erhöhen, wenn das erste Signal (Vo) größer ist als das zweite Signal (Voref), was bedeutet, dass der Strom in wenigstens einer der Spalten des Bildschirms niedriger ist als der gewünschte Helligkeitsstrom (I1), und der angepasst ist, um die Bias-Spannung (Vpol) zu reduzieren, wenn das erste Signal (Vo) niedriger ist als das zweite Signal (Voref), was bedeutet, dass der gewünschte Helligkeitsstrom (I1) in allen ausgewählten Spalten fließt, wobei jedoch die Bias-Spannung (Vpol) zu groß ist.
  2. Die Vorrichtung nach Anspruch 1, wobei jeder Zweig (bi) des Stromspiegels einen PMOS Feldeffekttransistor (P;) beinhaltet, wobei eine Quelle mit der Bias-Spannung verbunden ist, die Gates jedes Zweigs zusammengeschaltet sind, und wobei die Senke und das Gate des Transistors des Referenzzweigs mit der Referenzstromquelle (10) verbunden sind, wobei die Senken der Transistoren des Duplizierzweigs mit den Spalten (C1 bis Cn) verbunden sind.
  3. Die Vorrichtung nach Anspruch 1, wobei die ersten Messmittel für jede Spalte (Ci) eine Diode (Di) aufweisen, mit einer Anode, die mit der Spalte (Ci) verbunden ist und einer Kathode, die mit einer ersten Beobachtungsstromquelle (15) und einem ersten Eingang des Einstellschaltkreises verbunden ist, und wobei die zweiten Messmittel eine Diode (Dref) aufweisen, mit einer Anode, die mit dem Referenzknoten verbunden ist und einer Kathode, die mit einer zweiten Beobachtungsstromquelle (16) und einem zweiten Eingang des Einstellschaltkreises verbunden ist.
  4. Die Vorrichtung nach Anspruch 3, wobei die Kathoden von jeder Diode (Di) mit dem ersten Eingang des Einstellschaltkreises über einen Schalter (31), verbunden sind, wobei ein Kondensator (32) zwischen den ersten Eingang des Einstellschaltkreises (CR) und einen festen Spannungsknoten geschaltet ist.
  5. Die Vorrichtung nach Anspruch 3, wobei der Abgleichschaltkreis einen Fehlerverstärker (20) aufweist, der das erste Signal auf einem positiven Eingang und das zweite Signal auf einem negativen Eingang empfängt, wobei ein Ausgang des Fehlerverstärkers (er) mit einem DC/DC Spannungsumwandler verbunden ist, der die Bias-Spannung (Vpol) ausgibt und der angepasst ist, die Bias-Spannung (Vpol) zu erhöhen, wenn das erste Signal höher ist als das zweite Signal und umgekehrt.
  6. Die Vorrichtung nach Anspruch 5, wobei der Fehlerverstärker (20) erste und zweite PMOS Transistoren (40, 41) aufweist, deren Gates entsprechend mit positiven und negativen Eingängen des Fehlerverstärkers verbunden sind, wobei die Quelle jedes der ersten und zweiten Transistoren mit der Bias-Spannung (Vpol) über eine Stromquelle (42, 43) verbunden ist, wobei die Quellen der ersten und zweiten Transistoren über einen Widerstand (R1) verbunden sind, wobei die Senken der ersten und zweiten Transistoren mit einem Umwandler (44) verbunden sind, der das Fehlersignal bereitstellt, wobei die Quelle und die Senke eines dritten PMOS Transistors (45) mit der Quelle und der Senke des ersten Transistors (40) verbunden sind, und wobei das Gate des dritten Transistors auf eine feste Spannung (Vprotect) vorgespannt ist.
  7. Ein Verfahren zum Regeln der Bias-Spannung (Vpol) von Spaltensteuerschaltkreisen eines Bildschirmarrays, das aus LEDs gebildet ist, wobei jede zu einer der Zeilen und einer der Spalten des Bildschirms gekoppelt ist, wobei der Spaltensteuerschaltkreis einen Stromspiegel mit einem Referenzzweig (bref) und mehreren Duplizierzweigen (b1 bis bn) aufweist, wobei alle Zweige mit der Bias-Spannung (Vpol) verbunden sind, und wobei jeder Duplizierzweig (bi) an eine Spalte (Ci) des Bildschirms über einen Spaltenauswahlschaltkreis (11) gekoppelt ist, wobei der Referenzzweig an einem Referenzknoten (Cref) mit einer Referenzstromquelle (10) verbunden ist, die einen gewünschten Helligkeitsstrom (I1) bereitstellt, wobei das Verfahren dadurch gekennzeichnet ist, dass es folgende Schritte aufweist:
    Bereitstellen, durch erste Messmittel (D1 bis Dn und 15), eines ersten Signals (Vo), das repräsentativ für die Spannung der Spalte an dem höchsten Potential ist;
    Bereitstellen, durch zweite Messmittel (Dref und 16), eines zweiten Signals (Voref), das repräsentativ für die Spannung (Vref) des Referenzknotens (Cref) ist; und
    Erhöhen der Bias-Spannung (Vpol), wenn das erste Signal (Vo) größer ist als das zweite Signal (Voref), was bedeutet, dass der Strom in wenigstens einer der Spalten des Bildschirms niedriger ist als der gewünschte Helligkeitsstrom (Il), und Reduzieren der Bias-Spannung (Vpol), wenn das erste Signal (Vo) niedriger ist als das zweite Signal (Voref), was bedeutet, dass der gewünschte Helligkeitsstrom (Il) in allen ausgewählten Spalten fließt, wobei jedoch die Bias-Spannung (Vpol) zu groß ist.
  8. Das Verfahren nach Anspruch 7, wobei das erste Signal ein Abbild der Spannung in der Spalte mit dem höchsten Potential ist, verschoben durch eine Diodenschwellenspannung.
EP03300065A 2002-07-19 2003-07-17 Automatische Anpassung der Versorgungsspannung eines Elektrolumineszenz-Anzeigeschirmes in Abhängigkeit der gewünschten Luminanz Expired - Lifetime EP1383103B1 (de)

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