EP1383103B1 - Automatic adaptation of the supply voltage of an electroluminescent panel depending on the desired luminance - Google Patents

Automatic adaptation of the supply voltage of an electroluminescent panel depending on the desired luminance Download PDF

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Publication number
EP1383103B1
EP1383103B1 EP20030300065 EP03300065A EP1383103B1 EP 1383103 B1 EP1383103 B1 EP 1383103B1 EP 20030300065 EP20030300065 EP 20030300065 EP 03300065 A EP03300065 A EP 03300065A EP 1383103 B1 EP1383103 B1 EP 1383103B1
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Prior art keywords
signal
voltage
connected
current
column
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German (de)
French (fr)
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EP1383103A1 (en
Inventor
Celine Mas
Eric Benoit
Olivier Scouarnec
Olivier Le Briz
Danika Chaussy
Philippe Maige
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STMicroelectronics SA
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STMicroelectronics SA
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3216Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3283Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/029Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/08Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Description

  • La présente invention concerne des écrans matriciels à affichage électroluminescent composés d'un ensemble de diodes électroluminescentes. The present invention relates to electroluminescent display matrix screens composed of a LED array. Il s'agit par exemple d'écrans composés de diodes organiques ("OLED" de l'anglais Organic Light Emitting Display) ou polymère ("PLED" de l'anglais Polymer Light Emitting Display). This is for example composed of organic diodes displays ( "OLED" English Organic Light Emitting Display) or polymer ( "PLED" English Polymer Light Emitting Display). La présente invention concerne plus particulièrement la régulation de la tension d'alimentation des circuits de commande des diodes électroluminescentes de tels écrans. The present invention relates more particularly to the regulation of the supply voltage of the control circuits of the LEDs such screens.
  • La The figure 1 figure 1 représente un écran matriciel comportant n colonnes C 1 à C n et k lignes L 1 à L k permettant d'adresser n*k diodes électroluminescentes d dont les anodes sont connectées à une colonne et les cathodes à une ligne. represents a matrix screen having n columns C 1 to C n and k lines L 1 to L k for addressing n * k-emitting diodes whose anodes are connected to a column and the cathodes at a line.
  • Des circuits de commande de lignes CL 1 à CL k permettent de polariser respectivement les lignes L 1 à L k . Line control circuits CL 1 to CL k respectively possible to bias the lines L 1 to L k. Seule une ligne est activée à la fois, et est polarisée à la masse. Only one line is activated at a time, and is biased at ground. Les lignes non activées sont polarisées à une tension Vligne. The non-activated lines are biased to a voltage Vline.
  • Des circuits de commande de colonnes CC 1 à CC n permettent de polariser respectivement les colonnes C 1 à C n . Column control circuit CC 1 to CC n respectively possible to bias the columns C 1 to C n. Les colonnes adressant les diodes électroluminescentes que l'on souhaite activer sont polarisées par un courant à une tension V col supérieure à la tension de seuil des diodes électroluminescentes de l'écran. Columns addressing the LEDs that is to be activated are polarized by a current at a higher voltage V pass to the threshold voltage of the light emitting diodes of the display. Les colonnes que l'on ne souhaite pas activer sont mises à la masse. The columns you do not want to activate are grounded.
  • Une diode électroluminescente reliée à la ligne activée et à une colonne polarisée à V col est alors passante et émet de la lumière. A light emitting diode connected to the activated line and a polarized column V-neck is then busy, and emits light. La tension V ligne est prévue suffisamment élevée afin que les diodes électroluminescentes reliées aux lignes non activées et aux colonnes à la tension V col ne soient pas conductrices et n'émettent pas de lumière. The voltage V line is provided sufficiently high so that the light emitting diodes connected to the non-activated rows and columns to the voltage V pass are not conductive and does not emit light.
  • La The figure 2 Figure 2 représente un circuit de commande de colonne CC et un circuit de commande de ligne CL adressant respectivement une colonne C et une ligne L reliées à une diode électroluminescente d de l'écran. represents a CC column control circuit and a line control circuit CL respectively addressing a column C and a line L connected to a light emitting diode of the screen. Le circuit de commande de ligne CL comprend un inverseur de puissance 1 commandé par un signal de commande de ligne φ L . The line control circuit CL comprises a power inverter 1 is controlled by a line control signal φ L. L'inverseur de puissance 1 comprend un transistor NMOS 2 permettant de décharger la ligne L quand φ L est au niveau haut et un transistor PMOS 3 permettant de charger la ligne L à la tension de polarisation V ligne quand φ L est au niveau bas. The power inverter 1 includes an NMOS transistor 2 for discharging the line L when φ L is at high level and a PMOS transistor 3 for charging the line L to the bias voltage V line when φ L is low.
  • Le circuit de commande de colonne CC comprend un miroir de courant réalisé dans le présent exemple avec deux transistors 4, 5 de type PMOS. CC column control circuit comprises a current mirror realized in this example with two transistors 4, 5 of the PMOS type. Le transistor 4 constitue la branche de référence du miroir et le transistor 5 constitue la branche de duplication. The transistor 4 is the mirror of the reference branch and the transistor 5 is the mirror leg. Les sources des transistors 4 et 5 sont connectées à une tension de polarisation V pol de l'ordre de 15 V pour des écrans OLED. The sources of transistors 4 and 5 are connected to a bias voltage V bias of the order of 15 V for OLED displays. Les grilles des transistors 4 et 5 sont reliées l'une à l'autre. The gates of transistors 4 and 5 are connected to each other. Le drain et la grille du transistor 4 sont reliés l'un à l'autre. The drain and the gate of transistor 4 are connected to each other. Le transistor 4 est donc monté en diode, la tension source-grille (Vsg 4 ) étant égale à la tension source-drain (Vsd 4 ). The transistor 4 is connected as a diode, the source-gate voltage (Vsg 4) being equal to the source-drain voltage (Vsd 4). Le courant traversant le transistor 4 est fixé par une source de courant 6 connectée au drain du transistor 4. La source de courant 6 fournit un courant I l dit de "luminance". The current flowing through the transistor 4 is set by a current source 6 connected to the drain of the transistor 4. The current source 6 supplies a current I l called "luminance". Le drain du transistor 5 est relié à la colonne C par l'intermédiaire d'un circuit de sélection de colonne composé d'un transistor PMOS 7 et d'un transistor NMOS 8. La source du transistor PMOS 7 est reliée au drain du transistor 5 et le drain du transistor 7 est relié à la colonne C. La source du transistor 8 est à la masse et son drain est connecté à la colonne C. Un signal de commande de colonne φ C est relié à la grille du transistor PMOS 7 et à la grille du transistor NMOS 8. Quand le signal de commande de colonne φ C est au niveau haut, le transistor 8 décharge la colonne C. Quand il est au niveau bas, le transistor 7 est passant et la colonne C se charge jusqu'à atteindre la tension V col . The drain of the transistor 5 is connected to the column C via a column selection circuit composed of a PMOS transistor 7 and an NMOS transistor 8. The source of the PMOS transistor 7 is connected to the drain of the transistor 5 and the drain of transistor 7 is connected to the column C. the source of the transistor 8 is connected to ground and its drain is connected to the column C. A column control signal φ C is connected to the gate of PMOS transistor 7 and to the gate of NMOS transistor 8. When the φ C column control signal is at high level, the discharge transistor 8 column C. When it is at low level, the transistor 7 is turned on and the column C charges up 'to reach the voltage V col. Quand la ligne L et la colonne C sont activées, les signaux de commande de ligne φ L et de colonne φ C sont respectivement haut et bas, la diode électroluminescente d est passante et le courant traversant la diode est égal au courant de luminance I l . When the line L and column C are activated, the line driving signal φ L and φ C column are high and low respectively, the light emitting diode D is conductive and the current through the diode is equal to the luminance current I l .
  • Cependant, pour que le circuit de commande de colonne CC fonctionne tel que décrit précédemment, il est nécessaire que la tension V pol soit suffisamment élevée pour que la recopie du courant I l soit correcte. However, for the CC column control circuit operates as described above, it is necessary for the voltage V bias is sufficiently high that the copying of the current I l is correct. La tension de polarisation V pol est égale à la somme de la tension source-drain Vsd 2 du transistor 2, de la tension V d aux bornes de la diode électroluminescente d, de la tension source-drain Vsd 7 du transistor 7 et de la tension source-drain Vsd 5 du transistor 5. V pol bias voltage is equal to the sum of the source-drain voltage Vsd 2 of the transistor 2, the voltage V d at the terminals of the light emitting diode d, the source-drain voltage Vsd 7 of the transistor 7 and the source-drain voltage Vsd of the transistor 5 5.
  • Quand la recopie du courant I l est correcte, le transistor 5 est en régime de saturation et la tension Vsd 5 est au minimum égale à la tension source-drain Vsd 4 du transistor 4. Une recopie correcte impose donc que la tension de polarisation V pol soit au moins égale à la somme précédemment mentionnée quand le courant la traversant est égal au courant de luminance I l . When the copy of the current I l is correct, the transistor 5 is in the saturation state and the voltage Vsd 5 is at least equal to the source-drain voltage Vsd of the transistor 4 4. Proper feedback therefore requires that the bias voltage V pol is at least equal to the sum previously mentioned when the current therethrough is equal to the luminance current I l. Si la tension de polarisation V pol est trop faible, le courant traversant la diode électroluminescente d est inférieur au courant I l et la luminance des diodes est insuffisante. If the bias voltage V bias is too low, the current flowing through the light emitting diode d is less than the current I l and the luminance of the diodes is insufficient.
  • Le courant de luminance I l fourni par la source de courant 6 peut de façon générale varier en fonction de la luminance souhaitée pour l'écran. The luminance current I t supplied by the current source 6 can generally vary depending on the desired luminance for the display. Quand le courant de luminance I l augmente, la tension source-drain Vsd 4 du transistor 4 monté en diode augmente et la tension V d de la diode électroluminescente d augmente aussi. When the current I the luminance increases, the source-drain voltage Vsd of the transistor 4 4 diode increases and the voltage V d of the light emitting diode d also increases. Il s'ensuit que la tension de polarisation V pol doit être suffisamment importante pour que le transistor 5 soit en saturation quel que soit le courant de luminance. It follows that the V pol bias voltage must be sufficiently large so that the transistor 5 is in saturation regardless of the luminance current.
  • Toutefois, par souci d'économie d'énergie électrique, on cherche à réduire la tension de polarisation V pol , ce qui permet ensuite de réduire la tension V ligne des circuits de commande de ligne. However, for the sake of power saving, it seeks to reduce the bias voltage V bias, which then reduces the voltage V line line control circuits.
  • Il existe des circuits de commande qui ont une tension de polarisation V pol fixe et déterminée en fonction du courant de luminance Il maximum souhaité. There are control circuits that have a fixed bias voltage V pol and determined according to the current luminance he desired maximum. L'inconvénient de tels circuits est leur forte consommation d'énergie électrique. The disadvantage of such circuits is their high consumption of electrical energy.
  • Il existe d'autres circuits de commande pour lesquels la tension de polarisation V pol varie en fonction du courant de luminance I 1 souhaité. There are other control circuits for which the V pol bias voltage varies depending on the luminance current I 1 desired. Si le courant I 1 est faible, la tension V pol est faible et inversement. If the current I 1 is low, the voltage V bias is low and vice versa. Toutefois, il est nécessaire de prévoir une marge de sécurité pour tenir compte du vieillissement des diodes électroluminescentes de l'écran. However, it is necessary to provide a safety margin to account for the aging of the LEDs of the screen. En effet, à courant égal dans la diode électroluminescente d, la tension V d aux bornes de la diode augmente avec le temps. Indeed, in current of the light emitting diode of the voltage Vd across the diode increases with time. Pour une même luminance, correspondant à un courant de luminance donné, la tension de polarisation minimale V pol nécessaire augmente donc progressivement avec le temps. For the same luminance corresponding to a given luminance current, the minimum V pol bias voltage necessary therefore increases gradually with time. Les économies d'énergie obtenues pour ces circuits ne sont donc pas optimales. The energy savings obtained for these circuits are not optimal.
  • Le document The document US5594463A US5594463A décrit un écran matriciel à diodes électroluminescentes dans lequel la différence de tension sur une des diodes électroluminescentes est mesurée et la tension de polarisation du miroir de courant est adaptée en conséquence. discloses a matrix display, light emitting diode wherein the voltage difference on one of the light emitting diodes is measured, and the bias voltage of the current mirror is adapted accordingly.
  • Les documents The documents JP2000347613A JP2000347613A et and JP11272223A JP11272223A décrivent des écrans matriciels à diodes électroluminescentes dans lesquels la tension à la sortie de la source de courant pour une ou plusieurs diodes électroluminescentes est mesurée et la tension de polarisation des sources de courant est adaptée en conséquence. describe matrix screens, light emitting diode in which the voltage at the output of the current source for one or more light emitting diodes is measured, and the bias voltage of the current source is adapted accordingly.
  • Un objet de la présente invention est de prévoir un circuit de commande de colonne dont la tension de polarisation V pol est la plus faible possible quel que soit le vieillissement des diodes électroluminescentes de l'écran. An object of the present invention is to provide a column control circuit, the V pol bias voltage is as low as possible irrespective of the aging of the LEDs of the screen.
  • Un autre objet de la présente invention est de prévoir un circuit de commande de conception simple. Another object of the present invention is to provide a simple design of control circuit.
  • Pour atteindre ces objets, la présente invention prévoit un dispositif de régulation de la tension de polarisation de circuits de commande de colonnes d'un écran matriciel composé de diodes électroluminescentes reliées chacune à une des lignes et à une des colonnes de l'écran, tel qu'énoncé en revendication 1. To achieve these objects, the present invention provides a bias voltage control device of the column driver circuits of a matrix display composed of light emitting diodes each connected to one of the lines and a column of the screen, such recited in claim 1.
  • La présente invention prévoit aussi un procédé de régulation de la tension de polarisation de circuits de commande de colonnes d'un écran matriciel composé de diodes électroluminescentes reliées chacune à une des lignes et à une des colonnes de l'écran, tel qu'énoncé en revendication 7. The present invention also provides a bias voltage control method control circuit columns of a matrix display composed of light emitting diodes each connected to one of the lines and a column of the screen, as recited in claim 7.
  • Ces objets, caractéristiques et avantages, ainsi que d'autres de la présente invention seront exposés en détail dans la description suivante de modes de réalisation particuliers faite à titre non-limitatif en relation avec les figures jointes parmi lesquelles : These objects, features and advantages, and others of the present invention will be discussed in detail in the following description of specific embodiments in non-limiting in connection with the accompanying drawings:
    • la the figure 1 figure 1 , précédemment décrite, représente un écran électroluminescent matriciel ; , Previously described, shows a matrix electroluminescent display;
    • la the figure 2 Figure 2 , précédemment décrite, représente un circuit de commande de colonne et un circuit de commande de ligne adressant une diode électroluminescente d'un écran ; , Previously described, shows a column control circuit and a line driving circuit addressing a light emitting diode of a screen;
    • la the figure 3 Figure 3 illustre un exemple de réalisation du dispositif de régulation selon la présente invention ; illustrates an exemplary embodiment of the regulating device according to the present invention;
    • la the figure 4 Figure 4 illustre un exemple de réalisation plus détaillé d'un élément du dispositif de la illustrates a more detailed exemplary embodiment of an element of the device of figure 3 Figure 3 ; ;
    • la the figure 5 Figure 5 illustre un autre exemple de réalisation du dispositif de régulation selon la présente invention ; illustrates another embodiment of the regulating device according to the present invention; et and
    • la the figure 6 Figure 6 est un exemple de réalisation plus détaillé d'un élément du dispositif de la is an example of a more detailed embodiment of an element of the device of figure 4 Figure 4 . .
  • La The figure 3 Figure 3 est un schéma d'un mode de réalisation de circuits de commande de colonne et du dispositif de régulation de la tension de polarisation V pol selon la présente invention. is a diagram of one embodiment of column control circuits and the bias voltage V bias control device according to the present invention. Les circuits de commande de colonne comprennent un miroir de courant 9 composé d'une branche de référence b ref et de n branches de duplication b 1 à b n . Column control circuitry comprises a current mirror 9 comprising a reference branch b ref and n duplication branches b 1 to b n. Chaque branche est composée d'un transistor PMOS, P ref pour la branche de référence et P 1 à P n pour les branches b 1 à b n. Each leg is composed of a PMOS transistor, P ref for the reference branch and P 1 to P n for the branches b 1 to b n. Les sources des transistors de chacune des branches sont connectées à la tension de polarisation V pol et les grilles sont reliées les unes aux autres. The sources of the transistors of each branch are connected to the bias voltage V bias and the gates are connected to each other. Le drain et la grille du transistor P ref de la branche de référence sont reliés à une source de courant de référence 10 en un point C ref . The drain and the gate of transistor P ref of the reference branch are connected to a reference current source 10 at a point C ref. La source de courant de référence 10 fournit un courant de luminance I l . The reference current source 10 provides a luminance current I l. Le drain de chaque transistor P i , i étant compris entre 1 et n, est relié à une colonne C i de l'écran par l'intermédiaire d'un circuit de sélection de colonne tel que décrit en relation à la The drain of each transistor P i, i ranging between 1 and n, is connected to a column C i of the screen via a column selection circuit as described in relation to the figure 2 Figure 2 . . L'ensemble des circuits de sélection de colonne sont représentés par un dispositif de sélection 11 commandé par un signal de colonne φ C . All the column select circuits are represented by a selection device 11 controlled by a column signal φ C.
  • Chaque colonne C 1 à C n est connectée à l'anode d'une diode respectivement D 1 à D n . Each column C 1 to C n is connected to the anode of a diode respectively, D 1 to D n. Les cathodes des diodes D 1 à D n sont reliées à une source de courant 15 en un point C o . The cathodes of the diodes D 1 to D n are connected to a current source 15 at a point C o. La source de courant 15 fournit un courant dit d'observation I ob choisi faible par rapport au courant de luminance minimal. The current source 15 provides a current I ob observing said selected low compared to the minimum luminance stream. Par ailleurs, le point de connexion C ref est relié à l'anode d'une diode D ref identique aux diodes D 1 à D n , la cathode de la diode D ref est connectée en un point C oref à une source de courant 16 fournissant un courant égal au courant d'observation I ob . Furthermore, the connection point C ref is connected to the anode of a diode D ref identical to the diodes D 1 to D n, the cathode of the diode D ref is connected to a point C oref to a current source 16 providing a current equal to the current observation I ob. Les points C ref et C oref sont reliés à deux entrées d'un circuit d'ajustement CR qui fournit la tension de polarisation V pol . The points C and C ref oref are connected to two inputs of an adjustment circuit CR that provides the bias voltage V bias.
  • Comme on l'a indiqué précédemment, les diodes électroluminescentes peuvent, même quand elles sont traversées par un même courant, présenter à leurs bornes des chutes de tension différentes. As indicated above, the LEDs may even when they are traversed by the same current, present at their terminals different voltage drops. Notamment, cette chute de tension tend à augmenter quand les diodes électroluminescentes vieillissent. Notably, this voltage drop tends to increase as the LEDs age. La présente invention vise à ajuster la tension V pol pour tenir compte de ces variations de tension et assurer que le courant de luminance I l choisi circule dans toutes les colonnes sélectionnées, V pol restant aussi petit que possible. The present invention seeks to adjust the voltage V pol to take account of these voltage changes and ensure that the current luminance I flows through the selected all the selected columns, V pol remaining as small as possible.
  • Les diodes D 1 à D n correspondant aux colonnes sélectionnées tendent à être conductrices. The diodes D 1 to D n corresponding to the selected columns tend to be conductive. Toutefois, la diode reliée à la colonne ayant la tension la plus élevée impose la tension V o sur les cathodes des diodes D 1 à D n . However, the diode connected to the column having the highest voltage required voltage V o on the cathodes of the diodes D 1 to D n. Les autres diodes ne sont donc pas conductrices car la tension à leurs bornes est inférieure à leur tension de seuil. Other diodes are not conducting because the voltage at their terminals is less than the threshold voltage. La tension V o est l'image de la tension sur la colonne au potentiel le plus élevé décalée d'une tension de seuil de diode. The voltage V o is the image of the voltage on the column at the highest potential shifted by a diode threshold voltage. De même, la tension V oref au point de connexion C oref est l'image de la tension Vref décalée d'une tension de seuil de diode. Similarly, the voltage V oref to the connection point C oref is the image of the offset voltage Vref of a diode threshold voltage.
  • Quand la tension V o est supérieure à la tension V oref , ceci signifie que le courant dans au moins une des colonnes de l'écran est inférieur au courant de luminance I l choisi. When the voltage V o is higher than the voltage V oref, this means that the current in at least one of the columns of the screen is lower than the luminance current I l selected. Le circuit d'ajustement CR rehausse alors la tension de polarisation V pol jusqu'à ce que les tensions V o et V oref soient égales. CR adjustment circuit then raises the bias voltage V bias until the voltages V o and V oref are equal.
  • Inversement, quand la tension V o est inférieure à V oref , ceci implique que le courant de luminance I l choisi circule bien dans toutes les colonnes sélectionnées mais que la tension V pol est trop élevée, ce qui entraîne une surconsommation d'énergie. Conversely, when the voltage V O is less than V oref, this implies that the current luminance I circulates the selected well in all of the selected columns, but as the voltage V pol is too high, resulting in excessive power consumption. Afin de réaliser des économies d'énergie électrique, le circuit d'ajustement diminue la tension de polarisation V pol jusqu'à la tension V pol minimale assurant une circulation du courant de luminance I l dans toutes les colonnes sélectionnées. In order to achieve economies of electrical energy, the adjustment circuit reduces the bias voltage V bias to the minimum voltage V pol ensuring a circulation of the luminance current I l in all selected columns.
  • La The figure 4 Figure 4 est un schéma du circuit d'ajustement de la tension de polarisation V pol en fonction de la différence entre les tensions V o et V oref . is a diagram of the bias voltage V bias adjustment circuit according to the difference between the voltages V o and V oref.
  • Le circuit d'ajustement comprend un amplificateur d'erreur 20, un amplificateur opérationnel 21 et une bascule RS 22 fonctionnant avec une tension d'alimentation faible, par exemple 3,3 V. L'amplificateur d'erreur 20 reçoit sur une entrée positive, la tension V o et sur une entrée négative, la tension V oref . The adjustment circuit comprises an error amplifier 20, an operational amplifier 21 and an RS flip-flop 22 operating with a low supply voltage, for example 3.3 V. The error amplifier 20 receives a positive input , the voltage V o and a negative input, the voltage V oref. Dans le cas où les niveaux des tensions V o et V oref sont très élevés pour l'amplificateur d'erreur 20, on pourra prévoir un convertisseur de tension fournissant des tensions proportionnelles aux tensions V o et V oref , sur une plage de tension plus faible. In the case where the voltage levels V o and V oref are very high for the error amplifier 20, it may be provided a voltage converter providing voltages proportional to voltages V o and V oref over a voltage range over low.
  • L'amplificateur d'erreur 20 amplifie la différence entre V o et V oref et fournit un signal d'erreur er qui varie par exemple entre 1 et 2 V. Quand les tensions V o et V oref sont égales, le signal d'erreur vaut par exemple 1,5 V. Plus la tension V o est élevée par rapport à V oref , et plus le signal d'erreur er est élevé et inversement. The error amplifier 20 amplifies the difference between V o and V oref and provides an error signal er which varies for example between 1 and 2 V. When the voltages V o and V oref are equal, the error signal is for example 1.5 V. the higher the voltage V o is high with respect to V oref, and the error signal er is high and vice versa. Le signal er est appliqué à l'entrée positive de l'amplificateur différentiel 21. La sortie de l'amplificateur différentiel 21 est reliée à la borne de réinitialisation R (reset) de la bascule RS 22. La sortie d'un oscillateur osc est reliée à la borne d'activation S (set) de la bascule RS 22. La sortie Q est au niveau logique haut (par exemple 3,3 V) quand la borne d'activation S est au niveau haut et au niveau logique bas (par exemple 0V) quand la borne de réinitialisation R est au niveau haut. The first signal is applied to the positive input of the differential amplifier 21. The output of the differential amplifier 21 is connected to the reset terminal R (reset) of the RS flip-flop 22. The output of oscillator OSC is S connected to the enable terminal (set) of the RS flip-flop 22. the Q output is at high logic level (e.g., 3.3V) when the enable terminal S is at the high level and the low logic level ( e.g. 0V) when the reset terminal R is high. Quand les deux bornes d'activation S et de réinitialisation R sont au niveau bas, la sortie Q conserve le dernier niveau positionné. When both terminals S and reset R activation are low, the output Q maintains the last level set.
  • La sortie de la bascule RS 22 est reliée à la grille d'un transistor NMOS Tf. The output of the RS flip-flop 22 is connected to the gate of an NMOS transistor Tf. Une résistance R est placée entre la source du transistor Tf et la masse. A resistor R is placed between the source of transistor Tf and ground. Une bobine L est placée entre le drain du transistor Tf et la borne d'alimentation à une tension V bat , par exemple à 3,3 V. L'anode d'une diode D f est reliée au drain du transistor Tf et sa cathode est reliée à une première électrode d'un condensateur C. La seconde électrode du condensateur C est reliée à la masse. A coil L is placed between the drain of transistor Tf and the supply terminal at a voltage V bat, for example 3.3 V. The anode of a diode Df is connected to the drain of the transistor and its cathode Tf is connected to a first electrode of a capacitor C. the second electrode of the capacitor C is connected to ground. La première électrode du condensateur C fournit la tension V pol . The first electrode of the capacitor C supplies the voltage V pol. La source du transistor Tf est reliée à l'entrée négative de l'amplificateur différentiel 21. The source of the transistor Tm is connected to the negative input of the differential amplifier 21.
  • Sur un front montant du signal de l'oscillateur osc, la sortie Q de la bascule RS 22 passe au niveau haut. On a rising edge of the signal of the oscillator OSC, the output Q of the RS flip-flop 22 goes high. Le transistor Tf se ferme et la tension aux bornes de la bobine L passe rapidement de 0 à V bat . The transistor Tf is closed and the voltage at the coil terminals L rapidly accelerates from 0 to V bat. La tension V R aux bornes de la résistance R et le courant dans la bobine L sont initialement nuls. The voltage V R at the terminals of the resistor R and the current in the coil L are initially zero. Le courant dans la bobine L augmente progressivement, la tension V R augmente donc également. The current in the coil L increases gradually, the voltage V R increases so also. Quand la tension V R atteint le signal er de l'amplificateur différentiel 20, l'amplificateur 21 change d'état et passe au niveau haut. When the voltage V R reaches the first signal of the differential amplifier 20, the amplifier 21 changes state and goes high. La sortie Q de la bascule RS 22 passe au niveau bas et le transistor Tf s'ouvre. The output Q of the RS flip-flop 22 goes low and the transistor Tf opens. La tension sur le drain du transistor Tf augmente brutalement. The voltage at the drain of transistor Tf increases abruptly. La diode Df devient passante et le condensateur C se charge. The Df diode becomes conductive and capacitor C charges. Le courant de charge est d'autant plus élevé que le courant traversant la bobine L est élevé au moment où le transistor Tf s'ouvre. The load current is even higher than the current through the coil L is high when the transistor Tf opens.
  • Lors du front montant suivant de l'oscillateur osc, la sortie Q de la bascule RS 22 passe à nouveau au niveau haut et un cycle identique à celui précédemment décrit recommence. At the next rising edge of the oscillator OSC, the output Q of the RS flip-flop 22 goes high again and a cycle identical to that previously described is repeated.
  • Quand la tension V o est supérieure à la tension V oref , le signal er est relativement élevée. When the voltage V o is higher than the voltage V oref, the first signal is relatively high. En conséquence, le transistor Tf reste passant plus longtemps et le courant circulant dans la bobine L au moment de l'ouvertur du transistor Tf est important. Consequently, the transistor Tf remains longer and passing the current through the coil L at the time of the APERTURE of transistor Tf is significant. Le condensateur C se charge et la tension V pol augmente. The capacitor C is charged and the voltage V pol increases. Inversement, quand la tension V o est inférieure à la tension V oref , la tension V pol diminue. Conversely, when the voltage V o is lower than the voltage V oref, voltage V pol decreases.
  • La tension de polarisation V pol est donc ajustée en fonction des variations temporelles de la tension aux bornes des diodes électroluminescentes de l'écran. The bias voltage V bias is adjusted based on temporal variations of the voltage across the LEDs of the screen.
  • Un avantage du dispositif de régulation selon la présente invention est que la tension de polarisation est toujours minimale, ce qui permet de réaliser des économies d'énergie. An advantage of the regulating device according to the present invention is that the bias voltage is always minimum, which allows for energy savings.
  • Un autre avantage d'un tel dispositif est que sa conception est très simple. Another advantage of such a device is that its design is very simple.
  • La The figure 5 Figure 5 est un schéma de circuits de commande de colonne identiques à ceux de la is a diagram of the same column control circuits to those of the figure 3 Figure 3 ainsi qu'un schéma d'une variante de réalisation du dispositif de régulation de la tension de polarisation V pol qui permet de pallier au problème suivant. as well as a diagram of an alternative embodiment of the bias voltage V bias control device which overcomes the following problem. Quand une ligne de l'écran est "noire", c'est-à-dire qu'aucune diode électroluminescente de la ligne sélectionnée n'est conductrice, la tension V o au point C o du circuit de régulation de la When a line of the screen is "black", that is to say that no light-emitting diode of the selected row are conductive, the voltage V o at the point C o of the control circuit of the figure 3 Figure 3 diminue car aucune des diodes D 1 à D n n'est passante. decreases because none of the diodes D 1 to D n is bandwidth. La tension V o diminuant, le circuit d'ajustement CR diminue la tension de polarisation V pol . The voltage V O decreases, the adjustment circuit CR decreases the bias voltage V bias. Dans le cas où un grand nombre de lignes consécutives de l'écran sont noires, la tension de polarisation V pol peut fortement diminuer. If a large number of consecutive lines of the display are black, the bias voltage V bias can decline sharply. Les diodes électroluminescentes conductrices des lignes "éclairées" risquent alors de recevoir un courant inférieur au courant de luminance. The conductive light emitting diode lines "informed" then may receive a current lower than the current luminance. La luminosité globale de l'écran diminue. The overall brightness of the screen decreases.
  • Dans cette variante de réalisation, le dispositif de régulation de la tension de polarisation V pol est identique à celui de la In this embodiment, the V pol bias voltage control device is identical to that of the figure 3 Figure 3 excepté que le point C o est relié au circuit d'ajustement CR par l'intermédiaire d'un interrupteur 31. De plus, un condensateur 32 est placé entre l'entrée du circuit d'ajustement CR et la masse. except that the point C o is connected to the adjustment circuit CR through a switch 31. In addition, a capacitor 32 is placed between the input of CR adjustment circuit and ground. L'interrupteur 31 est commandé de façon à être non passant quand une ligne de l'écran est noire, c'est-à-dire quand aucune diode électroluminescente de la ligne sélectionnée n'est conductrice. The switch 31 is controlled so as to be non-conducting when a line of the screen is black, that is to say when no light-emitting diode of the selected row is conductive. Le condensateur 32 conserve la valeur de la tension V o correspondant à la dernière ligne non noire. The capacitor 32 retains the value of the voltage V o corresponding to the last non-black line. Le dispositif de commande de l'interrupteur, non représenté, analyse le signal de colonne φ C pour savoir si au moins une colonne est sélectionnée et donc qu'au moins une diode est conductrice. The switch control device, not shown, analyzes the column signal φ C to whether at least one column is selected and so that at least one diode is conducting. De plus, selon un mode de réalisation plus perfectionné, le dispositif de commande de l'interrupteur analyse les signaux de commande des circuits de commande de ligne de façon à rendre passant l'interrupteur 31 une fois que les tensions des colonnes sélectionnées sont passées de leurs tensions de précharge à leurs tensions de "fonctionnement" correspondant aux tensions induites par chacune des diodes électroluminescentes conductrices. Furthermore, according to a more sophisticated embodiment, the switch control device analyzes the control signal line driving circuit so as to turn the switch 31 once the voltages of the selected columns are passed from their precharge voltages at their voltages "operation" corresponding to the voltages induced by each of the conductive light emitting diodes.
  • Un avantage d'un tel dispositif de régulation est qu'il permet d'ajuster la tension de polarisation V pol en fonction des caractéristiques des diodes électroluminescentes de l'écran quel que soit le nombre de lignes noires consécutives de l'écran An advantage of such a control device is that it allows to adjust the bias voltage V bias in the characteristics of the LEDs of the screen regardless of the number of consecutive black lines on the screen
  • La The figure 6 Figure 6 est un schéma d'un mode de réalisation de l'amplificateur d'erreur 20 du circuit d'ajustement CR de la is a diagram of an embodiment of the error amplifier 20 of the CR circuit of the adjustment figure 4 Figure 4 qui permet de pallier au problème suivant. which overcomes the following problem. Lorsque l'écran ou les circuits de commande de colonnes ou de lignes comprennent un défaut de fabrication ou un défaut "d'usure" correspondant à une coupure entre une diode électoluminescente et une colonne ou une ligne, la tension V o peut être très proche de la tension de polarisation V pol . When the screen or the columns or lines control circuitry comprises a manufacturing defect or a defect "wear" corresponding to a break between a électoluminescente diode and a column or line, the voltage V o may be very close of the bias voltage V bias. Un tel défaut conduit non seulement à une augmentation démesurée de la tension de polarisation V pol mais aussi à des surtensions susceptibles entre autre de détériorer le circuit d'ajustement CR. Such a defect not only leads to a disproportionate increase in the bias voltage V pol but also overvoltages liable among other damage to the adjustment circuit CR. Dans le cas d'un défaut d'usure, il peut être intéressant de détecter le défaut afin d'éviter de détériorer le reste du circuit et d'éviter d'augmenter la consommation électrique pour fournir une tension V pol élevée. In the case of a wear defect, it may be interesting to detect the fault in order to prevent damage to the rest of the circuit and to avoid increasing the power consumption to provide a high voltage V pol. La détection d'un défaut de fabrication permet de détecter les circuits défaillant avant leur commercialisation. The detection of a manufacturing defect can detect faulty circuits before marketing.
  • L'amplificateur d'erreur représenté en The error amplifier shown in figure 6 Figure 6 comprend deux transistors PMOS 40 et 41 dont les grilles reçoivent respectivement les tensions V o et V oref du dispositif de régulation représenté en comprises two PMOS transistors 40 and 41 whose gates respectively receive the voltages V o and V oref the regulating device shown in figure 3 Figure 3 . . Deux sources de courant identiques 42 et 43 sont placées entre la tension de polarisation V pol et les sources des transistors 40 et 41. Une résistance R1 est placée entre les sources des transistors 40 et 41. Les drains des transistors 40 et 41 sont reliés à un dispositif de conversion 44 qui fournit le signal d'erreur er. Two identical current sources 42 and 43 are placed between the bias voltage V bias and sources of the transistors 40 and 41. A resistor R1 is placed between the sources of transistors 40 and 41. The drains of transistors 40 and 41 are connected to a conversion device 44 which supplies the error signal er. Un transistor PMOS 45 est placé en parallèle sur le transistor 40. La source du transistor 45 est connectée à la source du transistor 40 et le drain du transistor 45 est connecté au drain du transistor 40. La grille du transistor 45 reçoit une tension "de protection" V protect qui est fournie par un dispositif non représenté. A PMOS transistor 45 shunts the transistor 40. The source of transistor 45 is connected to the source of transistor 40 and the drain of transistor 45 is connected to the drain of transistor 40. The gate of transistor 45 receives a voltage "of protection "protect V which is supplied by means not shown. La tension de protection V protect correspond à la tension V o maximale correspondant à un fonctionnement correct de l'écran et des circuits de commande de colonne et de ligne. V protect protection voltage corresponds to the voltage V o maximum corresponding to a correct operation of the screen and column control circuits and line.
  • En fonctionnement normal, sans défaut du circuit, la tension V o est inférieure à la tension de protection V protect . In normal operation without fault circuit, the voltage V o is lower than the protection voltage V protect. Les transistors 40, 41 et 45 sont tels que lorsqu'ils conduisent un courant égal à celui fourni par les sources de courant 42 et 43, leurs tensions grille-source est sensiblement égale à la tension de seuil d'un transistor PMOS. The transistors 40, 41 and 45 are such that when driving a current equal to that supplied by the current sources 42 and 43, their gate-source voltages is substantially equal to the threshold voltage of a PMOS transistor. Ainsi, quand la tension V o est inférieure à la tension V protect , le transistor 45 est non conducteur. Thus, when the voltage V o is less than the voltage V protect the transistor 45 is nonconductive. De même, lorsque les tensions V o et V oref sont différentes les tensions sur les sources des transistors 40 et 41 sont différentes. Similarly, when the voltages V o and V oref are different voltages on the sources of transistors 40 and 41 are different. La résistance R1 est alors traversée par un courant qui est d'autant plus élevé que l'écart entre les tensions V o et V oref est élevé. The resistor R1 is then traversed by a current which is higher as the difference between the voltages V o and V oref is high. Le dispositif de conversion 44 analyse les différences de courant dans les transistors 40 et 41 et fournit un signal d'erreur er d'autant plus élevé que le courant dans le transistor 40 est faible par rapport au courant dans le transistor 41 et inversement. The conversion device 44 analyzes the current differences in the transistors 40 and 41 and provides an error signal ER increases as the current in transistor 40 is small compared to the current in transistor 41 and vice versa.
  • Dans le cas où le circuit présente un défaut, la tension V o peut être très proche de la tension de polarisation V pol . In the case where the circuit has a fault, the voltage V o can be very close to the bias voltage V bias. Lorsque la tension V o dépasse la tension de protection V protect , le transistor 45 devient conducteur et le transistor 40 non conducteur. When the voltage V o exceeds the protection voltage V protect, the transistor 45 becomes conductive and the transistor 40 nonconductive. La tension de polarisation V pol est alors maximale. The bias voltage V bias is then maximum. La valeur maximale de la tension V pol dépend du choix de la tension V protect et de la tension V oref qui est fonction du courant de luminance souhaité. The maximum value of the voltage V pol depends on the choice of the voltage V protect and voltage V oref which is based on the desired luminance current. La présence du transistor 45 permet d'assurer que la tension de polarisation V pol ne dépasse pas une valeur maximale donnée et permet en outre de supprimer des surtensions éventuelles susceptibles d'endommager le circuit d'ajustement CR. The presence of the transistor 45 ensures that the pol V bias voltage does not exceed a given maximum value and further eliminates the possible overvoltages which could damage the adjustment circuit CR.
  • Bien entendu, la présente invention est susceptible de diverses variantes et modifications qui apparaîtront à l'homme de l'art. Of course, the present invention is susceptible to various changes and modifications that occur to those skilled in the art. En particulier, on pourra prévoir d'autres dispositifs d'évaluation du courant circulant dans les diodes électroluminescentes de l'écran ainsi que d'autres dispositifs d'ajustement de la tension de polarisation V pol en fonction des différences entre le courant de luminance souhaité et le plus petit courant traversant les diodes électroluminescentes de l'écran. In particular, provision may be other current evaluation devices flowing in the LEDs of the display and other adjustment of the bias voltage V pol devices based on differences between the desired luminance current and the smaller the current flowing through the light emitting diodes of the display. On pourra notamment utiliser d'autres convertisseurs de tension DC-DC capables de fournir une tension de polarisation V pol élevée quand le signal d'erreur er est élevé et inversement. Use may in particular other DC-DC voltage converters capable of providing a bias voltage V pol high when the error signal er is high and vice versa. En outre, l'homme de l'art saura réaliser un miroir de courant différent de celui décrit, en utilisant par exemple deux transistors par branche. In addition, those skilled in the art will realize a different current mirror that described, for example using two transistors per branch.

Claims (8)

  1. A device for regulating the biasing voltage (Vpol) of column control circuits of a screen array made of LEDs, each coupled to one of the lines and one of the columns of the screen, the column control circuits comprising a current mirror having a reference branch (bref) and several duplication branches (b1 to bn), all the branches being coupled to the biasing voltage (Vpol), each duplication branch (bi) being coupled to a column (Ci) of the screen through a column select circuit (11), the reference branch being connected at a reference node (Cref) to a reference current source (10) providing a desired luminance current (I1), said device being characterized in that it comprises:
    first measuring means (D1 to Dn and 15) arranged for providing a first signal (VO) representative of the voltage of the column at the highest potential;
    second measuring means (Dref and 16) arranged for providing a second signal (Voref) representative of the voltage (Vref) of the reference node (Cref); and
    an adjustment circuit (CR) arranged for receiving the first signal (Vo) and the second signal (Voref) and being adapted to increase the biasing voltage (Vpol) when the first signal (Vo) is larger than the second signal (Voref), which means that the current in at least one of the columns of the screen is lower than the desired luminance current (I1), and adapted to reduce the biasing voltage (Vpol) when the first signal (VO) is lower than the second signal (Voref) , which means that the desired luminance current (I1) flows in all the selected columns but that the biasing voltage (Vpol) is too large.
  2. The device of claim 1, wherein each branch (bi) of the current mirror includes a PMOS field effect transistor (Pi), having a source connected to the biasing voltage, the gates of each branch being connected together, the drain and the gate of the transistor of the reference branch being connected to the reference current source (10), the drains of the transistors of the duplication branches being connected to the columns (C1 to Cn).
  3. The device of claim 1, wherein said first measuring means comprise for each column (Ci) a diode (Di) having an anode connected to the column (Ci) and having a cathode connected to a first observation current source (15) and to a first input of the adjustment circuit, and wherein the second measuring means comprise a diode (Dref) having an anode connected to the reference node and a cathode connected to a second observation current source (16) and to a second input of the adjustment circuit.
  4. The device of claim 3, wherein the cathodes of each diode (Di) are coupled to the first input of the adjustment circuit by a switch (31), a capacitor (32) being connected between the first input of the adjustment circuit (CR) and a fixed voltage node.
  5. The device of claim 3, wherein the adjustment circuit comprises an error amplifier (20) receiving the first signal on a positive input and receiving the second signal on a negative input, an output of error amplifier (er) being connected to a D.C./D.C. voltage converter outputting the biasing voltage (Vpol) and being adapted to increase the biasing voltage (Vpol) when the first signal is higher than the second signal and conversely.
  6. The device of claim 5, wherein error amplifier (20) comprises first and second PMOS transistors (40, 41) having their gates respectively connected to positive and negative inputs of the error amplifier, the source of each one of the first and second transistors being coupled to the biasing voltage (Vpol) by a current source (42, 43), the sources of first and second transistors being coupled by a resistor (R1), the drains of first and second transistors being connected to a converter (44) providing the error signal, the source and drain of a third PMOS transistor (45) being connected to the source and drain of the first transistor (40), the gate of the third transistor being biased at a fixed voltage (Vprotect).
  7. A method for regulating the biasing voltage (Vpol) of column control circuits of a screen array made of LEDs, each coupled to one of the lines and one of the columns of the screen, the column control circuits comprising a current mirror having a reference branch (bref) and several duplication branches (b1 to bn), all the branches being coupled to the biasing voltage (Vpol), each duplication branch (bi) being coupled to a column (Ci) of the screen through a column select circuit (11), the reference branch being connected at a reference node (Cref) to a reference current source (10) providing a desired luminance current (I1), said method being characterized in that it comprises the following steps:
    - providing through first measuring means (D1 to Dn and 15) a first signal (VO) representative of the voltage of the column at the highest potential;
    - providing through second measuring means (Dref and 16) a second signal (Voref) representative of the voltage (Vref) at the reference node (Cref); and
    - increasing the biasing voltage (Vpol) when the first signal (VO) is higher than the second signal (Voref), which means that the current in at least one of the columns of the screen is lower than the desired luminance current (I1), and reducing the biasing voltage (Vpol) when the first signal (VO) is lower than the second signal (Voref), which means that the desired luminance current (I1) flows in all the selected columns but that the biasing voltage (Vpol) is too large.
  8. The method of claim 7, wherein the first signal is an image of the voltage on the column at the higher potential shifted by a diode threshold voltage.
EP20030300065 2002-07-19 2003-07-17 Automatic adaptation of the supply voltage of an electroluminescent panel depending on the desired luminance Expired - Fee Related EP1383103B1 (en)

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US20040017725A1 (en) 2004-01-29
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US20050035933A1 (en) 2005-02-17

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