EP1377517A1 - Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production - Google Patents

Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production

Info

Publication number
EP1377517A1
EP1377517A1 EP02719681A EP02719681A EP1377517A1 EP 1377517 A1 EP1377517 A1 EP 1377517A1 EP 02719681 A EP02719681 A EP 02719681A EP 02719681 A EP02719681 A EP 02719681A EP 1377517 A1 EP1377517 A1 EP 1377517A1
Authority
EP
European Patent Office
Prior art keywords
flexible
layer
region
solid
microelement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP02719681A
Other languages
German (de)
English (en)
Inventor
Torben Lisby
Jens A. Branebjerg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Danish Electronics Light & Acoustics (delta)
Original Assignee
Danish Electronics Light & Acoustics (delta)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danish Electronics Light & Acoustics (delta) filed Critical Danish Electronics Light & Acoustics (delta)
Priority to EP02719681A priority Critical patent/EP1377517A1/fr
Publication of EP1377517A1 publication Critical patent/EP1377517A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/422—Active alignment, i.e. moving the elements in response to the detected degree of coupling or position of the elements
    • G02B6/4226—Positioning means for moving the elements into alignment, e.g. alignment screws, deformation of the mount
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
    • B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
    • B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
    • B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
    • B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
    • B81C1/0019—Flexible or deformable structures not provided for in groups B81C1/00142 - B81C1/00182
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/35—Optical coupling means having switching means
    • G02B6/3502—Optical coupling means having switching means involving direct waveguide displacement, e.g. cantilever type waveguide displacement involving waveguide bending, or displacing an interposed waveguide between stationary waveguides
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2200/00—Solutions for specific problems relating to chemical or physical laboratory apparatus
    • B01L2200/12—Specific details about manufacturing devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L2300/00—Additional constructional details
    • B01L2300/12—Specific details about materials
    • B01L2300/123—Flexible; Elastomeric
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0161—Controlling physical properties of the material
    • B81C2201/0163—Controlling internal stress of deposited layers
    • B81C2201/017—Methods for controlling internal stress of deposited layers not provided for in B81C2201/0164 - B81C2201/0169
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/05—Temporary protection of devices or parts of the devices during manufacturing
    • B81C2201/053—Depositing a protective layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/01—Packaging MEMS
    • B81C2203/0136—Growing or depositing of a covering layer
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/35—Optical coupling means having switching means
    • G02B6/3564—Mechanical details of the actuation mechanism associated with the moving element or mounting mechanism details
    • G02B6/3584—Mechanical details of the actuation mechanism associated with the moving element or mounting mechanism details constructional details of an associated actuator having a MEMS construction, i.e. constructed using semiconductor technology such as etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Definitions

  • the present invention relates to the technical field of miniaturisation of systems in particular to microsystems having flexibility properties so as to enable the microsystem to fold the microsystem in any three-dimensional direction.
  • the prior art techniques includes methods for producing a flexible silicon bar as described in "Mechanical characterisation of flexible silicon microstructures" published for the 14 th European Conference on Solid-State Transducers, in
  • This article describes a fabrication of flexible microstructures using a silicon wafer subjected to shallow boron diffusion to a depth of approximately 3 ⁇ m.
  • the boron doped region serves to control the thickness of the flexible microstructure by defining the amount of base material to be etched away in an alkaline solution.
  • the thin boron doped region provides flexibility of the final microstructure.
  • the article further describes examples of various configurations of the flexible microstructures mechanically tested so as to assure a high mechanical stability. The article, however, fails to provide any means for fabricating microstructures to be applied in any particular system, such as a highly corrosive environment like an alkaline solution.
  • a single-crystal silicon wafer is subjected to silicon epitaxial deposition on a buried silicon oxide layer and the final thickness of the epitaxial deposition layer determines the thickness of the flexible silicon crosspieces i.e. the flexible silicon crosspieces are constituted by the epitaxial deposition layer.
  • the article fails to show how to protect the silicon structures when submitted to a harsh environment.
  • the substrate is entirely used for determining thickness and not as an active material.
  • the flexibility is of the flexible structure is achieved by etching away the silicon or molybdenum substrate, thus the flexible structure is entirely constituted by the polyimide layer and the metallic thin film layer.
  • the polyimide layer provides the flexibility of the flexible structure, however, matching physical properties of a particular polyimide to the physical properties to the substrate is extremely complicated. Further, the use of polyimide excludes the possibility of integrating functionality in the substrate, thus the flexible structure may not be utilised for incorporation of circuit elements.
  • the deep boron diffusion is applied in areas, which are used as pad areas, and the shallow boron diffusion is applied to the area, where the flexible silicon cables are.
  • the flexible silicon cables are thus constituted from the wafer material and the thickness of the flexible silicon cables is determined by the shallow boron diffusion.
  • the article fails to describe how the contact region between the silicon cable and the individual parts should be protected if the cables are used in micro-electromechanical systems (MEMS) subjected to a corroding environment.
  • MEMS micro-electromechanical systems
  • An object of the present invention is to provide a flexible three-dimensional microsystem foldable in all directions. That is to enable torsional and three- dimensionally non-linearly bending of the microsystem.
  • An additional object of the present invention is to provide a flexible three- dimensional microsystem, which is compatible with hostile environments such as encountered within a biological body.
  • a bio-compatible three-dimensional microsystem operational in hostile environments while biological acceptable to biological bodies.
  • a particular advantage of this invention is the provision of means for miniaturisation of microsystems by folding individual elements about each other so as to reduce size of the overall microsystem and simultaneously maintaining mechanical and chemical robustness.
  • a particular feature of this invention is the overall stress stability of a microsystem since forming a unitary structure.
  • the unitary structure eliminates stress induced or caused by joining various parts of different materials having different material properties into an assembly.
  • a method for producing a unitary flexible microelement from a supporting wafer said unitary flexible microelement defining a supporting body having a solid region, a flexible region, an upper surface and a lower surface, and said method comprising the following steps of:
  • the method utilises techniques of producing electronic circuits' in particular involving planar technique as the microelement is produced from a supporting body originating from a wafer body.
  • the unitary structure of the microelement ensures a robust structure since an overall stress compatibility between elements of the microelement is achieved.
  • the wafer may be a non-conducting ceramic or a semiconducting material, where the semiconducting material may be Germanium (Ge), Silicon (Si) or combinations hereof and may be in the form of a semiconductor wafer structure or a semiconductor wafer structure with a silicon oxide sandwiched between two layers of silicon.
  • the semiconducting material may be Germanium (Ge), Silicon (Si) or combinations hereof and may be in the form of a semiconductor wafer structure or a semiconductor wafer structure with a silicon oxide sandwiched between two layers of silicon.
  • the step of defining the thickness of the flexible region may comprise doping the supporting body through a predefined area of the upper surface by diffusing impurity atoms until the impurity atoms reaches a predefined distance between the upper surface and the lower surface, the predefined distance substantially equalling the thickness of the flexible region.
  • the impurity atoms may be diffused utilising boron nitride sources in an oven at a temperature at 1100°C for some few hours until a boron content higher than 5x10 19 atoms/cm 3 to obtain 1 to 10 ⁇ m deep doped regions.
  • doping of the supporting body is accomplished utilising boron diffusion techniques.
  • the step of defining the thickness of the flexible region may comprise implanting impurity atoms at a high energy, the impurity atoms subsequently diffuse until they reach a predefined distance between the upper surface and the lower surface.
  • the step of defining the thickness of the flexible region may comprise diffusing phosphorous atoms into a p-type substrate so as to establish a pn junction which under forward bias will stop the etching when it reaches the n layer, the pn junction may be established at a predefined distance between the upper surface and the lower surface.
  • the step of defining of the thickness of the flexible region may comprise utilising a layered wafer incorporating an insulator layer at a predefined distance between the upper surface and lower surface, the predefined distance substantially equalling the thickness of the flexible region.
  • the step of defining of the thickness of the flexible region may comprise visually determining when the etching of lower surface reaches a predefined distance equalling the thickness of the flexible region.
  • the thickness of the flexible region determines flexibility of the flexible region of the supporting body and the predefined distance is in a range between 1 and 10 ⁇ m such as ranges 2 and 8 ⁇ m, 4 and 6 ⁇ m, or such as ranges 1 and 3 ⁇ m, 3 and 6 ⁇ m, or 6 and 10 ⁇ m.
  • the upper insulating layer and the lower insulating layer according to the first aspect of the present invention each may comprise an inner silicon oxide layer and an outer silicon nitride layer.
  • the inner silicon oxide layer may have a thickness in the range between 1 and 5 ⁇ m, preferably 3000 A, and the silicon nitride layer may have a thickness in the range between 1 and 5000 A, preferably 1200 A.
  • the silicon nitride layers are grown utilising a low-pressure chemical vapour deposition process (LPCVD).
  • LPCVD low-pressure chemical vapour deposition process
  • the upper insulating layer and the lower insulating layer provide a dielectric layer protecting the doped region of the microelement and protecting the solid regions to be defined during a later etching process.
  • the thickness of the inner silicon oxide layer and the silicon nitride layers may be implemented in accordance with any electrically design or customer requirements.
  • the conductive layer according to the first aspect of the invention may enable fluid, optical, mechanical or electrical communication or any combination thereof across the flexible region.
  • fluid guiding means on the upper surface of the flexible region communication is allowed between either end of the flexible region. This is particularly advantageous in microsystem delivering a dosage of fluids from one medium to another medium.
  • optical guiding means on the upper surface of the flexible region optical communication is allowed between elements on either side of the flexible region. This is particularly advantageous in microsystems utilising optical circuitry.
  • the optical guiding means may be defined in the silicon oxide layer and the fluidic guiding means may be implemented by defining recesses in the silicon substrate and use the dielectric layer or the subsequent protective layer as capsule.
  • the conductive layer may further comprise any of the conductive materials Au, Ag, Pt, Ni, Ta, Ti, Cr, Cu, Os, W, Mo, Ir, Pd, Cd, Re, conductive diamond, metal suicides, doped polysilicon or any combinations thereof for enabling electrical communication across the flexible region.
  • the choice of conductive materials should be determined in accordance with the application implemented as a microelement.
  • the metals can be achieved by electrochemical deposition or evaporation or sputtering. If the conductive layer is a nonoxidizing metal an adhesion layer of an non oxidizing metal has to be deposited before the deposition of the conductive metal. If the metal is electrochemical deposited a further non oxidizing metal has to be deposited.
  • the adhesion layer according to the first aspect of the present invention may comprise a chromium (Cr) layer and a gold (Au) layer.
  • the chromium layer may have a thickness in the range between 50 to 150 A, preferably 100 A
  • the gold layer may have a thickness in the range between 500 and 4000 A, preferably 1000 A.
  • Any oxide forming metal may in fact be used as the first layer, however, chromium is particular advantageous since it is resistant to KOH, and any electrochemical depositable metal may be used as the second, however, gold is advantageous since it forms no natural oxide layer.
  • the first aspect of the present invention allows for any customer requirements to be implemented or any circuitry requirements to be evaluated for the determination of choice of conductive materials.
  • the final insulating layer according to the first aspect of the present invention may be a silicon oxide layer achieved by plasma enhanced chemical vapour deposition (PECVD) process and/or a silicon nitride layer achieved by PECVD and/or a silicon oxide nitride layer achieved by PECVD.
  • PECVD plasma enhanced chemical vapour deposition
  • the insulating layer 84 may in fact be any dielectric e.g. spin coated polymer type.
  • the protective layer according to the first aspect of the present invention may comprise nickel (Ni) electroplated on the upper surface. Electroplating nickel on the upper surface provides protection of the microelement during a later etching process and may act as an environmental barrier in the final structure.
  • the etching may be accomplished by utilising potassium hydroxide to etch areas of the supporting body not protected by the protective layer or by the lower insulating layer. The etching ceases as the etching reaches the flexible region.
  • the protective layer may provide a protection of the final structure against corrosion of the final structure, and further may provide protection against any depositing of hazardous materials on the outer surfaces of the final structure, which materials may short circuit or disrupt communication lines on the final structure.
  • the conductive layer deposited on the lower surface to establish a coaxial cable according to the first aspect of the present invention may comprise nickel (Ni) electroplated on the lower surface. Electroplating nickel on the lower surface provides a fully metal encapsulated structure for radio frequency application and may also act as an environmental barrier in the final structure.
  • the solid region according to the first aspect of the present invention may comprise a range of solid sections and wherein the flexible region may comprise a range of flexible sections interconnecting the solid sections so as to establish a unitary flexible microsystem. Further each of the range of solid sections may carry application specific integrated circuits (ASIC), integrated circuits, transducers, sensors, power units, actuators, micro electromechanical systems (MEMS) or any combination thereof.
  • the conductive layer may comprise a plurality of conducting leads and the flexible region may comprise a plurality of flexible elements each supporting a conductive lead of the plurality of conductive leads.
  • the plurality of flexible elements according to the first aspect of the present invention are configured in parallel relative to each other, in parallel meandering fashion between distal ends of the plurality of flexible element relative to each other, in parallel partly meandering fashion at the distal ends of the plurality of flexible elements relative to each other, and/or in non parallel curving between distal ends of the plurality of flexible elements.
  • the alternative configurations of the flexible elements provide any desired flexibility of application of a microelement thus certain configurations of the flexible elements give high flexibility in certain directions, while other configurations of the flexible elements give high flexibility in other directions.
  • the etching and the depositing according to the first aspect of the present invention may be controlled by utilising a photo resist mask defining areas to be exposed to the etching and to the depositing.
  • a wet oxidation process and/or a chemical vapour deposition process may accomplish the growing of the insulating layer.
  • the method according to the first aspect of the present invention may further comprise depositing a conform coating layer surrounding the entire unitary flexible microelement so as to provide a bio-compatible protective layer.
  • the conform coating of the microelement achieves bio-compatibility of the microelement that is to be construed as compatibility between the microelement and a biological body.
  • bio-compatibility should in this context be construed as compatibility between a biological body and an operational entity inserted in the biological body such as the above describe microelement.
  • the compatibility should be construed as bi-directional, that is, the biological body should not be exposed to biological or pharmaceutical unacceptable entities and the operational entity should not be contaminated by the biological body e.g. electrically, magnetically, chemically or otherwise.
  • the general wafer production techniques may be utilised for implementation of the flexibility of a microelement and further may be utilised for implementation of circuitry carried 6y the microelement.
  • the wafer production techniques may be utilised for implementing circuitry and for coating the microelement, while the microelement is on the wafer. This highly increases the precision and the repeatability of the production.
  • the supporting body may be a nonconducting ceramic or a semiconducting material, where the semiconducting material is Germanium (Ge), Silicon (Si) or combinations hereof and may be in the form of a semiconductor wafer structure or a semiconductor wafer structure having a single crystal silicon on insulator (SOI).
  • the semiconducting material is Germanium (Ge), Silicon (Si) or combinations hereof and may be in the form of a semiconductor wafer structure or a semiconductor wafer structure having a single crystal silicon on insulator (SOI).
  • the silicon on insulator is a silicon wafer with a buried silicon oxide layer sandwiched between two layers of silicon and does not consist.of any organic material, in particular polymeric or plastics materials.
  • the unitary flexible microelement according to the second aspect of the present invention may further comprise a second solid region integrally connecting to the first solid region through distal end of the flexible region in coplanar relationship the first solid body and the flexible region.
  • the further second solid region may carry further circuitry communicating with circuitry situated on the first solid region.
  • the flexible region may comprise a plurality of independent flexible sections and wherein the conductive layer comprising a plurality of independent conductive leads, each of the plurality of independent flexible section supporting a conductive lead of the plurality of conductive leads.
  • the flexible region according to the second aspect of the present invention may be configured as a strait single bar, a strait single bar having rounded edges, a strait single bar having merging edges at areas connecting to the first and second solid regions, a strait single bar having merging edges at areas connecting to the first and second solid regions and round edges, and a meandering single bar.
  • Each configuration provides for a particular flexibility thus the selecting configuration of the flexible region is accomplished in accordance with a particular application requiring a particular flexibility.
  • the flexible plurality of independent flexible sections according to the second aspect of the present invention may be configured as a plurality of parallel bars, which bars are strait, meandering or semimeandering, or are configured as a plurality of individually curving bars having outer most positioned bars curving more than inner most positioned bares. Similarly, as described above selecting particular configuration provides for particular flexibility.
  • the unitary flexible microelement according to the second aspect of the present invention may further comprise circuitry connecting to the pads and positioned above the first and/or second solid regions.
  • the circuitry may be implemented as application specific integrated circuits, integrated circuits, sensors, actuators, transducers, micro electromechanical systems (MEMS) or combinations thereof.
  • MEMS micro electromechanical systems
  • the particular implementation of the microelement on semiconducting wafers enables the high accuracy of circuitry to be directly implemented during one coherent process thus implement circuit element directly during the fabrication of the microelement or subsequently to the fabrication of the microelement. Further, by implementing circuitry directly on to the microelement an improved connection is established and additionally the mechanical strength is increased.
  • the circuitry may be flip chip bonded and protected by an underfill positioned between the flip chip circuitry and the upper surface of the supporting body so as to provide protection against deterioration and/or wire bonded to the pads.
  • the underfill establishes a significant protection against diffusion in a direction parallel with the upper surface and in a direction perpendicular with the upper surface.
  • the unitary flexible microelement according to the second aspect of the present invention may further comprise studs positioned on the pads so as to provide a mounting connection from exterior circuitry to the pads. Additionally the unitary flexible microelement may comprise a feed through channel communicating between the upper surface of the supporting body to a lower surface of the supporting body. The feed through channel may connect the pads on the upper surface and pads on the lower surface.
  • the unitary flexible microelement according to the second aspect of the present invention may further comprise a conform coating layer surrounding the entire unitary flexible microelement so as to provide a bio-compatible protective layer.
  • the conform coating provides bio-compatibility between the surrounding environment and the microelement.
  • the surrounding environment is prevented in transmitting any diffusing material to the microelement and further prevented in transmitting any electric, magnetic noise to the microelement and the microelement is prevented in transmitting diffusing material to the surrounding material and further prevented in transmitting any unintentional electric, magnetic noise to the surroundings.
  • the bio-compatibility is particularly relevant in situations where the microelement is operated into a human or animal.
  • the unitary microelement is produced from method according to the first aspect of the present invention and the unitary microelement incorporates any features described with reference to the first aspect of the present invention.
  • circuitry should in this context be construed as application specific integrated circuits, integrated circuits, general electronic components, sensors, actuators, transducers, micro electromechanical systems (MEMS) or combinations thereof.
  • MEMS micro electromechanical systems
  • the unitary flexible circuit system according to the third aspect of the present invention may be manufactured at wafer level by a method as described with reference to the first aspect of the present invention.
  • the entire microsystem may be manufactured at wafer level so as to achieve significant production advantageous such as great repeatability
  • the unitary flexible circuit system according to the third aspect of the present invention incorporates any features described with reference to a method according to the first aspect of the present invention and incorporates any features described with reference to a unitary flexible microelement according to the second aspect of the present invention.
  • a unitary mechanical stress-decoupling system comprising a rigid frame, a rigid element, a plurality of flexible beams integrally connecting said rigid frame and said rigid element so as to provide a stress-decoupling between said rigid frame and said rigid element.
  • the plurality of flexible beams according to the fourth aspect of the present invention may define a conductive layer for enabling communication between the rigid frame and the rigid element. Further, the system may be produced utilising a method as described with reference to the first aspect of the present invention.
  • the unitary mechanical stress-decoupling system according to the fourth aspect of the present invention incorporates any features described with reference to a method according to the first aspect of the present invention, incorporates any features described with reference to a unitary flexible microelement according to the second aspect of the present invention, and incorporates any features described with reference to an unitary flexible microsystem according to the third aspect of the present invention.
  • a unitary aligning module for aligning a first optical wave-guide and a second optical wave-guide and comprising a substrate supporting an unitary flexible microelement comprising a supporting body defining a first solid region and a flexible region extending outwardly in coplanar relationship from said solid region from upper surface of said supporting body and said unitary flexible microelement supporting said first optical wave-guide, and said substrate further supporting a deflection actuator having an upper surface supporting said second optical wave-guide and said deflection actuator controlling deflection of said flexible region so as to position said first optical wave-guide and said second optical wave-guide in alignment.
  • the deflection actuator according to the fifth aspect of the present invention may generate an electrostatic, an electromagnetic or a magnetic force for deflecting the flexible region.
  • the unitary flexible microelement further may comprise a conductive layer connecting to a resistor providing a thermal actuation of the flexible region.
  • the unitary aligning module according to the fifth aspect of the present invention incorporates any features described with reference to a method according to the first aspect of the present invention, incorporates any features described with reference to a unitary flexible microelement according to the second aspect of the present invention, incorporates any features described with reference to an unitary flexible microsystem according to the third aspect of the present invention, and incorporates any features described with reference to an unitary mechanical stress-decoupling system according to the fourth aspect of the present invention.
  • a unitary flexible microelement for communicating fluid comprising a first rigid part defining a first input passage and a first output passage communicating the fluid, a second rigid part defining a second input passage and a second output passage communicating the fluid, a flexible part interconnecting the first rigid part and the second rigid part and having a channel receiving the fluid from the first output passage and transporting the fluid to the second input passage, and a protective layer covering at least parts of upper surface of the unitary flexible microelement .
  • the unitary flexible microelement according to the sixth aspect of the present invention may preferably be manufactured at wafer level in accordance with the method according to the first aspect of the present invention.
  • the unitary flexible microelement may be manufactured during a single manufacturing process, which has superior repeatability.
  • the microelement may be used for medical appliances.
  • the first rigid part according to the sixth aspect of the present invention may further comprise a plurality of first input passages for receiving a plurality of fluids and a first plurality of output passages.
  • the flexible part may further comprise a plurality of channels connecting to each of the plurality of first output passages so as to communicate the plurality of fluids to the second rigid part.
  • the second rigid part may further comprise a plurality of second input passages receiving the plurality of fluids from the first rigid part, a channel mixer section connecting the plurality of second input passages mixing the plurality of fluids so as to generate a mixed fluid, and a plurality of second output passages ejecting the mixed fluid.
  • the unitary flexible microelement according to the sixth aspect of the present invention incorporates any features described with reference to a method according to the first aspect of the present invention, incorporates any features described with reference to a unitary flexible microelement according to the second aspect of the present invention, incorporates any features described with reference to an unitary flexible microsystem according to the third aspect of the present invention, incorporates any features described with reference to an unitary mechanical stress- decoupling system according to the fourth aspect of the present invention, and incorporates any features described with reference to an unitary aligning module according to the fifth aspect of the present invention.
  • Fig. 1 shows a wafer comprising a series of flexible elements.
  • Fig. 2 shows two individual flexible elements.
  • Fig. 3a through 3u shows production steps employed in obtaining a flexible element utilising Boron diffusion.
  • Figs. 4a through 4k show production steps employed in obtaining a flexible element utilising reactive ion etch from a silicon on insulator substrate.
  • Figs. 5a through 5c show in three views a flexible element comprising conductive leads.
  • Figs. 6a through 6j show a multiplicity of embodiments of flexible sections connecting rigid regions.
  • Fig. 7 shows a first example of an utilisation of a flexible element connecting rigid regions mounted onto separate planes of a unit.
  • Fig. 8 shows a second example of an utilisation of a flexible element connecting rigid regions mounted on the same plane of a unit.
  • Figs. 9a and 9b show examples of a circuit element comprising a first section including a flip chip bonded die and a second section including a wire-bonded die.
  • Fig. 10 shows an example of an utilisation of flexible elements enabling bending of a microsystem.
  • Fig. 11 shows a second example of an utilisation of flexible elements provided in a mechanical stress-decoupling set-up.
  • Figs. 12a and 12b show a third example of an utilisation of flexible elements provided in an aligning module.
  • Figs. 13a and 13b show a fourth example of an utilisation of flexible elements provided in a flexible structure communicating fluids between to rigid sections.
  • Fig. 1 shows an example of wafer designated in its entirety by reference numeral 10 and comprising a plurality of framed flexible elements 12.
  • the material of the wafer 10 may comprise any ceramic materials or semiconducting materials such as germanium Ge, silicon Si or combinations thereof.
  • Ge, Si or combinations thereof firstly advantageously enables the possibility of applying integrated circuit fabrication technology hence benefiting from the micro-fabrication technology as such, in particular miniaturisation and repeatability in production.
  • the use of the materials Ge, Si or combinations thereof enables the possibility of implementing circuit elements, e.g.
  • ASIC application specific integrated circuits
  • sensor elements sensor elements, actuator elements, transducer elements, micro electro mechanical systems (MEMS), or other three-dimensional microsystems
  • MEMS micro electro mechanical systems
  • the flexible elements during the same manufacturing process and further enables circuit elements, sensor elements, actuator elements, transducer elements, micro electro mechanical systems (MEMS), and/or other three-dimensional microsystems to be connected subsequently to the flexible element manufacturing process applying wafer scale apparatus.
  • the wafer 10 may have a thickness in the range from 100 to 700 ⁇ m, preferably in the range 300 to 700 ⁇ m. However thinner regions may be implemented.
  • Fig. 2 shows an example of two framed flexible elements designated in their entirety by reference numeral 12 and shown as one of the plurality of flexible elements in Fig. 1.
  • the two framed flexible elements 12 comprise a rigid region constituting a . frame 11 surrounding both flexible elements designated by reference numeral 13 and 14.
  • Each of the two flexible elements 13, 14 per se comprise a plurality of flexible sections 16,18, 20 and 22 and comprise rigid regions or pads designated by reference numerals 23, 24, 25 and 26.
  • the flexible elements 13 and 14 may be fixed to the frame 11 in a wide variety of ways.
  • the flexible element 14 is connected to the frame 11 by thin rigid bridges all designated by reference numeral 27 and the flexible element 13 is connected to the frame 11 by thin flexible sections 18 and 20.
  • the flexible elements 13 and 14 comprise perforations 28, 30, 32 and 34. These perforations 28, 30, 32 and 34 ensure an easy separation of flexible elements 13 and 14 from the frame 11.
  • the flexible sections 16 and 22 allow three- dimensional flexibility so as to ensure that the flexible sections 16 and 22 may connect circuit elements positioned at various angles relative to each other.
  • the flexibility of the flexible sections is achieved by reducing the wafer thickness at particular locations, such as the flexible sections 16, 18, 20 and/or 22 on the wafer 10, at which location flexibility is required so as to enable manoeuvrability of the circuit elements positioned on either side of the flexible sections relative to each other.
  • a first manufacturing technique for obtaining the reduction of the wafer thickness is in the following described in greater detail with reference to Figs. 3a through 3u and a second manufacturing technique will be described in greater detail with reference to Figs. 4a through 4k.
  • Fig. 3a through 3u show cross-sectional views of a section 50 of a wafer during a series of steps in a manufacturing process utilising boron diffusion techniques.
  • Each of the Figs. 3a through 3u includes two cross-sectional views of the section 50 during one step.
  • the first view on the left hand side of the figures is defined as the longitudinal cross-sectional view of the section 50 in a cut indicated by a first vertical line defined by reference numeral 51 shown on the right hand side figure.
  • the second view on the right hand side of the figures is defined as the transversal cross- sectional view of the section 50 in a cut indicated by a second vertical line designated by reference numeral 52.
  • the section 50 is an example of an implementation of a flexible element in this context to be construed as the initial basic element for obtaining a flexible element as described with reference to Figs. 1 and 2. Hence the section 50 may incorporate any number of flexible sections.
  • silicon oxide layers 54 and 56 are grown onto both sides of a substrate 58 of silicon, as shown in Fig. 3a.
  • the silicon oxide layers 54 and 56 have a thickness in the range from 4000 A to 8000 A, preferably a thickness of approximately 6000 A.
  • the growing of silicon oxide layers 54 and 56 are generally accomplished by a wet oxidation process.
  • a photo resist is deposited onto the upper silicon oxide layer 56.
  • the photo resist is exposed through a mask defining areas to be etched on the upper silicon oxide layer 56 and upon development the photo resist is removed in the areas defined by the mask.
  • the silicon oxide layer 56 may be etched in any desired pattern.
  • the particular etching of the silicon oxide layer 56 results in two open areas in the silicon oxide layer 56, as shown in Fig. 3b, delimited by silicon oxide elements 60 of the silicon oxide layer 56.
  • the etching is generally accomplished by immersing the wafer and thus the section 50 into diluted hydrofluoric acid, which etches the silicon oxide layers in areas not protected by the photo resist.
  • photo resist is deposited onto the lower silicon oxide layer 54 before the wafer is immersed into the diluted hydrofluoric acid to protect it from the etching. Subsequently to etching of the wafer the photo resist is removed again.
  • the section 50 is then placed in a diffusion oven with solid boron nitride sources.
  • the substrate 58 is being doped establishing a boron diffusion layer designated by reference numeral 64 and shown in Fig. 3c is achieved.
  • the diffusion takes place at temperatures of approximately 1000°C for a few hours to obtain 1 to 10 ⁇ m deep doped regions in the substrate 58 having a boron content greater than 5-10 19 atoms/cm 3 .
  • the silicon oxide layers 54 and 60 are removed together with the boron glass generated in the oven by placing the section 50 into the diluted hydrofluoric acid.
  • the section 50 now entirely comprises the boron diffusion layer 64.
  • silicon oxide layers 55 and 57 are grown onto both sides of a substrate 58 of silicon, as shown in Fig. 3e.
  • the silicon oxide layers 55 and 57 have a thickness in the range from 4000 A to 8000 A, preferably a thickness of approximately 6000 A.
  • the growing of silicon oxide layers 55 and 57 are generally accomplished by a wet oxidation process.
  • a photo resist is deposited onto the upper silicon oxide layer 57.
  • the photo resist is exposed through a mask defining areas to be etched on the upper silicon oxide layer 57 and upon development the photo resist is removed in the areas defined by the mask.
  • the silicon oxide layer 56 may be etched in any desired pattern.
  • the particular etching of the silicon oxide layer 57 results in a longitudinal grove in the silicon oxide layer 57, as shown in Fig. 3f, transversely delimited by silicon oxide elements 62 of the silicon oxide layer 57.
  • the etching is generally accomplished by immersing the wafer and thus the section 50 into diluted hydrofluoric acid, which etches the silicon oxide layers in areas not protected by the photo resist.
  • photo resist is deposited onto the lower silicon oxide layer 55 before the wafer is immersed into the diluted hydrofluoric acid to protect it from the etching. Subsequently to etching of the wafer the photo resist is removed again.
  • the section 50 is then placed in a diffusion oven with solid boron nitride sources.
  • the substrate 58 is being doped extending the boron diffusion layer designated by reference numeral 64 and shown in Fig. 3g.
  • the diffusion takes place at temperatures of approximately 1000°C for a few hours to obtain 1 to 10 ⁇ m deep doped regions in the substrate 58 having a boron content greater than 5-10 19 atoms/cm 3 .
  • the silicon oxide layers 55 and 57 are removed together with the boron glass generated in the oven by placing the section 50 into the diluted hydrofluoric acid.
  • the section 50 now entirely comprises the boron diffusion layer 64.
  • new silicon oxide layers 66 and 68 are grown on upper and lower surfaces of the substrate 58, as shown in Fig. 3i.
  • the thickness of the new silicon oxide layers 66 and 68 is in a range from a few A to several ⁇ m, preferably the thickness is approximately 3000 A.
  • the silicon oxide layers are generally grown using wet oxidation process.
  • Silicon nitride layers 70 and 72 are grown on top of the new silicon oxide layers 66 and 68 using a low-pressure chemical vapour deposition (LPCVD) process.
  • LPCVD low-pressure chemical vapour deposition
  • the thickness of the silicon nitride layers 70 and 72 on the outward facing surfaces of the new silicon oxide layers 66 and 68 is in a range from a few A to 5000 A, preferably the thickness is approximately 1200 A.
  • the new silicon oxide layers 66 and 68 and the silicon nitride layers 70 and 72 cover the substrate 58 and the boron diffusion layer 64.
  • a photo resist is deposited onto the lower surface of the section 50, that is the outer surface of the silicon nitride layer 72.
  • the photo resist is exposed through a mask and developed so as to leave specific areas nonprotected.
  • the mask utilised for defining the etching areas of lower surface of the section 50 defines solid regions of the final flexible section 50.
  • the silicon nitride layer 72 is removed by a reactive ion etch process leaving only areas designated by reference numerals 74 and 76, as shown in Fig. 3j, and defining solid regions of the final flexible section 50.
  • Photo resist is further deposited onto the upper surface of the sections 50, that is the outer surface of the silicon nitride layer 70.
  • the photo resist is as before exposed through a mask and developed so as to leave specific areas non- protected.
  • the mask applied to the upper surface of the section 50 ensures that photo resist is deposited substantially above the boron diffusion layer 64 thus protecting this area during the reactive ion etch process.
  • the silicon nitride layer 70 and the silicon oxide layer 66 are removed by a reactive ion etch process leaving only areas protected by the photo resist, as shown in Fig. 3j.
  • the photo resist is removed from upper and lower surfaces of the section 50 and an first adhesion layer 78 of titanium is evaporated onto the upper surface of the section 50.
  • the first adhesion layer 78 generally has a thickness in a range from 50 to 150 A, preferably the thickness is approximately 100 A.
  • a second layer 80 of gold is evaporated onto the upper surface of the section, shown in Fig. 3k.
  • the second layer 80 generally has a thickness in a range from 500 to 4000 A, preferably the thickness is approximately 1000 A.
  • Photo resist is now deposited on the outer surface of the second adhesion layer 80 exposed through a mask and developed defining regions of the final flexible section 50 to be electrically conductive. A few ⁇ m of metal is deposited in the defined regions, shown in Fig. 31 as an electrically conductive layer designated by reference numeral 82.
  • the conductive layer 82 may be implemented in any conductive material such as any metal materials compatible with the overall process for manufacturing a flexible element.
  • the conductive material may be deposited by any means such as e-beam evaporation, sputtering and electroplating.
  • a suicide or highly doped, polysilicon allowing higher temperature processing steps than metal may be implemented as the conductive material.
  • the photo resist is removed from the upper surface of the second adhesion layer 80 and the wafer hence the section 50 is immersed into Entreat® so as to etch away the second adhesion layer 80 of gold, and is immersed into hydroflouric acid to etch away the first adhesion layer 78 titanium, as shown in Fig. 3m.
  • An insulating layer designated by reference numeral 84 is deposited and patterned with the photo lithography method described previously as shown in Fig. 3n.
  • the insulating layer may be a silicon oxide layer achieved by plasma enhanced chemical vapour deposition (PECVD) process and/or a silicon nitride layer achieved by PECVD and/or a silicon oxide nitride layer achieved by PECVD.
  • PECVD plasma enhanced chemical vapour deposition
  • the insulating layer 84 may in fact be any dielectric e.g. spin coated polymer type.
  • first adhesion layer of chromium is evaporated onto the upper surface of the section 50.
  • the first adhesion layer generally has a thickness in a range from 50 to 150 A, preferably the thickness is approximately 100 A.
  • second layer of gold is evaporated onto the upper surface of the section.
  • the second layer generally has a thickness in a range from 500 to 4000 A, preferably the thickness is approximately 1000 A.
  • the combination of the two layers serves as a plating base for the subsequent plating and is designated by numerals 86 and is shown in Fig. 3o.
  • a few ⁇ m of nickel designated by reference numeral 88 is electroplated onto the upper surface of the section 50, shown in Fig. 3p.
  • the nickel layer 88 will act as a protective layer against potassium hydroxide used in a subsequent processing step.
  • a further layer of gold designated by reference numeral 89 is then deposited on the nickel layer 88 by means of an ion exchange process.
  • Photo resist is now deposited on the outer surface of the gold layer 89 exposed through a mask and developed defining regions of the final openings in the nickel layer for contact to bondpads.
  • the wafer hence the section 50 is immersed into Entreat® so as to etch away the layer 89 of gold in the defined openings in the photo resist as shown in Fig. 3p.
  • the photo resist is removed from the upper surface of the gold layer 88 and the wafer hence the section 50 is immersed into diluted hydrofluoric acid to remove the exposed areas of silicon oxide layer 68 on the lower surface the section 50 as shown in Fig. 3q.
  • the wafer hence the section 50 is then immersed into potassium hydroxide to etch the remaining exposed areas of the substrate 58.
  • the etching is continued until a thickness ensuring the flexibility of the final flexible structure 50 is reached.
  • the etching process ceases as it reaches the boron diffusion layer 64 as shown in Fig. 3r.
  • the wafer hence the section 50 is then immersed into nitric acid to etch away the protective nickel layer 88 in the regions defined by openings in the gold layer 89 and the wafer hence the section 50 is immersed into Entreat® subsequently immersed into a Cerium sulphate solution to etch away the plating base 86 as shown in Fig. 3s.
  • first adhesion layer of chromium is evaporated onto the lower surface of the section 50.
  • the first adhesion layer generally has a thickness in a range from 50 to 150 A, preferably the thickness is approximately 100 A.
  • a second layer of gold is evaporated onto the lower surface of the section.
  • the second layer generally has a thickness in a range from 500 to 4000 A, preferably the thickness is approximately 1000 A.
  • a few ⁇ m of nickel is electroplated onto the lower surface of the section 50.
  • the combination of the three metal layers designated by numerals 90 onto the lower surface of the section ensures that the section 50 is totally encapsulated by metal so as to provide a coaxial cable structure as shown in Fig. 3t.
  • a further layer of gold designated by reference numeral 92 is then deposited on the conductive layer 82 in the bond pad openings by means of an ion exchange process as shown in Fig. 3u.
  • Fig. 4a through 4k show cross-sectional views of a section 100 of a wafer during a series of steps in a manufacturing process utilising reactive ion etch techniques.
  • each of the Figs. 4a through 4k includes two cross-sectional views of the section 100 during one step.
  • the first view on the left hand side of the figures is defined as the longitudinal cross-sectional view of the section 100 in a cut indicated by a first vertical line defined by reference numeral 101 shown on the right hand side figure.
  • the second view on the right hand side of the figures is defined as the transversal cross-sectional view of the section 100 in a cut indicated by a second vertical line designated by reference numeral 102.
  • the section 100 is an example of an implementation of a flexible element in this context to be construed as the initial basic element for obtaining a flexible element as described with reference to Figs. 1 and 2.
  • the section 100 may incorporate any number of flexible sections.
  • silicon oxide layers 104 and 106 are grown onto both sides of a silicon on insulator substrate 108, as shown in Fig. 4a.
  • the silicon on insulator substrate 108 incorporates a buried silicon oxide layer 107 sandwiched between two layers of silicon and does not consist of any organic material, in particular polymeric or plastics materials, utilised for controlling a later etching process and determining the final flexibility of the flexible element.
  • the thickness of the silicon oxide layers 104 and 106 is in a range from few A to several ⁇ m, preferably the thickness is approximately 3000 A. Further, the silicon oxide layers are generally grown using wet oxidation process.
  • Silicon nitride layers 110 and 112 are grown on top of the silicon oxide layers 104 and 106 using a low-pressure chemical vapour deposition (LPCVD) process.
  • the thickness of the silicon nitride layers 110 and 112 on the outward facing surfaces of the silicon oxide layers 104 and 106 is in a range from a few A to 5000 A, preferably the thickness is approximately 1200 A.
  • a photo resist is deposited onto the lower surface of the section 100, that is the outer surface of the silicon nitride layer 112.
  • the photo resist is deposited, exposed through a mask and developed so as to leave specific areas non-protected.
  • the mask utilised for defining the etching areas of lower surface of the section 100 defines solid regions of the final flexible section 100.
  • the silicon nitride layer 112 is removed by a reactive ion etch process leaving only areas designated by reference numerals 114 and 116, as shown in Fig. 4c, and defining solid regions of the final flexible section 100.
  • a photo resist is further deposited onto the upper surface of the sections 100, that is the outer surface of the silicon nitride layer 110.
  • the photo resist is as before exposed through a mask and developed so as to leave specific areas non- protected.
  • the mask applied to the upper surface of the section 100 defines a dielectric region as well as desired flexible regions of the section 100.
  • the reactive ion etching process is continued on the upper surface of the section 100 until a few ⁇ m of material has been removed from the upper section 100 and stops on the oxide layer in the silicon on insulator substrate.
  • the reactive ion etching process leaves a longitudinal bar at the centre of the upper surface of the section 100, while etching away regions designated by reference numerals 118 and 120 shown in Fig. 4d.
  • a adhesion layer 122 comprising firstly a layer of chromium evaporated onto the upper surface of the section 100.
  • the chromium layer 122 generally has a thickness in a range from 50 to 150 A, preferably the thickness is approximately 100 A.
  • the adhesion layer 122 further comprising a gold layer evaporated onto the upper surface of the chromium layer.
  • the gold layer generally has a thickness in a range from 500 to 4000 A, preferably the thickness is approximately 1000 A.
  • Photo resist is now deposited on the outer surface of the adhesion layer 122 exposed through a mask, and developed defining regions of the final flexible section 100 to be electrically conductive. A few ⁇ m of conductive material is deposited in the defined regions, shown in Fig. 4f as an electrically conductive layer designated by reference numeral 124.
  • the conductive layer 124 may be implemented in any conductive material such as any metal materials compatible with the overall process for manufacturing a flexible element.
  • the conductive material may be deposited by any means such as e-beam evaporation, sputtering and electroplating.
  • a suicide or highly doped polysilicon allowing higher temperature processing steps than metal may be implemented as the conductive material.
  • the photo resist is removed from the upper surface of the section 100 and a few ⁇ m of nickel is electroplated to the surface, shown in Fig. 4g as a nickel layer designated by reference numeral 126.
  • the nickel layer 126 will act as a protective layer for the upper surface of the section 100 against potassium hydroxide used in a subsequent processing step. Further, by leaving the nickel layer 126 on the surface of the upper surface of the section 100 the nickel layer 126 may act as a protective layer for protecting the section 100 against corrosion or hazardous depositing on the section 100.
  • an optical guide is established in dielectric layer so as to enable optical communication between the solid regions of the flexible element 50, 100.
  • a fluid conducting groove or tunnel is established within the substrate 50, 100 so as to enable fluid communication between the solid regions of the flexible element 50, 100.
  • the adhesion layer 122 receives a piezo electric layer so as to enable mechanical movement of the flexible section of the transmitting mechanical signal to the surroundings.
  • the adhesion layer 122 receives a combination of optical guide, fluid conducting groove or tunnel, piezo electric layer and an electric conductive layer.
  • the wafer hence the section 100 is immersed into diluted hydrofluoric acid to remove the exposed areas of silicon oxide layer 110 on the lower surface the section 100 as shown in Fig. 4h as regions designated by reference numerals 128, 130 and 132.
  • the wafer hence the section 100 is then immersed into potassium hydroxide to etch the remaining exposed areas of the substrate 108.
  • the etching is continued until a thickness ensuring the flexibility of the final flexible section 100 is reached.
  • the etch ceases on the oxide layer in the silicon on insulator substrate.
  • the removed regions are shown in Fig. 4i as reference numerals 134, 136 and 138.
  • the wafer hence the section 100 is then immersed into nitric acid to etch away the protective nickel layer 126 as shown in Fig. 4j.
  • the wafer hence the section 100 is immersed into Entreat® so as to etch away the gold layer of the adhesion layer 122 and is subjected to plasma clean in oxygen converting the chromium in the chromium layer of the adhesion layer 122 to chromium oxide, which subsequently will evaporate.
  • the final flexible section 100 is shown in Fig. 4k, and comprises a flexible element 140 defined between the two rigid silicon substrate elements 142 and 144.
  • the flexible section 100 consists of the two rigid silicon substrate elements 142 and 144, the initial buried silicon oxide 107, the upper silicon layer of the initial silicon on oxide substrate 108 with the flexible region 140, the upper insulating layers 104 and 112, the adhesion layer 122 and finally the conductive layer 124. Only the thin silicon layer in the flexible element 140 assures the mechanical support and determines the flexible properties.
  • Fig. 5a through 5c show an example of a flexible element designated in its entirety by reference numeral 150.
  • Fig. 5a shows in a top view, the flexible element 150 comprising two rigid regions 152 and 154 on either side of a flexible centre section 156 connecting the two rigid regions 152 and 154 and enabling the two rigid regions 52 and 154 to be shifted relative to each other in three dimensions.
  • the flexible element 150 further comprises on the top surface electrically conductive leads 158 for enabling electric communication between the two rigid regions 152 and 154.
  • the conductive leads 158 may be implemented in any conductive material such as any metal materials compatible with the overall process for manufacturing a flexible element.
  • the conductive material may be deposited by any means such as e-beam evaporation, sputtering and electroplating. Alternatively, a suicide or highly doped polysilicon allowing higher temperature processing steps than metal may be implemented as the conductive material.
  • the conductive leads 158 are terminated at each rigid region 152 and 154 in connection terminals 160.
  • the conductive leads 158 may in an alternative embodiment be terminated directly into circuit elements or microsystems implemented in the rigid regions 152 and 154 or into circuit elements or microsystems mounted onto the rigid regions 152 and 154.
  • Fig. 5b shows a first cross-sectional view of a cut in the flexible element 150, which cut is indicated in Fig. 5a as vertical line 162 in the flexible centre section 156.
  • the flexible centre section 156 has an overall thickness in a range between 1 to 10 ⁇ m, preferably the thickness of the flexible centre section 156 is approximately 5 ⁇ m.
  • the flexible centre section 156 comprises a substrate 164 provided with one or two insulating layers 166 and/or 168.
  • the first insulating layers 166 and/or 168 may be a silicon oxide layer achieved by thermal diffusion or by a chemical vapour deposition (CVD) process and/or a silicon nitride layer achieved by CVD.
  • the insulating layers 166 and/or 168 may in fact be any dielectric e.g. spin coated polymer type.
  • a further or a multiple of second insulating layers 170 are deposited so as to insulate electrically and electromagnetically the conductive leads 158 from the exterior environment. Further the second insulating layer or layers 170 protect the conductive leads 158 from corroding.
  • the second insulating layer or layers 170 may as described with reference to the first insulating layers 166 and 168 be any dielectric materials deposited.
  • a metal sheet 172 is applied to assure a coaxial interconnect type of the flexible element.
  • Fig. 5c shows a second cross-sectional view of a cut in the flexible element 150, which cut is indicated in Fig. 5a as vertical line 172 in the rigid region 154.
  • the rigid regions 154 and 156 have an overall thickness in a range between 100 to 1000 ⁇ m, typically in a range between 300 to 700 ⁇ m and preferably the thickness is approximately 350 ⁇ m.
  • the terminals 160 comprise conductive pads 174 connecting to the conductive leads 158 and a bond pad 176 added on top of the conductive pads 174.
  • the bond pad 176 is deposited in the openings of the terminals so as to allow a microsystem to be connected electrically to the conductive pads 174.
  • Figs. 6a through 6j show a wide variety of alternative embodiments of flexible centre sections 200 connecting at each end to rigid regions 202 and 204.
  • the flexible centre sections 200 enable shifting the rigid regions 202 and 204 in three dimensions relative to one another.
  • Each embodiment of the flexible centre sections 200 shown in Figs. 6a through 6j serve a particular design criterion.
  • the each embodiment may appropriately ensure the highest mechanical stability of the substrate.
  • the embodiments comprise straight single beams, as shown in Figs. 6b and 6c, plurality of straight parallel beams, as shown in Figs. 6d to 6f, plurality of straight parallel beams having curved or corrugated distal ends, as shown in Figs. 6g and 6h, and meandered type structure of beams, as shown in Fig. 6i.
  • the meandered type structure of beams allows the flexible element to be elongated dynamically or twisted and turned statically so as to enable for vertical and/or horizontal alignment between the two rigid regions 202 and 204.
  • Fig. 6j shows a single corrugated beam allowing the flexible element to be elongated dynamically or twisted and turned statically so as to enable for vertical and/or horizontal alignment between the two rigid regions 202 and 204.
  • Fig. 7 shows a first utilisation of the flexible element comprising two rigid regions 210 and 212 connected to one another by a flexible centre section 212.
  • the flexible element is positioned on a block 216 having the first rigid region 210 of the flexible element positioned on a horizontal surface 218 of the block 216, and the second rigid region 212 positioned on a vertical surface 220 of the block.
  • the flexible centre section 214 thus twists twice by 90° in to planes.
  • Fig. 8 shows second utilisation of the flexible element comprising as before two rigid regions 230 and 232 connected to one another by a flexible centre section 234.
  • the flexible element is positioned on a block 236 having an elevated surface area 238 supporting the second rigid region 232 and having a non-elevated surface area 240 supporting the first rigid region 230.
  • the flexible centre section 234 thus twist twice by 90 ° in one plane.
  • Figs. 9a and 9b show flexible element designated in its entirety by reference numeral 250.
  • the figures show two alternative mounting implementations on the flexible element 250.
  • Fig. 9a shows a flip chip bonded first circuit element 258 positioned on a first rigid region 260 with underfill 254 and 256 covering the entire gap between the circuit element 258 and rigid region 260.
  • Fig. 9b shows a wire- bonded die 262 having a second circuit element 264 positioned on a second rigid region 266.
  • a vertical line designated by reference numeral 267 in both Figs. 9a and 9b indicate a connection point of the flexible element 250 between the two figures.
  • the first rigid region 260 is integrally connected to the second rigid section 266 by a flexible centre section 268.
  • the thickness of the flexible centre section 268 is determined by controlling the above with reference to Figs. 3 and 4 described manufacturing processes.
  • the flexible centre section 268 consist only of a semiconducting or a ceramic material preferable silicon and assures the mechanical support and defines the flexible properties of the structure and no organic material is used for the mechanical support of the flexible structure.
  • the flexible element 250 comprises a first dielectric layer 270 grown on an upper surface of a substrate constituted by the flexible centre section 268 and the first and second rigid regions 260 and 266 respectively.
  • the flexible element 250 further comprises conductive leads 272 connecting the first and the second circuit elements 258 and 264.
  • bonding pads 274 may be positioned on the outward- facing surface of the conductive leads 272 for receiving gold studs 276, 278, 280 and 282 electrically connected to the bonding pads 274 and enabling electrical communication between the first and the second circuit element.
  • the gold studs 280 and 282 are connected to the second circuit element through wires 284 and 286 and the gold studs 276 and 278 are connected to the first circuit element through further bonding pads 288.
  • a second dielectric layer 290 is deposited on top of the conductive leads 272 and lastly the upper surface of the flexible element 250 is coated with a protective metal coating 292 such as a gold, silver, aluminium or nickel layer.
  • the underfill 254, 256 is applied to encapsulate bonding pads on the flip chip bonded die 252.
  • the underfill material may be epoxy or another polymer.
  • the underfill 254, 256 provides the possibility of protecting the conductive parts of the system from the surroundings.
  • the combination of the underfill 254, 256 providing extensive diffusion distances in a direction parallel to the upper surface of the system and the protective metal coating 292 supporting the underfill 254, 256 by providing extensive resistance for diffusion in a direction perpendicular to the upper surface of the system gives an unique protection of the system.
  • the combination may provide environmental compatibility between the surroundings and the flexible element 250. In this context environmental compatibility should be construed as chemical, mechanical, electrical and magnetic compatibility both from the surrounding to the flexible element 250 but also from the flexible element 250 to the surroundings.
  • the underfill 254 will eventually allow moisture to penetrate from the surroundings to the gold studs 276, however, the diffusion length through the underfill 254 is relatively long since the moisture has to penetrate in a direction parallel to the upper surface of the system.
  • the diffusion length through the metal barrier will be on the order of microns, whereas through the polymer on the order of 100 microns.
  • the protective solution would be to encapsulate the die region with a glass capsule.
  • the wire-bonded die 262 may be further protected by a shielding 294.
  • the shielding 294 may be implemented in a material, which is compatible with a particular application.
  • the shielding 294 may be implemented in a glass material so as to achieve bio-compatibility.
  • the shielding 294 may be a multi-layered material, in which each layer may have a particular function for establishing compatibility. That is for example, a glass layer for establishing insulating and bio-compatible layer, aluminium foil for providing electromagnetic shielding from external noise sources.
  • a thin protective coating it is advantageous to have a planar surface, since the planar surface provides a smooth basis for receiving the protective coating and ensures that no parts are left unprotected.
  • the integration of the flexible centre section 268 in a micro system makes it possible to transfer an optical or electrical signal away from a critical region where the microsystem is exposed to a harsh environment while maintaining a planar surface.
  • the shielding 294 may be implemented in a flexible structure so as to encapsulate the wire-bonded die 262.
  • Fig. 10 shows a further utilisation of the flexible element designated in its entirety by reference numeral 300.
  • the flexible element 300 constitutes a hearing aid comprising a microphone section 302, an amplifier section 304, and a load speaker section 306 folded about a battery section 308.
  • the sections 302, 304, 306 and 308 are mounted on a unitary flexible substrate having rigid regions 310, 312, 314, 316, 318 and 320 integrally connected by flexible substrate sections 322, 324 and 326.
  • the figure additionally shows feed-through units 328 and 330 connecting the upper and lower surfaces of the rigid regions 314 and 320.
  • Fig. 11 shows a mechanical stress-decoupling set-up designated in its entirety by. reference numeral 350.
  • the mechanical stress-decoupling set-up 350 comprises a solid frame 352 and a solid element 354, and comprises plurality of thin flexible silicon beams 356 interconnecting the solid frame 352 and solid element 354 so as to enable free movement of the solid element 354 relative to the solid frame 352.
  • the silicon beams 356 each carry a conductive channel 358 for enabling communication between devices 360 situated on the solid frame 352 and devices 362 situated on the solid element 354.
  • the conductive channel 358 may in a first embodiment of the present invention enable optical communication between the devices 360 and 362, in a second embodiment of the present invention enable electrical communication between devices 360 and 362, in a third embodiment of the present invention enable fluid communication between devices 360 and 362, and in a fourth embodiment of the present invention enable a combination of electrical, optical or fluid communication between devices 360 and 362.
  • FIGs. 12a and 12b show two cross sectional views of an aligning module designated in its entirety by reference numeral 400.
  • a mounting substrate 402 supports a solid silicon section 404 having a thin flexible section 406 protruding from one edge of the section 404.
  • the section 404 carries electrically conductive leads 408 on its upper surface connecting to a resistor 410 integrated into the thin flexible section 406. Additionally, the upper surface of the section 404 incorporates a first optical waveguide 412.
  • the mounting substrate 402 further supports a second optical wave- guide 414 positioned on a support including an electrostatic actuator 416.
  • the first optical wave-guide 412 may be defined in the dielectric layers deposited during the manufacturing process.
  • the first optical wave-guide 412 in one embodiment of the present invention may be defined as a core layer of dielectric having a high refractive index sandwiched between two dielectric layers having a lower refractive index.
  • the second n optical wave-guide 414 may be implemented as general state of the art optical wave-guides.
  • the aligning module 400 is used for pick tailing optics.
  • the signal from the first optical wave-guide 412 has to be guided to the second optical wave-guide 414.
  • a thermal actuation or electrostatic actuation is used to achieve the right position of the optical signal.
  • the thermal actuation is accomplished by leading a current through the resistor 410 causing the temperature of the surrounding material to increase thus expanding.
  • the electrostatic actuation is accomplished by the electrostatic actuator 416 having an electrode 418 providing a first electrostatic potential inducing a deflection of the thin flexible section 406 having a second electrostatic potential.
  • the second electrostatic potential is provided by the resistor 410.
  • the electrostatic actuator 416 may be replaced by an electromagnetic actuator.
  • the integrated optics 412 and the optical wave-guide 414 are aligned within a few microns and fixed to the mounting substrate 402.
  • thermal actuation, electrostatic actuation or electromagnetic actuation the first optical wave-guide 412 and the second optical wave-guide 414 will be aligned with sub-micron accuracy before the final encapsulation that fix the first optical wave-guide 412 and the second optical wave-guide 414 in the aligned position.
  • Figs. 13a and 13b show two cross sectional views of a flexible structure designated in its entirety by reference numeral 450.
  • the flexible structure 450 might be manufactured as the section 100 described with reference to Figs. 4a to 4k.
  • the flexible structure 450 comprises two rigid solid sections 452 and 454 interconnected by a thin flexible section 456.
  • On the upper surface 458 of the rigid section 452 supports a cover 460 such as a hollow glass capsule, which cover 460 provides a first set of channels 462 between the upper surface 452 and the cover 460.
  • the rigid section 452 comprises passages 464 allowing fluid to flow through the rigid section 452 to the first channel 462.
  • the first channel 462 may be divided into two separate channels by a separation wall 465.
  • the separation wall 465 may be utilised for separating two fluids to transfer to the rigid section 452 thus delaying any mixture of the fluids until their reach the rigid section 452.
  • Second channels 466 defined in the thin flexible section 456 enable fluid to flow between the two rigid sections 452 and 454.
  • the fluid may enter from the first channels 462 to the second channels 466 through openings 468.
  • the fluids flow to the rigid section 452 were the second channels 466 merge into a single third channel 470 thus mixing the fluids.
  • Passages 472 allow the fluids to escape the rigid section 452.
  • the second channels 466 are covered by a protective layer 474 such as film or plate.
  • recesses are etched in the surface of the wafer either by a wet etch in KOH or a dry etch by reactive ion etching to establish the second channels 466.
  • the recesses are filled with a sacrificial layer that can be a resist or a silicon oxide and finally the wafer will be covered with a thin film constituting the protective layer 474.
  • the protective layer 474 may be a spin coated polymer type that is later protected for the final KOH etch, or it can be electroplated nickel.
  • the flexible structures will then be realised with a KOH etch.
  • the sacrificial layer is then removed by a selective etch (resist with acetone, oxide with BHF).
  • the thin flexible section 456 will be used for transport of fluid while in the solid regions 452 and 454 mixing and reactions can take place.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Clinical Laboratory Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Hematology (AREA)
  • General Health & Medical Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Micromachines (AREA)

Abstract

L'invention concerne un procédé pour produire un micro-élément souple, formant une seule pièce, à partir d'une plaquette de support. Ce micro-élément définit un corps de support présentant une région solide et une région souple constituée par une partie mince de la plaquette de support. Ce procédé comprend les étapes suivantes : définition de l'épaisseur de la région souple, croissance d'une couche d'isolation supérieure sur la surface supérieure couvrant la zone définie et croissance d'une couche d'isolation inférieure sur la surface inférieure couvrant la région solide. Ce procédé consiste également à définir une couche conductrice sur la zone prédéfinie de la zone supérieure, déposer une couche d'isolation finale sur la surface supérieure couvrant la couche conductrice et déposer une couche de protection métallique sur la surface supérieure couvrant la couche d'isolation. Ce procédé consiste en outre à attaquer la surface inférieure jusqu'à ce que l'épaisseur de la région souple soit atteinte, et à déposer une couche conductrice sur la surface inférieure afin de créer un conducteur coaxial.
EP02719681A 2001-03-27 2002-03-27 Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production Withdrawn EP1377517A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP02719681A EP1377517A1 (fr) 2001-03-27 2002-03-27 Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP01610035 2001-03-27
EP01610035A EP1245528A1 (fr) 2001-03-27 2001-03-27 Microsystème unitaire flexible et son procédé de fabrication
PCT/DK2002/000214 WO2002076879A1 (fr) 2001-03-27 2002-03-27 Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production
EP02719681A EP1377517A1 (fr) 2001-03-27 2002-03-27 Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production

Publications (1)

Publication Number Publication Date
EP1377517A1 true EP1377517A1 (fr) 2004-01-07

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EP01610035A Withdrawn EP1245528A1 (fr) 2001-03-27 2001-03-27 Microsystème unitaire flexible et son procédé de fabrication
EP02719681A Withdrawn EP1377517A1 (fr) 2001-03-27 2002-03-27 Microsysteme souple, formant une seule piece, robuste chimiquement et mecaniquement, et son procede de production

Family Applications Before (1)

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EP01610035A Withdrawn EP1245528A1 (fr) 2001-03-27 2001-03-27 Microsystème unitaire flexible et son procédé de fabrication

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EP (2) EP1245528A1 (fr)
WO (1) WO2002076879A1 (fr)

Families Citing this family (5)

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Publication number Priority date Publication date Assignee Title
DE102004011203B4 (de) * 2004-03-04 2010-09-16 Robert Bosch Gmbh Verfahren zum Montieren von Halbleiterchips und entsprechende Halbleiterchipanordnung
US7202552B2 (en) * 2005-07-15 2007-04-10 Silicon Matrix Pte. Ltd. MEMS package using flexible substrates, and method thereof
WO2015183534A1 (fr) 2014-05-28 2015-12-03 3M Innovative Properties Company Dispositifs mems sur substrat flexible
EP3478628B1 (fr) 2016-06-30 2021-03-24 Robert Bosch GmbH Emballage de dispositif de capteur mems à port latéral
JP2021028664A (ja) * 2019-08-09 2021-02-25 日東電工株式会社 光電気複合伝送モジュール

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DE69418615T2 (de) * 1993-10-08 1999-09-16 Microchip (Proprietary) Ltd., Pretoria Katalytischer gassensor
US5889211A (en) * 1995-04-03 1999-03-30 Motorola, Inc. Media compatible microsensor structure and methods of manufacturing and using the same
US5992769A (en) * 1995-06-09 1999-11-30 The Regents Of The University Of Michigan Microchannel system for fluid delivery
JP3361916B2 (ja) * 1995-06-28 2003-01-07 シャープ株式会社 微小構造の形成方法
US5999269A (en) * 1996-02-09 1999-12-07 Gte Laboratories Incorporated One-dimensional active alignment of optical or opto-electronic devices on a substrate
WO1998037425A1 (fr) * 1997-02-21 1998-08-27 Matsushita Electric Works, Ltd. Element detecteur d'acceleration et son procede de production

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EP1245528A1 (fr) 2002-10-02
WO2002076879A1 (fr) 2002-10-03

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