EP1310936A1 - Energierückgewinnung in einer Treiberschaltung zum treiben einer kapazitiven Last - Google Patents

Energierückgewinnung in einer Treiberschaltung zum treiben einer kapazitiven Last Download PDF

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Publication number
EP1310936A1
EP1310936A1 EP02257365A EP02257365A EP1310936A1 EP 1310936 A1 EP1310936 A1 EP 1310936A1 EP 02257365 A EP02257365 A EP 02257365A EP 02257365 A EP02257365 A EP 02257365A EP 1310936 A1 EP1310936 A1 EP 1310936A1
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EP
European Patent Office
Prior art keywords
inductor
circuit
current
path
switching device
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP02257365A
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English (en)
French (fr)
Inventor
Robert G. Marcotte
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Panasonic Corp
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Matsushita Electric Industrial Co Ltd
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Publication of EP1310936A1 publication Critical patent/EP1310936A1/de
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
    • G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
    • G09G2330/024—Power management, e.g. power saving using energy recovery or conservation with inductors, other than in the electrode driving circuitry of plasma displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation

Definitions

  • the present invention relates to a sustain signal driver circuit for a capacitive display panel and, more particularly, to a sustain signal driver circuit for minimizing power loss when driving a capacitive load.
  • Plasma display panels are well known in the art and include a front plate with horizontal electrode pairs having a capacitance there between.
  • the electrode pairs are covered by a glass dielectric layer and a magnesium oxide (MgO) layer.
  • a back plate supports vertical barrier ribs and plural vertical column electrodes.
  • the individual column electrodes are covered with red, green, or blue phosphors, as the case may be, to provide for a full color display.
  • the front and rear plates are sealed together and the space there between is filled with an electrically dischargeable gas.
  • a pixel is defined by an intersection of an electrode pair on the front plate and three column electrodes for red, green, and blue, respectively, on the back plate.
  • the electrode pair on the front panel has a region of overlap therebetween.
  • the width of the electrode pair and the thickness of the dielectric glass over the electrode pair determine the pixel's discharge capacitance, which in turn influences the discharge power and therefore the brightness of the pixel.
  • a number of discharges are controlled to provide a desired brightness for the panel.
  • Each sustain pulse consists of a positive going resonant transition, activation of a pull up driver to source a gas discharge current, a negative going resonant transition, and activation of a pull down driver.
  • the sustain pulse is applied to a first one of the electrodes in the pair, and then, the same sequence is applied to the second electrode in the pair.
  • the gas discharge occurs at the completion of the rising transition.
  • Display devices such as plasma displays require high speed charging and discharging of the capacitive loads of the pixels with relatively high voltages, e.g., 50 to 200 volts, over a broad range of frequencies, e.g., 10KHz to 500KHz.
  • Energy recovery sustainers have been developed for plasma displays to enable recovery of energy used to charge and discharge a panel's capacitance.
  • AC plasma displays have grown in size and as operating voltages have increased, the needs of increased switching efficiency and precise control of the turn-on of output drivers has become critical.
  • U.S. Patent No. 5,081,400 to Weber et al. discloses an energy recovery circuit.
  • U.S. Patent No. 5,642,018 to Marcotte discloses using a signal derived from an energy recovery inductor to precisely control the turn-on of the output drivers for an energy recovery circuit.
  • U.S. Patent No. 5,828,353 to Kishi et al. discloses a circuit for producing a pulse having asymmetrical rising and falling transistions.
  • the circuit includes an application inductor in parallel with a recovery inductor.
  • the application inductor influences only the rising transition, and the recovery inductor influences only the falling transition.
  • the terms “closed” and “on” correspond to a state where current can be conducted through the switch or transistor, and the terms “open” and “off” correspond to a state where current cannot be conducted through the switch or transistor.
  • FIG. 1 shows an idealized schematic of a circuit that includes a prior art sustain driver 100.
  • Sustain driver 100 includes four switches, S1, S2, S3 and S4, which are controlled so that sustain driver 100 progresses through four successive switching states, i.e., State 1, State 2, State 3 and State 4.
  • Sustain driver 100 outputs a sustain pulse, which is represented as a panel voltage Vp.
  • a control signal is provided from a source as in input to sustain driver 100 to control the progression of States 1 - 4.
  • the control signal is a logic level signal, e.g., 0 - 5 volts, having a leading rising edge and a lagging falling edge.
  • Each idealized circuit described herein, e.g., sustain driver 100 in FIG. 1, is driven by such a control signal, but the source is shown only in the detailed circuit views, e.g., source 12 in FIG. 3.
  • FIG. 2 shows, for the circuit of FIG. 1, a waveform of voltage Vp and a waveform of a current I L through an inductor L.
  • the waveforms of FIG. 2 are those expected as switches S1 - S4 are opened and closed through the progression of States 1- 4.
  • Sustain driver 100 operates with a power supply voltage Vcc. Assume that prior to State 1 a recovery voltage Vss is at Vcc/2, Vp is at zero, S1 and S3 are open, and S2 and S4 are closed. A capacitance Cp is the panel capacitance as seen by sustain driver 100. A recovery capacitance Css must be much greater than Cp to minimize a variation of Vss during States 1 and 3. The reason that Vss is at Vcc/2 will be explained, below, after the switching operation is explained.
  • S3 is closed. Through S3, Vp is clamped at Vcc and a current path is provided from Vcc for any "ON" pixels in the panel. When a pixel is in the ON state, its periodic discharges provide a substantial short circuit across an ionized gas. The current required to maintain the discharge is supplied from Vcc.
  • the discharge/conduction state of a pixel is represented by icon 10.
  • S4 is closed. Through S4, Vp is clamped to ground.
  • another sustain driver 105 which is identical to sustain driver 100, drives the opposite side of the panel to Vcc. If any pixels are "ON”, then a discharge current flows through S4.
  • Vss remains stable at Vcc/2 during charging and discharging of Cp.
  • the reasons for this are as follows. If Vss were less than Vcc/2, then on the rise of Vp, when S 1 is closed, the forcing voltage would be less than Vcc/2. Subsequently, on the fall of Vp, when S2 is closed, the forcing voltage would be greater than Vcc/2. Therefore, on average, current would flow into Css. Conversely, if Vss were greater than Vcc/2, then on average, current would flow out of Css. Thus, the stable voltage at which the net current into Css is zero, is Vcc/2. In fact, on power up, as Vcc rises, if sustain driver 100 is continuously switched through the four states described above, then Vss will rise, with Vcc, to Vcc/2.
  • FIG. 3 is a schematic of a sustain driver 300, which serves as an exemplary implementation of the idealized circuit of FIG. 1.
  • FIG. 4 is a timing diagram for several of the waveforms for sustain driver 300.
  • FIG. 3 four transistors, T1, T2, T3 and T4, replace switches S1, S2, S3 and S4, respectively, of FIG. 1.
  • a zener diode Z1 is connected to a node VG1 at a gate of transistor T1 to protect transistor T1.
  • zener diodes Z2 and Z3 are connected at nodes VG2 and VG3 to protect transistors T2 and T3.
  • Transistors T1 and T3 have P-channels, and thus are turned on when a falling edge signal is provided at their gates.
  • Transistors T2 and T4 have N-channels, and thus are turned on when a rising edge signal is provided at their gates.
  • a first driver, Driver 1 produces a signal that is coupled through a capacitor Cg1 to node VG3 to control transistor T1, and through a capacitor Cg2 to control transistor T2.
  • T1 and T2 operate in a complementary fashion so that when T1 is on, T2 is off and vice-versa.
  • a second driver, Driver 2 uses either a time constant of a resistor R1 and a capacitor C3, or a voltage fall at a node V1, to turn on transistor T4.
  • a third driver, Driver 3 uses either a time constant of a resistor R2 and a capacitor C4, or a voltage rise at a node V2, and provides a signal that is coupled through a capacitor Cg3 to turn on transistor T3.
  • Two diodes, D3 and D4, are used to quickly turn off transistors T3 and T4.
  • a generic driver 305 is shown to represent a typical internal configuration of Driver 1, Driver 2 and Driver 3.
  • a source 12 provides a control signal such that T1 is turned on and T2 is turned off. T3 is waiting to be turned on by the R2-C4 time constant or by the rise of voltage at node V2. T4 is turned off.
  • Vss is applied to nodes V1 and A.
  • Vp rises past Vss approaching Vcc, at which point I L goes to zero.
  • the panel voltage Vp drops as energy is taken out of the panel by the flyback current and put back into inductor L between times t1 and t2.
  • This energy also known as flyback energy, is dissipated in T3, L, D2, and a diode DC2.
  • T3 is turned on to clamp Vp at Vcc and to provide a current path for any discharging "ON" pixel. Since energy was put into inductor L, negative current I L continues to flow from T3, and through inductor L, diode D2 and diode DC2, until the energy is dissipated. All of the aforesaid components are low loss components so the current decay is slow.
  • Source 12 provides the control signal such that T1 is turned off, T2 is turned on, T3 is turned off, and T4 remains off.
  • Vp is approximately at Vcc, as panel capacitance Cp is fully charged.
  • Vp falls past Vss approaching ground, at which point I L is zero.
  • inductor L Since Vp typically falls to 20% of Vcc, inductor L thereafter sees a forcing voltage, toward the panel side, of Vss minus Vd. Positive current I L now flows out towards the panel drawing current through the inductor L, reverse biases diode D2 and discharges the capacitance of T1, pulling node V1 sharply to ground. A second flyback current through inductor L occurs at time t3 and is coupled through C3 to Driver 2, which turns on T4.
  • T4 clamps Vp to ground.
  • another sustain driver (not shown in Fig. 3), which is identical to sustain driver 300, drives the opposite side of the panel to Vcc. If any pixels are "ON”, then a discharge current flows through T4.
  • FIG. 5 illustrates a sustain driver 500, which is disclosed in the Marcotte'018 patent as an improvement over sustain driver 100 of FIG. 1.
  • FIG. 6 is a waveform diagram illustrating the operation of sustain driver 500.
  • a control network 20 has been added and is coupled to inductor L via a secondary winding 22.
  • Control network 20 controls the conductivity states of switches S3 and S4.
  • Control network 20 uses the voltage across inductor L (and secondary winding 22) to slowly close the output switch S3 after the output has risen past its halfway point. On the fall, switch S4 is slowly closed after the output descends past the halfway point.
  • Diode DC2 and resistor R2 dampen one polarity of flyback current and a diode DC1 and resistor R1 dampen the opposite polarity flyback current.
  • the conductivity states of S1 and S2 are controlled by circuitry (not shown in FIG. 5) that is responsive to input rise and fall of a logic control signal.
  • Switches S2 and S4 are opened, and switch S1 is closed.
  • Vss is applied to node A.
  • the voltage at node A is represented as voltage V A .
  • Control network 20 senses across secondary winding 22, a voltage Vc', which is proportional to Vc, and allows switch S3 to be turned on only after Vp has crossed Vss, the half-way point, and then only during the rise of Vp.
  • Vc' a voltage proportional to Vc
  • switch S3 is closed at the positive peak of Vc, time t1 and the instant the inductor L current I L equals zero (see FIG. 6).
  • S3 is to be closed and ready for full conduction when I L falls to zero at the end of State 1. This action enables the following flyback current through inductor L to be drawn from the Vcc supply, through S3, and not from the panel.
  • S4 is closed while a second sustain driver 505 on the opposite side of the panel produces a sustain pulse that rises, discharges, and falls since S4 is part of the return path for the second sustain driver.
  • the flyback current is drawn from S4 rather than from the panel, and returns the voltage Vc back to zero.
  • the energy recovery circuits disclosed in the Weber et al. '400 and Marcotte '018 patents employ a single resonant inductance, and therefore, these circuits provide sustain pulses that have symmetrical rise and fall times.
  • the rising transition must be fast and the turn-on of the pull up driver must be fully ON before the discharge occurs.
  • the falling transition does not produce a discharge and the energy recovery efficiency of the panel can be increased if the edge rate is reduced. Nevertheless, the turn on timing of the pull down driver influences the efficiency of the panel and the generation of electrical noise.
  • a circuit for providing a pulse to drive a capacitive load comprises (a) a first inductive component that influences both a transition time of a rising edge of the pulse and a transition time of a falling edge of the pulse, and (b) a second inductive component that influences one of the transition time of the rising edge and the transition time of the falling edge so that the rising edge and the falling edge are asymmetrical.
  • the present invention improves on the design disclosed in the Marcotte '018 patent by adding a second inductor in series with the original inductor such that current during the rise flows through the original inductor, and current for the fall flows through the original inductor and the second inductor. For the fall, the sum of the inductances of the two inductors provides a longer falling transition time.
  • the secondary windings described by the Marcotte '018 patent may be placed on the original inductor for the precise control of the pull up and pull down drivers respectively.
  • the secondary winding used for the pull down driver may be placed the second inductor.
  • Another embodiment of the invention provides a slower rise time with a longer fall time.
  • FIG. 1 is an idealized circuit diagram of a prior art sustain driver for an AC plasma panel.
  • FIG. 2 is a waveform diagram illustrating the operation of the circuit of FIG. 1.
  • FIG. 3 is a detailed circuit diagram of the idealized prior art sustain driver of FIG. 1.
  • FIG. 4 is a waveform diagram illustrating the operation of the circuit of FIG. 3.
  • FIG. 5 is an idealized circuit diagram of another prior art sustain driver for an AC plasma panel.
  • FIG. 6 is a waveform diagram illustrating the operation of the circuit of FIG. 5.
  • FIG. 7 is an idealized schematic of a sustain driver in accordance with the present invention.
  • Fig. 8 is a waveform diagram illustrating the operation of the circuit of FIG. 7.
  • FIG. 9 is an idealized schematic of a sustain driver that improves on the design of the sustain driver shown in Fig. 7.
  • FIG. 10 is a waveform diagram illustrating the operation of the sustain driver of FIG. 9.
  • FIG. 11 is a schematic of a variation of the circuit shown in Fig. 9.
  • FIG. 12 is a timing diagram of the circuit shown in FIG. 11.
  • FIG. 13 is a schematic of another variation of the circuit shown in Fig. 9.
  • FIG. 14 is a schematic of another variation of a circuit in accordance with the present invention for providing asymmetrical rise and fall times.
  • FIG. 7 is an idealized schematic of a sustain driver 700, in accordance with the present invention, for a plasma display panel.
  • the principal components of sustain driver 700 are four switching devices, i.e., switches, S1, S2, S3 and S4 and two inductive components, i.e., inductors L1 and L2.
  • a control signal is provided from a source (not shown in FIG. 7) to control switches S1 - S4 so that sustain driver 700 progresses through four successive switching states, i.e., State 1, State 2, State 3 and State 4.
  • Sustain driver 700 outputs a sustain pulse, which is represented as a panel voltage Vp.
  • L1 influences both a transition time of a rising edge of the sustain pulse and a transition time of a falling edge of the sustain pulse.
  • L1 and L2 influence the transition time of the falling edge so that the rising edge and the falling edge are asymmetrical.
  • a first current flows through L1 to produce the rising edge, and a second current flows through both of L1 and L2 to produce the falling edge.
  • S 1 enables and disables a path for the first current
  • S2 enables and disables a path for the second current.
  • a capacitance Cp is the panel capacitance as seen by sustain driver 700.
  • a recovery capacitance Css must be much greater than Cp to minimize a variation of Vss during States 1 and 3.
  • Sustain driver 700 operates with a power supply voltage Vcc.
  • FIG. 8 shows, for the circuit of FIG. 7, a waveform of voltage Vp, a waveform of a current I L through inductor L1.
  • the waveforms of FIG. 8 are those expected as switches S1 - S4 are opened and closed through the progression of States 1 - 4.
  • current I L has two components.
  • the first component, represented in State 1 is a current I R , which flows through inductor L1 during a rising edge of a sustain pulse.
  • the second component, represented in State 3, is a current I F , which flows through inductors L1 and L2 during a falling edge of the sustain pulse.
  • State 3 S1 is opened, S2 is closed, S3 is opened, and S4 remains open. With S2 closed, D2 is forward biased and inductor L2 is placed in series with inductor L1 and capacitance Cp. L2, L1 and Cp form a series resonant circuit. The polarity of the voltage across L is reverse as compared to that of State 1, and thus current I F flows in a direction opposite to that of I R in State 1. During State 3 Vp then falls approaching ground as energy stored in inductors L1 and L2 is recovered in Css. By the end of State 3, I F reaches zero, and D2 becomes reverse biased. In State 3, sustain driver 700 provides a falling, lagging edge of the sustain pulse.
  • S4 is closed. Through S4, Vp is clamped to ground.
  • another sustain driver 705 which is identical to sustain driver 700, drives the opposite side of the panel to Vcc. If any pixels are "ON”, then a discharge current flows through S4.
  • FIG. 8 shows the effect of the increased inductance, i.e., the combined inductance of L1 and L2, during the falling transition in State 3. Since the panel capacitance Cp is unchanged, the increased inductance results in a current I F having a reduced amplitude and a longer duration than that of I R .
  • FIG. 9 is an idealized schematic of a sustain driver 900, which improves on the design of sustain driver 700, shown in Fig. 7.
  • FIG. 10 is a waveform diagram illustrating the operation of sustain driver 900.
  • a control network 920 has been added and is inductively coupled to inductor L1 via a secondary winding 922.
  • Control network 920 controls the conductivity states of switches S3 and S4.
  • a voltage Vc' across secondary winding 922 is proportional to the voltage Vc across inductor L1.
  • Control network 920 senses voltage Vc' and slowly closes the output switch S3 after the panel voltage Vp has risen past its halfway point. Based on its sensing of voltage Vc', control network 920 detects the trailing edge of the I F component of I L and controls switch S4 so that it is slowly closed after the panel voltage Vp descends past the halfway point.
  • Diode DC2 and resistor R2 dampen one polarity of flyback current and diode DC1 and resistor R1 dampen the opposite polarity flyback current.
  • the conductivity states of S 1 and S2 are controlled by circuitry (not shown in FIG. 9) that is responsive to input rise and fall of a logic control signal. The operation of the four switching states of sustain driver 900 and timing diagrams of FIG. 10 are explained in detail below.
  • Vss is applied to node A.
  • the voltage at node A is represented as voltage V A .
  • Control network 920 senses, across secondary winding 922, a voltage Vc', which is proportional to Vc, and controls switch S3 to be turned on, i.e., closed, only after Vp has crossed Vss, the half-way point, and then only during the rise of Vp.
  • Vc' voltage proportional to Vc
  • S3 is closed at the positive peak of Vc, time t1, and the instant current I L equals zero (see FIG. 10).
  • S3 is to be closed and ready for full conduction when I L falls to zero at the end of State 1.
  • sensing the half-way point allows the circuitry to begin closing switch S3 prior to the inductor current I L reaching zero, which allows switch S3 to begin sourcing current as current through inductor L1 approaches zero.
  • This permits the panel voltage to reach Vcc before any discharge or flyback current is drawn.
  • the panel voltage Vp is prevented from dropping below Vcc as a result of gas discharge current, and the stated first flyback current. This improves panel operating voltage margin and reduces electromagnetic interference (EMI).
  • EMI electromagnetic interference
  • a second sustain driver 905 on the opposite side of the panel provides a sustain pulse that rises, discharges, and falls.
  • S4 is part of the return path for the second sustain driver 905.
  • FIG. 11 is a schematic of a variation of the circuit shown in Fig. 9.
  • a sustain driver 1100 includes winding 922 that serves as a secondary winding to L1 similarly to that of sustain driver 900 in FIG. 9.
  • Sustain driver 1100 also includes a winding 1132, and two control networks 1120 and 1130.
  • Winding 1132 serves as a secondary winding to inductor L2.
  • Control network 1120 senses the voltage across winding 922 and controls the state of S3.
  • Control network 1130 senses a voltage across secondary winding 1132 and controls S4. The availability of separate windings and control networks for the rising versus falling transitions allows for more accurate control of each transition.
  • FIG. 12 is a timing diagram of the circuit shown in FIG. 11.
  • the rising transition operates as stated for the circuit of FIG. 9 with waveforms shown in FIG 10.
  • the circuit of FIG. 9 has a limited signal voltage on Vc' during the falling transition.
  • a voltage VC2 may be produced with an amplitude equal to that produced by winding Vc' during the rising transition.
  • FIG. 13 is a schematic of another variation of the circuit shown in Fig. 9.
  • a sustain driver 1300 includes two inductors, L1 and L 1302 .
  • a winding 922 serves as a secondary winding to inductor L1 and a winding 1332 serves as a secondary winding to inductor L 1302 .
  • sustain driver 1300 does not include an inductor L2 as shown in Fig. 9. Also, in sustain driver 1300, L 1302 is positioned between a node defined by a junction of diodes D1 and DC1, and a node defined by a junction of L1 and D2.
  • the circuit will produce a longer rising transition and a slower falling transition.
  • This embodiment is helpful for PDP display waveforms which produce sustain discharge currents of the falling transition of the sustain pulse.
  • the opposing sustain driver makes it's falling transition and initiates a gas discharge during the high time of the reference sustainer. The opposing sustainer then rises and the reference sustainer falls, triggering the next gas discharge.
  • FIG. 14 is a schematic of another variation of a circuit in accordance with the present invention for providing asymmetrical rise and fall times.
  • a sustain driver 1400 includes two inductors, L1 and L1402.
  • a switch S5 in series with L1402 enables and disables current through L1402. When S5 is closed, i.e., conducting, L 1402 is placed in parallel with L1.
  • a winding 1422 serves as a secondary winding to inductor L1.
  • the circuit will produce a shorter rising transition or a shorter falling transition whenever S5 is closed.
  • This embodiment is helpful for PDP display waveforms that produce sustain discharge currents at different transitions of the sustain pulse within the different waveform time periods. In such a display system, energy recovery efficiency can be maximized with a longer transition time whenever a gas discharge is not expected to occur.
  • FIGS. 7, 9, 11, 13 and 14 each represent an idealized embodiment of the present invention in which the switches S1, S2, S3, S4 and S5 are represented as mechanical devices.
  • each switch can be effectuated with any appropriate switching device such as a transistor (See Fig. 3) or other semiconductor device for controlling a conduction or non-conduction of current.
  • the embodiment of L1302 in FIG. 13 may be applied to the circuits of FIGS. 7, 9, 11 to provide a longer transition time and a shorter falling transition time in those embodiments.

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  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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EP02257365A 2001-11-09 2002-10-23 Energierückgewinnung in einer Treiberschaltung zum treiben einer kapazitiven Last Withdrawn EP1310936A1 (de)

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US10/039,605 US6850213B2 (en) 2001-11-09 2001-11-09 Energy recovery circuit for driving a capacitive load
US39605 2001-11-09

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EP1310936A1 true EP1310936A1 (de) 2003-05-14

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US (1) US6850213B2 (de)
EP (1) EP1310936A1 (de)
JP (1) JP2003208121A (de)
KR (1) KR100748279B1 (de)
CN (1) CN1417763A (de)

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EP1503362A2 (de) * 2003-07-30 2005-02-02 Samsung SDI Co., Ltd. Verfahren und Vorrichtung zur Ansteuerung einer Plasma-Anzeigetafel
EP1635321A2 (de) * 2004-09-07 2006-03-15 Lg Electronics Inc. Plasmaanzeigevorrichtung mit Energierückgewinnungsschaltung
EP1657705A2 (de) * 2004-11-08 2006-05-17 LG Electronics, Inc. Plasmaanzeigevorrichtung und Verfahren zu ihrer Ansteuerung
EP1672612A2 (de) * 2004-12-16 2006-06-21 LG Electronics, Inc. Plasmaanzeigevorrichtung
EP1791104A1 (de) * 2005-11-23 2007-05-30 LG Electronics Inc. Plasmaanzeigevorrichtung
EP1793363A2 (de) 2005-12-05 2007-06-06 LG Electronics Inc. Plasmaanzeigevorrichtung
CN100373432C (zh) * 2004-10-22 2008-03-05 南京Lg同创彩色显示系统有限责任公司 能量回收方法
WO2010088954A1 (de) * 2009-02-04 2010-08-12 Osram Gesellschaft mit beschränkter Haftung Schaltungsanordnung und verfahren zum betreiben einer elektrolumineszenzfolie
EP3855295A1 (de) * 2020-01-24 2021-07-28 Microsoft Technology Licensing, LLC Treiberschaltung und verfahren zur ansteuerung einer kapazitiven last

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US6963174B2 (en) * 2001-08-06 2005-11-08 Samsung Sdi Co., Ltd. Apparatus and method for driving a plasma display panel
TW540026B (en) * 2001-12-28 2003-07-01 Au Optronics Corp Method for driving a plasma display panel
KR100492816B1 (ko) * 2002-02-28 2005-06-03 학교법인 대양학원 플라즈마 디스플레이 패널의 전하 제어 구동 회로
KR100502905B1 (ko) * 2002-05-30 2005-07-25 삼성에스디아이 주식회사 플라즈마 디스플레이 패널의 구동 장치 및 구동 방법
KR100457522B1 (ko) * 2002-06-04 2004-11-17 삼성전자주식회사 플라즈마 디스플레이 패널의 전력 회수 장치 및 방법
US7009823B2 (en) * 2002-06-28 2006-03-07 Lg Electronics Inc. Energy recovery circuit and energy recovery method using the same
KR100490628B1 (ko) * 2003-03-04 2005-05-17 삼성에스디아이 주식회사 플라즈마 디스플레이 패널의 구동 방법
KR100499374B1 (ko) * 2003-06-12 2005-07-04 엘지전자 주식회사 에너지 회수장치 및 방법과 이를 이용한 플라즈마디스플레이 패널의 구동방법
JP2005031368A (ja) * 2003-07-11 2005-02-03 Toshiba Corp 画像表示装置
FR2858708A1 (fr) * 2003-08-07 2005-02-11 Thomson Plasma Dispositif de commande dans un panneau de visualisation au plasma
KR20050081012A (ko) * 2004-02-12 2005-08-18 엘지전자 주식회사 플라즈마 표시 패널의 구동 장치
KR20050090863A (ko) * 2004-03-10 2005-09-14 삼성에스디아이 주식회사 플라즈마 표시 패널 및 그의 ｅｒｃ 타이밍 제어 방법
US20060033680A1 (en) * 2004-08-11 2006-02-16 Lg Electronics Inc. Plasma display apparatus including an energy recovery circuit
KR100692832B1 (ko) * 2005-03-30 2007-03-09 엘지전자 주식회사 플라즈마 디스플레이 패널의 에너지 회수장치
FR2889345A1 (fr) * 2005-04-04 2007-02-02 Thomson Licensing Sa Dispositif d'entretien pour panneau plasma
US7436290B2 (en) * 2005-08-16 2008-10-14 Infineon Technologies Ag Sensor discrimination apparatus, system, and method
JP4955254B2 (ja) * 2005-10-31 2012-06-20 ルネサスエレクトロニクス株式会社 Ｐｄｐ駆動装置及び表示装置
JP5048943B2 (ja) * 2005-12-13 2012-10-17 パナソニック株式会社 容量性発光素子の駆動装置
US8085221B2 (en) * 2006-02-14 2011-12-27 Panasonic Corporation Method of driving plasma display panel and plasma display unit
KR100820668B1 (ko) * 2006-09-12 2008-04-11 엘지전자 주식회사 플라즈마 디스플레이 장치
JP2008134372A (ja) * 2006-11-28 2008-06-12 Hitachi Ltd プラズマディスプレイパネルの駆動回路及びｐｄｐモジュール
WO2009045847A2 (en) * 2007-09-28 2009-04-09 Access Business Group International Llc Multiphase inductive power supply system
CN101441846B (zh) * 2007-11-19 2011-09-07 四川虹欧显示器件有限公司 基于绝缘栅双极晶体管的能量恢复装置
WO2009115775A1 (en) * 2008-03-15 2009-09-24 Pelikon Limited Driving displays
JPWO2009130860A1 (ja) * 2008-04-22 2011-08-11 パナソニック株式会社 プラズマディスプレイ装置およびプラズマディスプレイパネルの駆動方法
JP5737007B2 (ja) * 2010-07-21 2015-06-17 株式会社リコー 負荷駆動装置、画像形成装置、負荷駆動方法およびプログラム
JP2015079014A (ja) * 2012-01-30 2015-04-23 パナソニック株式会社 プラズマディスプレイ装置
GB201309282D0 (en) 2013-05-23 2013-07-10 Shimadzu Corp Circuit for generating a voltage waveform
US9220132B2 (en) 2013-06-22 2015-12-22 Robert G. Marcotte Breakover conduction illumination devices and operating method
JP2016212222A (ja) * 2015-05-07 2016-12-15 パナソニックＩｐマネジメント株式会社 光学デバイス駆動装置及び光学デバイス駆動システム
US9866119B2 (en) * 2016-01-29 2018-01-09 Mediatek Inc. DC-DC converter with pull-up and pull-down currents based on inductor current

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US5642018A (en) * 1995-11-29 1997-06-24 Plasmaco, Inc. Display panel sustain circuit enabling precise control of energy recovery
US6057815A (en) * 1996-11-19 2000-05-02 Nec Corporation Driver circuit for AC-memory plasma display panel
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Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1503362A3 (de) * 2003-07-30 2007-09-05 Samsung SDI Co., Ltd. Verfahren und Vorrichtung zur Ansteuerung einer Plasma-Anzeigetafel
EP1503362A2 (de) * 2003-07-30 2005-02-02 Samsung SDI Co., Ltd. Verfahren und Vorrichtung zur Ansteuerung einer Plasma-Anzeigetafel
EP1635321A3 (de) * 2004-09-07 2006-11-02 Lg Electronics Inc. Plasmaanzeigevorrichtung mit Energierückgewinnungsschaltung
EP1635321A2 (de) * 2004-09-07 2006-03-15 Lg Electronics Inc. Plasmaanzeigevorrichtung mit Energierückgewinnungsschaltung
CN100373432C (zh) * 2004-10-22 2008-03-05 南京Lg同创彩色显示系统有限责任公司 能量回收方法
EP1657705A3 (de) * 2004-11-08 2006-07-26 LG Electronics, Inc. Plasmaanzeigevorrichtung und Verfahren zu ihrer Ansteuerung
EP1657705A2 (de) * 2004-11-08 2006-05-17 LG Electronics, Inc. Plasmaanzeigevorrichtung und Verfahren zu ihrer Ansteuerung
EP1672612A2 (de) * 2004-12-16 2006-06-21 LG Electronics, Inc. Plasmaanzeigevorrichtung
EP1672612A3 (de) * 2004-12-16 2009-10-21 LG Electronics, Inc. Plasmaanzeigevorrichtung
US7701146B2 (en) 2004-12-16 2010-04-20 Lg Electronics Inc. Plasma display apparatus
EP1791104A1 (de) * 2005-11-23 2007-05-30 LG Electronics Inc. Plasmaanzeigevorrichtung
EP1793363A2 (de) 2005-12-05 2007-06-06 LG Electronics Inc. Plasmaanzeigevorrichtung
EP1793363A3 (de) * 2005-12-05 2008-04-23 LG Electronics Inc. Plasmaanzeigevorrichtung
WO2010088954A1 (de) * 2009-02-04 2010-08-12 Osram Gesellschaft mit beschränkter Haftung Schaltungsanordnung und verfahren zum betreiben einer elektrolumineszenzfolie
EP3855295A1 (de) * 2020-01-24 2021-07-28 Microsoft Technology Licensing, LLC Treiberschaltung und verfahren zur ansteuerung einer kapazitiven last
WO2021150427A1 (en) * 2020-01-24 2021-07-29 Microsoft Technology Licensing, Llc Driver circuit and method for driving a capacitive load

Also Published As

Publication number Publication date
US6850213B2 (en) 2005-02-01
KR100748279B1 (ko) 2007-08-09
US20030090440A1 (en) 2003-05-15
CN1417763A (zh) 2003-05-14
KR20030038529A (ko) 2003-05-16
JP2003208121A (ja) 2003-07-25

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