EP1309896A2 - Masque a trous et procede de realisation d'un masque a trous - Google Patents

Masque a trous et procede de realisation d'un masque a trous

Info

Publication number
EP1309896A2
EP1309896A2 EP01967274A EP01967274A EP1309896A2 EP 1309896 A2 EP1309896 A2 EP 1309896A2 EP 01967274 A EP01967274 A EP 01967274A EP 01967274 A EP01967274 A EP 01967274A EP 1309896 A2 EP1309896 A2 EP 1309896A2
Authority
EP
European Patent Office
Prior art keywords
shadow mask
coating
metal coating
perforated
cooling channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01967274A
Other languages
German (de)
English (en)
Inventor
Jan Meijer
Andreas Stephan
Ulf WEIDENMÜLLER
Ivo Rangelow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universitaet Kassel
Original Assignee
Universitaet Kassel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universitaet Kassel filed Critical Universitaet Kassel
Publication of EP1309896A2 publication Critical patent/EP1309896A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/20—Masks or mask blanks for imaging by charged particle beam [CPB] radiation, e.g. by electron beam; Preparation thereof

Definitions

  • the present invention relates to a shadow mask, in particular a shadow mask for ion beams or ionized molecular beams consisting of a silicon wafer with a hole pattern arranged therein.
  • the invention further relates to a method for producing such a shadow mask.
  • the previous mask technology is not suitable for masking out ion beams with a high power density.
  • the previous ion projection methods (patent no. DE 19633320 AI) are therefore limited to ion beams with a low power density. These masks are destroyed in a short time by ion beams of high power density.
  • the present invention relates to shadow masks, methods for producing shadow masks and applications of shadow masks which can be used with particle beams of all kinds, for example ions with comparatively high power densities of the order of a few watts / cm 2 or more, to substrates of the ver - structure various types quickly and with high doses with sharp edges and to implant ions in substrates.
  • the sharp-edged structuring of substrates here means, for example, the ability to be able to produce structures with a resolution of less than 3 ⁇ m on an area larger than 1 mm 2 .
  • the object of the present invention is to present such shadow masks as well as methods for their production and applications which are suitable for being used with particle or ion beams with relatively high power densities, for example in order to block out ion beams with power densities in the order of magnitude mentioned above and nevertheless one To achieve durability of the shadow mask of more than 100 operating hours.
  • the silicon wafer on the side facing the incident ion beams, has a metal coating which stops the ion beams and dissipates heat. This metal coating on the one hand effectively stops the ions and converts the kinetic energy of the ion beams into heat, the metallic coating providing the necessary heat dissipation due to its thermal conductivity.
  • a diamond layer can be inserted between the metal coating and the silicon wafer according to the invention, the thickness of this layer being between 2 ⁇ m and 10 ⁇ m, for example.
  • Diamond has an excellent thermal conductivity.
  • Another possibility, which can possibly also be used in combination with the diamond layer, is to incorporate cooling channels into the silicon wafer and / or into the diamond layer and / or into the metal coating, the cooling channels for guiding a cooling fluid, in particular a cooling gas, for example Helium, must be used and must be covered accordingly, for example by the metal coating, so that there are closed cooling channels.
  • a cooling fluid in particular a cooling gas, for example Helium
  • the cooling channels must be provided with an inlet and an outlet, which allow the supply or removal of the fluid or gas used for cooling. Even if the entrance and exit are also closed when the channels are closed, they can easily be uncovered again by radio erosion or other methods so that the necessary connections can be made there.
  • the inputs and outputs can be on the side of the shadow mask (ie on the side where the ions strike), on the back or on the side edge of the perforated disk.
  • the cooling channels can, for example, have a width in the range between
  • cooling channels 100 nm and 10 ⁇ m and have a depth of up to 80% of the total thickness of the shadow mask. It is particularly advantageous when using cooling channels that their distribution, density, width and depth can be adapted to local heat generation. In other words, in areas of the shadow mask with a smaller hole cross-sectional area / unit area and therefore a large heat generation due to the stopped ion beams, more heat can be dissipated by appropriate design of the cooling channels, so that a uniform temperature or a desired or even acceptable temperature distribution over the entire Area of the shadow mask can be achieved.
  • the invention further comprises a method for producing sharp-edged structures by means of particle beams with a high power density> 1 W / cm 2 . This enables rapid implantation and modification of small structures or the implantation of high doses.
  • a perforated mask with a diameter of> 1 mm 2 is used, which meets the above requirements with regard to stability, material removal and heat transfer.
  • the shadow mask can be structured as desired and has a lateral resolution ⁇ 3 ⁇ m.
  • structures of the mask can be transferred to a substrate in a reduced size, the mask and the substrate being localized. lent are separated. This device prevents contamination of the substrate with mask material.
  • Substrates of any shape can be implanted.
  • the substrate can be heated to a high temperature during implantation with an arbitrarily shaped surface, e.g. Avoid crystal damage.
  • the applications resulting from this are, for example, sensors on tips with a high lateral resolution or miniature pressure stamps with structures below one micrometer for the forgery-proof identification of any objects.
  • the invention thus relates to a method of structuring substrates with particle beams, for example ions, with a high power density quickly or with high doses with sharp edges, a shadow mask with structures of less than 3 ⁇ m resolution being used on an area> 1 mm 2.
  • the shadow mask is suitable for masking the ion beams with power densities> 3 W / cm 2 and has a durability of more than 100 hours.
  • the maximum energy density results from the multiplication of ion energy and the ion current density with which the mask is irradiated at any time.
  • This invention allows both high beam current densities and high energy ion beams to be blanked out.
  • the shape of the ion beam striking the sample is defined on the mask by stopping any contiguous areas of the ion beam in mask material located in the beam path. Through the In the areas of the mask, the ion beam can pass through unhindered, ie it is not scattered. In order to achieve good imaging properties, the ion beam must pass through the mask approximately in parallel.
  • the edges of the mask structures must have very small negative effects in order to reduce scattering, ie deflection of the ions from their trajectory by collision processes with particles of the mask, or transparency zones, ie areas of the mask in which the ions lose energy and are deflected but can still hit the sample Have edge slopes.
  • the side of the mask facing the incident ion beam stops the ions during the shelf life without being destroyed by the impact of the ions or the stopped ions during this period.
  • the energy introduced when the ions are stopped is dissipated through the mask material to a heat sink or cooling.
  • the heat dissipation is designed so that a change in the temperature of the mask does not impair the resolution of the image.
  • the structures of the mask can be projected smaller or enlarged with the factor given by the illustration.
  • the structure resolution achievable in this device results from the structure sizes of the mask divided by the amount of reduction or enlargement V.
  • the edge sharpness that can be achieved is limited by the thermal expansion of the mask during the irradiation divided by V and the imaging error.
  • the advantage of such a device is that the substrate and mask can be spatially separated from one another, depending on the image, and contamination by mask material removed by the ion beam is avoided.
  • the substrate can be heated to high temperatures during the implantation without destroying the mask.
  • high doses and ions with a high penetration depth can be implanted in a structured manner in a substrate, which would not be possible with conventional contact masking.
  • masks according to the invention with these properties opens up the possibility of producing novel materials by structured implantation and structuring materials under conditions that prohibit contact masking, which is otherwise customary.
  • FIGS. 2A-2C show a schematic illustration of an exemplary embodiment for a mask according to the invention with integrated cooling channels
  • Figure 3 is a photographic illustration of an embodiment of a shadow mask according to the invention.
  • 1A shows a (100) silicon wafer 10 with a specific resistance of 0.01 ohm cm and is polished on both sides.
  • the disk 10 according to FIG. 1A has a thickness of 500 ⁇ m and a width of 100 mm.
  • the silicon wafer is circular in this example with a usual flattening at one point.
  • the silicon wafer 10 of FIG. 1A is coated with SiO 2 on at least substantially all surfaces by means of an oxidation step, so that, for example, a 2 ⁇ m thick SiO 2 coating is produced, as shown at 12 in Fig. IB.
  • the thickness of this coating 12 can, for example, easily be in the range between 100 nm to 5 ⁇ m or above.
  • Such layers can be produced by wet oxidation at 1150 ° C. Wet here means that water is admitted into the treatment chamber.
  • the SiO 2 coating 12 is removed on a portion 14 of the back of the disc. This removal can be done, for example, by a lithographic process. By immersing the wafer in an alkaline solution, it is then etched from the back, as shown in FIG. ID, so that a central region 16 of the wafer is formed, which is compared to the edge region 18, where the S1O2 coating 12 is still maintained becomes thinner.
  • This area 16 can have a thickness in the range of 200 to 300 ⁇ m, for example
  • holes 24 are present in the thinned region 16 in the SiO 2 layer 12 in accordance with the desired hole pattern.
  • the disk is now treated by means of an etching process, for example in the form of a dry etching process such as reactive ion etching, sputter etching or etching with alternating types of gas (so-called gas chopping), in order to close the hole pattern that is present in the SiO 2 layer in the thinned area 16 of the perforated disk produce.
  • gas chopping alternating types of gas
  • the wafer is then oxidized as shown in Fig. 1H to provide the areas exposed by SiO 2 in the etching step of Fig. IF including the inner walls of the holes 26 with S1O2 12, i.e. SiO 2 is formed on all surfaces of the disk.
  • the method step according to FIG. 1H can also be carried out by means of wet oxidation at 1150 ° C.
  • a starting layer is now formed on the exposed front of the pane.
  • a starting layer consisting of GeO, Cr or another metal or a highly conductive semiconductor layer, such as highly conductive silicon, is applied, for example by a sputter treatment, and the disk is then introduced into a galvanic bath, where the metal layer, after appropriate contacting of the starting layer 28 with a thickness in the range between 0.5 ⁇ m and 20 ⁇ m is applied galvanically to the front of the silicon wafer, as indicated in FIG. 1J.
  • the purpose of this starting layer is to make the surface of the pane conductive so that the galvanic process can be carried out.
  • the SiO 2 layer 12 is removed from all surface areas by an etching process and the pane, which now represents the desired shadow mask, is then cleaned.
  • the reason for the removal of the SiO 2 layer 12 in Fig. 1J is that the insulating effect will otherwise lead to an undesirable charging of the shadow mask when ion bombardment.
  • the perforated mask then appears as shown in FIG. 1K, wherein the perforated pattern 30 can be designed, for example, similar to FIG. 3.
  • the exact geometric shape of the hole pattern 30 present in the perforated disk is in principle irrelevant; it must be carried out according to the be designed for an application. It is sufficient to express here that the method described above and the modifications to the method described below make it possible to provide perforated masks with filigree holes that can be used for a large number of purposes. In particular, it is possible to provide the holes with lengths and / or width dimensions that are smaller than 3 ⁇ m, as a result of which correspondingly fine structures can be produced in a substrate that is bombarded with ion beams through the mask.
  • the steps according to FIG. 1B, IC and ID can be omitted, ie it is not absolutely necessary to treat the pane in order to provide a thinned central region 12 and a thicker edge region 18.
  • suitable dimensions for the perforated disc especially a thickness in the range of 300 ⁇ m or larger, such a thinning can be dispensed with.
  • the purpose of the edge region 18 is only to obtain a stable pane that is easy to handle. If the disk 10 is made thicker, it is not necessary to thin it in the middle.
  • the steps in accordance with FIGS. IB to ID are omitted, the disk in the illustration in FIG. 1E is roughly the same as in FIG. 1A, but with an SiO 2 layer on at least the front side, which is also produced, for example, by a sputtering process can be. The further handling of the disk then proceeds as shown in FIGS. IF to 1K.
  • a further modification compared to the procedure according to FIG. 1 consists in that a diamond layer is deposited on the surface of the silicon wafer using a procedure known per se. This can be carried out, for example, immediately after step a) or after step i) and other possibilities are also conceivable.
  • the diamond layer is realized, for example, with a thickness in the range between 2 ⁇ m and 10 ⁇ m and has a very high conductivity. This therefore serves to dissipate heat from hot areas of the metal layer even more quickly, ie areas where a relatively large amount of ions are stopped, and ensures that the shadow mask has a uniformly low temperature, thereby increasing the life of the shadow mask.
  • cooling channels in the perforated disk through which cooling gases, especially helium, can be pumped in order to remove heat from the disk and thereby lower the temperature of the perforated disk and its Increase lifespan.
  • the cooling channels 30 of the silicon wafer itself can be incorporated and they are each provided with an inlet 32 and an outlet 34 in order to enable the cooling gas to be supplied and removed.
  • One way of realizing the cooling channels is to create them using a lithographic process. Such cooling channels could for example before or after the method step according to FIG. II. As FIG.
  • the cooling ducts can have a considerable depth, for example they can have a depth of up to over 80% of the total thickness of the perforated disk 16 and they can also vary in their depth and / or width and / or length to match the locally available one
  • the channels can have a larger surface so that the heat transfer from the perforated disk to the cooling gas is improved.
  • the open channels 30 shown in Figures 2A and 2B must be closed. This is best done by closing the perforated disc in a tilted position by means of vapor deposition or sputtering from a metal.
  • the perforated disk is rotated in the tilted position and this leads to the openings to the channels being closed quickly, particularly when the cooling channels, as shown in FIG. 2C, are relatively narrow.
  • the perforated disk can be introduced into the galvanic bath in order to grow the desired galvanic coating 28 on the surface of the perforated disk.
  • the evaporation or sputtering of metals onto the surface of the perforated disk in order to close cooling channels can in fact serve at the same time to deposit a metallic starting layer for the galvanic coating on the surface of the perforated disk.
  • Another possibility of introducing the cooling channels into the perforated disk is to produce the cooling channels lithographically already in the stage of FIG. 1A.
  • the perforated disc can then be used in a further step
  • Sputtering device are introduced and treated with a material such as silicon dioxide or silicon nitrite in a sputtering process, so that the cooling channels are closed from above.
  • the pane can be polished using CMP. This removes the irregularities generated by the sputtering process, but the polishing process is carried out in such a way that the covering of the cooling channels is not broken.
  • the process then proceeds as previously described in connection with FIG. 1, optionally with the process steps according to FIGS. IB, IC and ID being omitted, until the stage according to FIG. II is reached.
  • the perforated disc is inserted into a sputtering device and rotated in an inclined position so that the entrances to the cooling channels are covered with a metal coating.
  • the surface of the front side of the pane is also provided with the metal coating and this then serves as the starting layer for the galvanic coating.
  • the holes in the shadow mask that form the actual hole pattern are also closed by this method.
  • this is not problematic since it is possible to bombard the holes in the hole pattern from the rear with ions, which can expose the hole pattern again.
  • the bombardment of the back of the perforated disk with ions has no adverse effect on the cooling channels, since these are closed from below so that the ions do not have any effect there.
  • SiO 2 coating are removed and the shadow mask presents itself in the finished state according to FIG. 1K.
  • cooling channels in such a way that they also extend through any diamond layer that may be present. To do this, either the diamond layer on the surface of the
  • Perforated disk can be deposited if the cooling channels already exist but are not yet closed, or the entire surface of the perforated disk can be coated with a diamond layer and a lithographic process can be used to form the cooling channels.
  • the diamond layer can be treated with an ion beam in order to convert it locally into graphite, and this graphite layer can then be easily etched away.
  • the cooling channels can also be present in the metal layer.
  • the metal layer can also consist of an alternating sequence of different metal layers which have different lattice constants, the lattice constant of one layer being said to be smaller than that of silicon, while the lattice constant of the other layer is said to be larger than that of " silicon " on the average, there is no distortion at the transition between the silicon wafer and the first metal layer of the alternating layer sequence, intermediate layers can be provided which achieve a gradual adaptation to the lattice constant of the lowermost metal layer, so that overall there is a structure without pronounced tension.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electron Beam Exposure (AREA)
  • Physical Vapour Deposition (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

La présente invention concerne un masque à trous destiné à des faisceaux de particules, notamment à des faisceaux d'ions, comprenant une tranche de silicium dans laquelle est formé un motif, se caractérisant en ce que la tranche de silicium présente un revêtement métallique stoppant les faisceaux d'ions et déviant la chaleur, disposé du côté orienté vers les faisceaux d'ions incidents. Cette invention concerne également un procédé de réalisation d'un masque à trous.
EP01967274A 2000-08-14 2001-08-14 Masque a trous et procede de realisation d'un masque a trous Withdrawn EP1309896A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10039644 2000-08-14
DE10039644A DE10039644A1 (de) 2000-08-14 2000-08-14 Lochmaske und Verfahren zur Herstellung einer Lochmaske
PCT/EP2001/009405 WO2002014951A2 (fr) 2000-08-14 2001-08-14 Masque a trous et procede de realisation d'un masque a trous

Publications (1)

Publication Number Publication Date
EP1309896A2 true EP1309896A2 (fr) 2003-05-14

Family

ID=7652357

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01967274A Withdrawn EP1309896A2 (fr) 2000-08-14 2001-08-14 Masque a trous et procede de realisation d'un masque a trous

Country Status (4)

Country Link
US (1) US7183043B2 (fr)
EP (1) EP1309896A2 (fr)
DE (1) DE10039644A1 (fr)
WO (1) WO2002014951A2 (fr)

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KR101075080B1 (ko) 2003-05-27 2011-10-21 신에쓰 가가꾸 고교 가부시끼가이샤 이온 주입용 스텐실 마스크
JP2005150205A (ja) * 2003-11-12 2005-06-09 Sony Corp ステンシルマスクおよびその製造方法
DE602004017958D1 (de) 2004-04-01 2009-01-08 St Microelectronics Srl he für Plasma- und/oder Ionenimplantationsbehandlung auf einem Halbleiterwafer zu definieren
WO2012049593A1 (fr) * 2010-10-12 2012-04-19 Koninklijke Philips Electronics N.V. Procédé de fabrication d'un dispositif électronique organique
US9070861B2 (en) 2011-02-15 2015-06-30 Fujifilm Dimatix, Inc. Piezoelectric transducers using micro-dome arrays
US8628677B2 (en) 2011-03-31 2014-01-14 Fujifilm Corporation Forming curved features using a shadow mask
US20140147593A1 (en) * 2012-11-27 2014-05-29 Intermolecular, Inc. Liquid Cooled Sputter Apertured Shields
US10644239B2 (en) * 2014-11-17 2020-05-05 Emagin Corporation High precision, high resolution collimating shadow mask and method for fabricating a micro-display
US10386731B2 (en) 2016-05-24 2019-08-20 Emagin Corporation Shadow-mask-deposition system and method therefor
KR102377183B1 (ko) 2016-05-24 2022-03-21 이매진 코퍼레이션 고정밀 섀도 마스크 증착 시스템 및 그 방법
TWI633197B (zh) 2016-05-24 2018-08-21 美商伊麥傑公司 高精準度蔽蔭遮罩沉積系統及其方法
CN111812941B (zh) * 2019-04-11 2023-10-10 中国科学院金属研究所 一种高精度硅物理掩膜版及其制作方法

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EP0078336B1 (fr) 1981-10-30 1988-02-03 Ibm Deutschland Gmbh Masque projetant l'ombre pour l'implantation d'ions et pour la lithographie par rayons d'ions
JPS63252341A (ja) 1987-04-09 1988-10-19 Nec Corp グリツド
US5120421A (en) * 1990-08-31 1992-06-09 The United States Of America As Represented By The United States Department Of Energy Electrochemical sensor/detector system and method
GB9105870D0 (en) 1991-03-20 1991-05-08 Xaar Ltd Fluid cooled contact mask
JPH07140643A (ja) 1993-11-18 1995-06-02 Toppan Printing Co Ltd アパーチャの製造方法
JPH07152150A (ja) 1993-11-29 1995-06-16 Toppan Printing Co Ltd アパーチャ
JPH07283113A (ja) 1994-04-08 1995-10-27 Toppan Printing Co Ltd アパーチャ及びその製造方法
US5500312A (en) * 1994-10-11 1996-03-19 At&T Corp. Masks with low stress multilayer films and a process for controlling the stress of multilayer films
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Also Published As

Publication number Publication date
WO2002014951A3 (fr) 2002-09-19
DE10039644A1 (de) 2002-02-28
US7183043B2 (en) 2007-02-27
US20040219465A1 (en) 2004-11-04
WO2002014951A2 (fr) 2002-02-21

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