EP1269520A2 - Fabrication of semiconductor materials and devices with controlled electrical conductivity - Google Patents
Fabrication of semiconductor materials and devices with controlled electrical conductivityInfo
- Publication number
- EP1269520A2 EP1269520A2 EP01916604A EP01916604A EP1269520A2 EP 1269520 A2 EP1269520 A2 EP 1269520A2 EP 01916604 A EP01916604 A EP 01916604A EP 01916604 A EP01916604 A EP 01916604A EP 1269520 A2 EP1269520 A2 EP 1269520A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- barrier layer
- passivation barrier
- passivation
- reactor
- semiconductor material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3228—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of AIIIBV compounds, e.g. to make them semi-insulating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
Definitions
- This invention relates to a method for achieving the desired electrical conductivity in doped semiconductor materials that are affected by dopant passivation.
- the invention specifically teaches methods of fabricating passivation-barrier layers to prevent or reduce doping species passivation during the semiconductor growth process, thus eliminating the need for in-situ or ex-situ annealing steps.
- Gallium nitride is one of the most promising semiconductor materials for application to blue, violet and ultraviolet (UV) LEDs and LDs as well as other electronic devices .
- MOCVD Metal- Organic Chemical Vapor Deposition
- Hydrogen is common in a MOCVD reactor during growth of the GaN material and subsequent reactor cooling, generally coming from two sources. Hydrogen is commonly used during growth as a carrier gas for the growth source gasses. In addition, ammonia (NH 3 ) is used as a source gas for nitrogen (N) during growth of the GaN material and is also used to stabilize the GaN material during reactor cooling. Hydrogen is produced as a by-product of the ammonia decomposition during growth and cooling. In the conventional GaN growth process, there is sufficient hydrogen in the reactor to cause passivation of the p-type region during cooling.
- Passivation of the p-type region could be avoided by removing the hydrogen source from the reactor prior to cool down. See U.S. Patent No. 5,891,790, to Keller et . al .
- the GaN crystal is unstable at growth temperatures and the p-type GaN region is susceptible to decomposition which results in surface damage.
- the conventional method for avoiding this decomposition is to maintain the flow of NH 3 during reactor cooling.
- the presence of NH 3 during reactor cooling produces hydrogen and leads to passivation. As such, it was thought that the removal of all hydrogen sources was not practical and that passivation during reactor cooling could not be avoided.
- the passivated GaN material is irradiated with an electron beam to activate the acceptors. While these procedures effectively activate the passivated region, they are conducted ex situ, introducing another step in the fabrication process that increases cost and reduces yield. Damage can be caused from handling, and impurities can be introduced by atmospheric conditions. Both processes expose the GaN material to high temperature, which can also damage the material.
- the annealing process occurs prior to p- contact metalization.
- devices such as GaN LEDs and LDs
- Metal contacts to p-type GaN have been found to be highly sensitive to surface quality. [J. Kim et . al. Appl. Phys. Lett. 73, 2953 (1998)].
- Any damage to the p-type surface during annealing or handling will adversely impact the p-type metal contacts.
- Another method for reducing passivation of acceptors during reactor cooling is capping the p-type material with a thin n-type layer. [S. Manigawa and M. Kondo, J. Electron. Mater. Vol.19 No.6, pp.
- the present invention provides a novel method of achieving the desired electrical conductivity in doped semiconductor materials that experience passivation of the doping species by hydrogen atoms. Passivation occurs by hydrogen being incorporated into the semiconductor material in association with doping species.
- the invention specifically teaches methods of fabricating barrier layers to prevent or reduce the diffusion and incorporation of hydrogen into the semiconductor material, thus preventing or reducing dopant passivation.
- the barrier layers are fabricated in the same growth chamber that is used for the semiconductor material growth. Shortly after the growth of the material, while it is in the reactor and the reactor is at a temperature about equal to or lower than the growth temperature, the diffusion barrier layer is deposited on the material.
- the barrier layer is formed from dense, inert compounds that block the diffusion and incorporation of hydrogen into the material. Examples for barrier layers are Si, Ge, MgOx, MgNx, ZnO, SiNx, SiOx, alloys or layer sequences thereof.
- the barrier layer can also be a hydrogen binding layer, also referred to as a hydrogen-gettering layer.
- the hydrogen-gettering layer chemically binds hydrogen trapped in the semiconductor or prevents hydrogen from reaching the semiconductor surface from the ambient gas phase, thus preventing hydrogen diffusion into the semiconductor.
- the composition of the gettering layer compounds can be adjusted during growth to contain an excess of the gettering component.
- the preferred gettering layer materials contain components that have a high binding energy to atomic hydrogen.
- the binding energy is also preferably higher than the binding energy between hydrogen and the acceptor or donor species.
- the layer can be effective in preventing the passivation of doping species by gettering the hydrogen.
- the layer can have multiple layers that can be a repeated sequence of multiple gettering materials.
- any of the barrier layers may be removed by one of a variety of etching techniques for subsequent processing of the semiconductor material.
- Eliminating passivation of the semiconductor material also can eliminate or reduce the need for additional processing steps such as thermal or electron beam annealing.
- the method also provides superior quality and yield in semiconductor materials, preserving the material in its pristine as grown state.
- FIG. 1 is a simplified schematic of a MOCVD reactor used in growing semiconductor material
- FIG. 2 is a sectional view of a p-n junction diode with the with a barrier SiN x layer;
- FIG. 3 is a sectional view of the p-n junction diode of FIG. 2 immersed in HF to remove the protective SiN x layer;
- Fig. 4 is a sectional view of p-n junction diode with a hydrogen-binding (gettering) layer.
- the present invention is a novel method for preventing the passivation of dopant species in semiconductor materials by atomic hydrogen.
- a barrier layer is grown soon after the growth of the semiconductor material, prior to or during reactor cooling, or at a temperature lower than the growth temperature of the semiconductor material.
- the barrier layer functions as a dense barrier for diffusion of hydrogen into the semiconductor.
- the barrier layer can also serve as a gettering layer to chemically bind hydrogen. In both cases the passivation of doping species is prevented or reduced.
- the barrier layer can be removed by known procedures such as etching.
- the barrier or gettering layer can be deposited on the semiconductor material using MOCVD, plasma chemical vapor deposition (CVD) , hot-filament CVD, or other deposition processes. The preferred method is deposition in a MOCVD reactor.
- FIG. 1 shows a MOCVD reactor 10 used in the new method to grow the semiconductor material and to apply the barrier layer.
- the reactor 10 comprises a reaction chamber 11 having growth platform 12 supported by a rotary shaft 13.
- a single crystal 14 such as sapphire is disposed on the growth platform 12, although other crystals may be used such as ( ), AlGaN, or GaAs .
- the platform 12 is heated by heater 15 to maintain substrate 14 at a predetermined temperature.
- the temperature is typically between 400 and 1200 degrees centigrade (°C) , but can be higher or lower depending on the type of growth desired.
- the heater 15 can be a variety of heating devices but is usually a radio frequency (RF) or resistance coil.
- RF radio frequency
- a carrier gas 16 is supplied to a gas line 17, the carrier gas being a gas such as hydrogen or nitrogen.
- the carrier gas 16 is also supplied through mass flow controllers 18a-c to respective bubblers 19a-c.
- Bubbler 19a has a growth compound, typically an alkylated compound having a methyl or ethyl group, e.g. tri ethyl gallium TMG) , trimethyl aluminum (TMA) or trimethyl indium (TMI) .
- Bubblers 19b and 19c may also contain a similar metalorganic compound to be able to grow an alloy of a Group III compound.
- the bubblers 19a-c are typically maintained at a predetermined temperature by constant temperature baths 20a-c to ensure a constant vapor pressure of the metal organic compound before it is carried to the reaction chamber 11 by the carrier gas 16.
- the carrier gas 16 which passes through bubblers 19a-c is mixed with the carrier gas 16 flowing within the gas line 17 by opening the desired combination of valves 21a-c.
- the mixed gas is then introduced into the reaction chamber 11 through a gas inlet port 22 formed at the upper end of the reaction chamber 11.
- a nitrogen containing gas 26 such as ammonia is supplied to the gas line 17 through a mass flow controller 27 and the flow of nitrogen containing gas is controlled by valve 28. If the carrier gas 16 is mixed with the nitrogen containing gas 26, and the TMG vapor within the gas line 17 is introduced into the reaction chamber 11, the elements are present to grow gallium nitride on the substrate 14 through thermal decomposition of the molecules in the TMG and ammonia containing gas.
- a dopant material which is usually Magnesium (Mg) or Silicon (Si), but can be other material such as beryllium, calcium, zinc, or carbon.
- Bubbler 19b or 19c is used for an alloy material such as boron, aluminum, indium, phosphorous, arsenic or other materials. Once the dopant and alloy are selected and the valve 21a, 21b or 21c is opened to allow the dopant to flow into gas line 17 with the gallium and nitrogen containing gas 26, the growth of the doped layer of gallium nitride takes place on substrate
- the gas within the reaction chamber 11 can be purged through a gas purge line 23 connected to a pump 24 operable under hydraulic pressure. Further, a purge valve 25 allows gas pressure to build up or be bled off from the reaction chamber 11.
- the growth process is typically stopped by shutting off the gallium and dopant sources by closing valves 21a and 21b, and keeping the nitrogen containing gas and the carrier gas flowing.
- the reaction chamber 11 can be purged with a gas 29 that can be controlled through a mass flow controller 30 and valve 31.
- the purge is aided by opening valve 25 to allow the pump 24 to evacuate the reaction chamber 11 of excess growth gasses.
- the purge gas 29 is hydrogen, but can be other gasses. Turning off the heater 15 power then cools the substrate 14.
- the application of the barrier layer occurs after growth of the semiconductor material and prior to or during cooling of the reaction chamber 11.
- the flow of undesired growth gasses is discontinued by closing the appropriate combination of valves 21a-c.
- a short purge of the reactor may be completed to remove the undesirable gasses as described above.
- Gasses are then flowed into the reactor to deposit an epitaxial, poly-crystalline, or amorphous barrier layer on the device.
- the gasses used for the barrier layer are provided from typical MOCVD sources.
- the barrier layer should be a dense material that uniformly covers the semiconductor surface and that should not adversely impact the properties and performance of the semiconductor material and device.
- the composition and thickness of the barrier layer or barrier layer sequence is chosen such that hydrogen is effectively prevented from passivating the doping species in the semiconductor material or significantly reducing the extent of the passivation.
- examples of some of the compounds that can be used in the invented process include Si, Ge, MgO x , MgN x , ZnO, SiN x , SiO x , and alloys thereof.
- Multiple layer and repeated stacks of layers of suitable materials can be used as barrier layers as well, such as SiN x /Si, MgN x /SiN x or MgN x /MgO x .
- the different barrier layers can be formed from the following source gasses: Si from silane or disilane, Ge from germane, MgN x from cyclopentadienyl magnesium or methyl-cyclopentadienyl magnesium and ammonia, MgO from cyclopentadienyl magnesium or methyl-cyclopentadienyl magnesium and nitrous oxide, ZnO from dimethyl zinc or diethyl zinc and nitrous oxide or water, SiN x from silane or disilane and ammonia or nitrous oxide, and SiO x formed from silane or disilane and nitrous oxide.
- the semiconductor material can be cooled in the reaction chamber 11 without or with reduced dopant passivation. The semiconductor material can then be removed from the cooled reaction chamber 11.
- the barrier layer can be removed by a number of different methods including but not limited to wet chemical hydrofluoric acid (HF) etching, reactive ion etching, or plasma etching.
- HF wet chemical hydrofluoric acid
- the invention applies to devices such as high electron mobility transistors (HEMTs) and metal-semiconductor field effect transistors (MESFETs) , semiconductor laser diodes, light emitting diodes (LEDs) , optical detectors, and bipolar junction transistors (BJTs) .
- HEMTs high electron mobility transistors
- MESFETs metal-semiconductor field effect transistors
- LEDs light emitting diodes
- BJTs bipolar junction transistors
- FIG. 2 shows a layer diagram of a GaN p-n junction diode 30 with the barrier layer 32 applied.
- the preferred passivation barrier compounds are MgN x , Si and SiN x for a number of reasons; the necessary source gasses are already present in the reactor, they are chemically inert to GaN, and they are easily removed by etching.
- the barrier layer 32 is deposited on the p-type GaN region 34 doped with Mg. Also shown is the n-type GaN region 36 doped with Si grown on a sapphire substrate 38 as described above.
- the GaN crystal is grown in the reaction chamber 11 at temperatures of about 1000°C.
- the flow of source gasses used to grow the GaN material are stopped at valves 21a-c.
- the flow of nitrogen containing gas (NH 3 ) 26 is maintained because of the unstable nature of GaN at high temperature.
- a short reactor purge of approximately 1-3 seconds may be performed using valve 25 and pump 24 to remove the source gasses used in the growth of GaN.
- the short purge provides a distinct junction between the SiN x protective layer 32 and the p-type GaN 34 region, which helps to prevent Si doping of the p- type region 34.
- the barrier layer is then deposited on the GaN material.
- silane (SiH 4 ) or disilane (Si 2 H 6 ) gas 40 is used in combination with ammonia (NH 3 ) 42 at the growth temperature of the semiconductor material or at a different temperatures down to approximately 700°C or lower.
- NH 3 ammonia
- the NH 3 flow 42 is terminated and SiH 4 or Si 2 H 6 40 are sourced into the reaction chamber.
- MgN X/ cyclopentadienyl magnesium (Mecp 2 Mg) and NH 3 are sourced into the reaction chamber 11, respectively.
- the silicon, magnesium, and ammonia sources are typically installed in MOCVD systems and used for the growth of group III nitride based semiconductors such as GaN and its alloys with indium and aluminum. No additional source materials need to be added to the MOCVD system for the fabrication of the preferred barrier layers. Thus an easier, and more cost effective method is provided to prevent the passivation of doping species in semiconductor material grown by MOCVD compared to prior art.
- a nitrogen carrier gas In the preferred embodiment, a nitrogen carrier gas
- Hydrogen is not used because passivation of the p-type layer 34 may occur in the short time between the end of growth of the diode 30 and the deposition of the sufficiently thick barrier layer 32.
- barrier layer 32 is usually sufficient to protect the GaN surface, so the deposition can be performed quickly if sufficient barrier layer source gasses are provided.
- barrier layer thicknesses can be used. In some applications a barrier layer only a few angstroms thick would be sufficient. The thicker the barrier layer or barrier layer stack, the more effective the passivation of doping species is prevented. However, if too thick a barrier layer 32 is applied, damage to the diode 30 may occur during barrier growth or reactor cooling .
- reactor chamber 11 conditions can be used for the MgN x , Si, or SiN x deposition, so the protective layer 32 can usually be deposited using the same growth conditions as the final diode layer.
- Reaction chamber 11 conditions may also be varied during deposition of the protective layer 32 to provide the greatest benefit for the application.
- the deposition may be performed during reaction chamber cooling in order to minimize the thermal residence time of the device.
- the temperature may be maintained during deposition if thermal residence is not a critical issue.
- the reaction chamber ambient may be modified to suit the limitations of the device application.
- the ambient gas can be changed to a non-reactive gas such as nitrogen, helium, argon, or mixtures thereof.
- a non-reactive gas such as nitrogen, helium, argon, or mixtures thereof.
- This ambient change can facilitate the purging of source gasses from the reactor chamber and the stabilization of either the semiconductor or barrier layer material during the cool down process.
- the ambient is nitrogen, helium, argon or a mixture of these gases. This process allows significant flexibility in reactor conditions following the deposition of the barrier layer 32 without the danger of damaging the semiconductor or the barrier layer material.
- the ambient gas may be changed to reactive gasses like nitrous oxide, oxygen, hydrogen, mixtures thereof or mixtures with non-reactive gasses.
- the passivation barrier layer 32 can remain on the surface. This offers the added benefit of preserving the grown semiconductor material and sensitive surface properties from contamination prior to the subsequent device fabrication steps.
- the barrier layer 32 may be removed immediately prior to further processing steps such as etalization of contacts.
- the barrier layer 32 is removed with wet chemical hydrofluoric acid (HF) etching.
- FIG 3 shows the diode 30 in the HF wet chemical 46 that will dissolve the protective layer.
- HF wet chemical hydrofluoric acid
- the barrier layer 32 should retard damage to the surface. If slow, highly controlled cooling is desired to minimize residual thermal stresses the additional thermal budget should not affect the device surface once the barrier layer 32 is deposited. Diffusion of other impurities from the reactor ambient into the device following growth will be eliminated. Densities of surface electron states resulting from surface damage should be significantly reduced. Surface damage of p-type layers that can result in the formation of thin n-type layers (which increases contact resistance) are minimized.
- the composition of the barrier layer compounds can be adjusted during growth to contain an excess of gettering components by selecting proper ratios of the corresponding source gasses.
- FIG. 4 shows a p-n junction diode 50 similar to the diode in FIGs. 3 and 4, having a hydrogen binding/gettering layer 52 on its surface.
- the layer 52 is deposited on diode 50 using MOCVD source gasses in a N or H source gas 54.
- the layer 52 is used for blocking or reducing the diffusion of hydrogen into the semiconductor and also for gettering hydrogen at the semiconductor interface with the ambient.
- the preferred gettering layer material contains components that have a high binding energy to atomic hydrogen and higher than the binding energy between hydrogen and the acceptor or donor species (e.g.
- Mg-H bond 126 kJ/ ol
- the gettering layer can have different layers that can be a repeated sequence of multiple gettering materials.
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- Condensed Matter Physics & Semiconductors (AREA)
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- Junction Field-Effect Transistors (AREA)
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Abstract
Description
Claims
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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US18963000P | 2000-03-14 | 2000-03-14 | |
US189630P | 2000-03-14 | ||
US09/644,875 US6498111B1 (en) | 2000-08-23 | 2000-08-23 | Fabrication of semiconductor materials and devices with controlled electrical conductivity |
US644875 | 2000-08-23 | ||
PCT/US2001/007976 WO2001069659A2 (en) | 2000-03-14 | 2001-03-13 | Fabrication of semiconductor materials and devices with controlled electrical conductivity |
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EP1269520A2 true EP1269520A2 (en) | 2003-01-02 |
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EP01916604A Ceased EP1269520A2 (en) | 2000-03-14 | 2001-03-13 | Fabrication of semiconductor materials and devices with controlled electrical conductivity |
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EP (1) | EP1269520A2 (en) |
JP (1) | JP5314233B2 (en) |
KR (1) | KR100923937B1 (en) |
CN (1) | CN100559619C (en) |
AU (1) | AU2001243606A1 (en) |
CA (1) | CA2402662C (en) |
MY (1) | MY126104A (en) |
TW (1) | TWI238541B (en) |
WO (1) | WO2001069659A2 (en) |
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NL1022021C2 (en) * | 2002-11-28 | 2004-06-02 | Univ Eindhoven Tech | Formation of vacancies in semiconductor, useful for LEDs or laser diodes, by depositing dielectric layer on gallium arsenide structure, heating and removing this layer |
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KR100742988B1 (en) * | 2005-11-25 | 2007-07-26 | (주)더리즈 | A manufacturing method for p type GaN device |
JP2009130316A (en) * | 2007-11-28 | 2009-06-11 | Panasonic Corp | Nitride semiconductor device and method of manufacturing the same |
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TWI548000B (en) * | 2014-12-22 | 2016-09-01 | 力晶科技股份有限公司 | Semiconductor device and method of manufacturing thereof |
CN109285774B (en) * | 2018-09-12 | 2023-03-24 | 江苏能华微电子科技发展有限公司 | Junction barrier Schottky diode based on gallium nitride and forming method thereof |
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2001
- 2001-03-13 WO PCT/US2001/007976 patent/WO2001069659A2/en active Application Filing
- 2001-03-13 KR KR1020027012087A patent/KR100923937B1/en active IP Right Grant
- 2001-03-13 AU AU2001243606A patent/AU2001243606A1/en not_active Abandoned
- 2001-03-13 CA CA2402662A patent/CA2402662C/en not_active Expired - Lifetime
- 2001-03-13 EP EP01916604A patent/EP1269520A2/en not_active Ceased
- 2001-03-13 JP JP2001567026A patent/JP5314233B2/en not_active Expired - Lifetime
- 2001-03-13 CN CNB018094562A patent/CN100559619C/en not_active Expired - Lifetime
- 2001-03-14 MY MYPI20011181A patent/MY126104A/en unknown
- 2001-04-16 TW TW090105940A patent/TWI238541B/en not_active IP Right Cessation
Non-Patent Citations (1)
Title |
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See references of WO0169659A2 * |
Also Published As
Publication number | Publication date |
---|---|
JP2004528700A (en) | 2004-09-16 |
CA2402662A1 (en) | 2001-09-20 |
JP5314233B2 (en) | 2013-10-16 |
CA2402662C (en) | 2012-06-12 |
KR100923937B1 (en) | 2009-10-29 |
WO2001069659A3 (en) | 2002-02-21 |
KR20020079955A (en) | 2002-10-19 |
CN100559619C (en) | 2009-11-11 |
TWI238541B (en) | 2005-08-21 |
WO2001069659A2 (en) | 2001-09-20 |
CN1443373A (en) | 2003-09-17 |
AU2001243606A1 (en) | 2001-09-24 |
MY126104A (en) | 2006-09-29 |
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