EP1231529B1 - Precise reference voltage generating device - Google Patents

Description

The present invention relates to a device generating a precise reference voltage, more particularly intended to produce, from an external supply potential capable of varying between a minimum value and a maximum value, a precise reference output voltage. which is stable regardless of the operating temperature of the generator and the value of the external supply potential.

Such generating devices are particularly suitable for providing a stable reference potential to an electronic circuit, such as for example an analog-digital converter, so as to make the operation of the latter more stable and more precise, while reducing the consumption of these devices. generators.

Among these generating devices, the invention relates more particularly to those comprising a semiconductor circuit 1, more commonly referred to as a "band-gap" circuit in English language, this type of circuit making it possible to generate a reference voltage, hereinafter referred to as semiconductor circuit 1, and at least one voltage multiplier circuit 2 cascaded with this semiconductor circuit, said voltage multiplier circuit being adapted to supply, from the reference voltage delivered by the semiconductor circuit, the reference output voltage stable. Such a generating device of the prior art is represented in FIG. 1a.

Usually, semiconductor circuits of this type require, before any use, a pre-adjustment so that the reference potential delivered by the latter is as stable and accurate as possible regardless of any variations in the external supply voltage and temperature.

• ■ soit ce circuit à semi-conducteurs est réglé de façon à ce que la tension de référence délivrée par ce dernier ne varie que, par exemple, de quelques mV dans toute la gamme de températures de fonctionnement, au détriment d'une variation de, par exemple, plusieurs dizaines de mV dans toute la gamme de la tension d'alimentation ;
• ■ soit ce circuit à semi-conducteurs est réglé de façon à obtenir un compromis entre la stabilité en température, la tension de référence délivrée par ce dernier et la tension d'alimentation externe variant de, par exemple, une dizaine de mV en tension et en température.

The disadvantage of this 1 "band-gap" semiconductor circuit lies in the fact that a compromise must always be found between obtaining a temperature accuracy and obtaining a voltage accuracy of food. More precisely, the setting of this type of semiconductor circuit can be carried out according to three modalities, that is to say that:

• Either this semiconductor circuit is set so that the reference voltage delivered by the latter varies only, for example, by a few mV over the entire operating temperature range, to the detriment of a variation of, for example, several tens of mV across the entire range of supply voltage;
• Either this semiconductor circuit is adjusted so as to obtain a compromise between the temperature stability, the reference voltage delivered by the latter and the external supply voltage varying from, for example, about ten mV in voltage and in temperature.

The result of such a setting is a non-negligible inaccuracy of the reference voltage delivered by this semiconductor circuit 1, this inaccuracy being, however, reflected by multiplication by the multiplier circuit 2 on the predetermined output voltage deemed accurate, outputted. of the voltage generating device.

Indeed, as shown in FIG. 1a, the voltage multiplier circuit 2 comprises a differential amplifier OPA receiving on its negative terminal the voltage reference Vref as a reference voltage and a resistive reaction circuit R ' ₁ , R' ₂ , R'3 with a decoupling capacitor C ₂ comprising a regulation transistor Tr connected between the supply voltage Vcc and the resistive bridge reducing partly the output voltage V _OUT , reference voltage deemed accurate, on the positive terminal of the operational amplifier OPA. The gate electrode of the regulation transistor Tr is connected and controlled by the output of the differential amplifier OPA, the junction point between the regulation transistor Tr and the resistive bridge constituting the output terminal delivering the reference voltage deemed accurate. . The regulation transistor Tr plays the role of a voltage-controlled resistor and the multiplier circuit 2 makes it possible to slave the output voltage to a value greater than the reference voltage Vref, but less than the value of the supply voltage. Vcc, as a function of the relative values of the resistors R ' ₁ , R' ₂ and R ₃ , the resistance value of the regulation transistor Tr being low.
However, the variations of the supply voltage, and the reference voltage Vref, are amplified accordingly, which affects the real accuracy of the assembly.

Moreover, these reference generators have a high consumption especially when the external supply potential Vcc is at its maximum value.

US-A-6,046,577 discloses a low voltage voltage regulator of waste.

The object of the present invention is in particular to remedy these drawbacks by improving the precision and the stability of the precise reference generator devices, independently of their relative adjustment in external supply voltage, respectively in operating temperature, while benefiting from a lesser consumption.

For this purpose, the present invention proposes a device generating a precise reference voltage according to claim 1.

The initialization circuit comprises a generator circuit of a control pulse of determined duration, this control pulse, applied to the gate electrode of the control transistor controlling the control transistor in the fully conductive state, for the duration initializing. This makes it possible to impose on the output terminal of the generator device of a precise reference voltage a voltage equal to the voltage for setting the supply voltage during the initialization period.

• la figure 2 est un schéma du dispositif selon la présente invention ;
• la figure 3 représente un mode de réalisation préférentiel du dispositif générateur d'une tension de référence précise, objet de la présente invention ;
• les figures 4a à 4j représentent l'évolution des tensions en des points de test significatifs du dispositif selon la présente invention.

Other characteristics and advantages of the invention will emerge during the following description of one of its embodiments, given by way of non-limiting example, with reference to the accompanying drawings, in which, in addition to FIG. 1a and FIG. FIG. 1b relating to the prior art:

• Figure 2 is a diagram of the device according to the present invention;
• FIG. 3 represents a preferred embodiment of the device generating a precise reference voltage, object of the present invention;
• Figures 4a to 4j show the evolution of voltages at significant test points of the device according to the present invention.

With reference to FIG. 2, the device generating a precise reference voltage, according to the present invention, comprises a semiconductor circuit 1 of the " band-gap " type which is cascaded with a circuit voltage multiplier 2.

The semiconductor circuit 1 is constituted by a "band-gap" type circuit as represented in FIG. 1b generating a reference voltage Vref.

An example of such a semiconductor circuit generating a reference voltage is shown schematically in Figure 1b above when this circuit is powered by a supply voltage Vcc. The latter is made in the form of an integrated circuit. It is widely used in the prior art and provides a relatively stable reference voltage Vref. This circuit is known as a "bandgap reference voltage source", the word bandgap being a word of English origin designating the energy of passage of the electrons from the conduction band to the valence band in the semiconductor driver used. This energy depends, in a known manner, on the temperature. Reference sources of this type use the dependence of certain circuit parameters as a function of this energy and therefore of the temperature, to achieve, by appropriate compensations, an approximately stable reference voltage Vref.

The circuit of FIG. 1b essentially comprises two diode-mounted bipolar transistors T ₁ , T ₂ , three resistors R ₁ , R ₂ , R ₃ , and an operational amplifier OPA.

The amplifier OPA, which is powered by the external supply voltage Vcc, comprises an inverting input connected to the collector of the bipolar transistor T ' ₂ , and a non-inverting input connected to the resistor R ₁ which is itself connected to the collector of the bipolar transistor T ' ₁ . The resistor R ₃ , in turn, allows the establishment of the circuit during a rise of the external supply voltage Vcc. The reference voltage Vref stable according the temperature and the external supply voltage Vcc, is provided at the output S of the circuit.

où V_be2 et V_T sont respectivement la tension base émetteur et la tension de seuil du transistor T'₂, et I₁ et I₂ les courants circulant respectivement dans les résistances R₁ et R₂, In désignant le logarithme népérien.The stability of the reference voltage Vref is based in particular on a suitable choice of the joining surfaces of the two bipolar transistors T ' ₁ , T' ₂ , and values of R ₁ and R ₂ . $$\mathrm{V}\mathrm{ref}={\mathrm{V}}_{\mathrm{b}\mathrm{e}\mathrm{two}}+\mathrm{two}\times \frac{{\mathrm{R}}_{\mathrm{two}}}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="imgf0002.png,imgf0003.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}\ln \left(\frac{{\mathrm{I}}_{\mathrm{two}}}{{\mathrm{I}}_1}\right){\mathrm{V}}_{\mathrm{T}}$$

where V _be2 and V _T are respectively the emitter base voltage and the threshold voltage of the transistor T ' ₂ , and I ₁ and I ₂ the currents flowing respectively in the resistors R ₁ and R ₂ , In denoting the natural logarithm.

In the example shown, Vcc is likely to vary between Vcc _min = 2V and Vcc _max = 5.5V, R ₁ = 22k, R ₂ = 64.3k and R ₃ = 100k. The amplitude value of the reference voltage Vref then obtained at the output is of the order of 1.25V.

This semiconductor circuit 1 is subjected, in a manner analogous to the prior art bandgap reference voltage sources, to a prior adjustment. In the example shown, the semiconductor circuit 1 is set so that Vref varies from 2 mV in temperature and 30 mV in voltage.

Referring again to FIG. 2, the voltage multiplier circuit 2 comprises a differential amplifier 20 consisting of an operational amplifier OP ₁ which is mounted as a voltage multiplier, the voltage multiplier circuit 2 operating as a multiplier and a voltage regulator .

This differential amplifier 20 has an input not inverter + which is connected directly to the output S of the semiconductor circuit 1, an output S ₁ which delivers a predetermined output voltage V _OUT , constituting the desired precise reference voltage. This output S ₁ is connected by a galvanic connection 3 to the power supply input IN of the semiconductor circuit 1 generating the reference voltage Vref. Thus, the semiconductor circuit 1 is, in steady state, powered by the precise reference voltage, as will be described in more detail in the description. A capacitor C ₁ smoothes the reference voltage Vref and a capacitor C ₃ smoothes the output voltage V _OUT .

In addition, as can be seen in FIG. 2, a resistive feedback circuit is provided, which comprises a regulation transistor Tr connected between the supply voltage Vcc and a resistive bridge R ' ₁ , R' ₂ , R ' ₃ reducing, in part, the precise reference voltage, output voltage V _OUT delivered by the output terminal S ₁ , to the non-inverting terminal + of the differential amplifier 20, operational amplifier OPA. The gate electrode of the regulation transistor Tr is connected and controlled by the output of the differential amplifier 20. The junction point between the regulation transistor Tr and the resistive bridge constitutes for the precise reference voltage generating device the terminal output S ₁ delivering the precise reference voltage V _OUT .

It is understood in particular that in steady state, the differential amplifier 20 slaves the output voltage V _OUT , precise reference voltage, to a value greater than the reference voltage value Vref delivered by the semiconductor circuit 1, the steady-state equilibrium being obtained for: $${\mathrm{V}}_{\mathrm{OUT}}\times \frac{{{\mathrm{R}}^{\text{'}}}_{\mathrm{two}}+{{\mathrm{R}}^{\text{'}}}_3}{{{\mathrm{R}}^{\text{'}}}_1+{{\mathrm{R}}^{\text{'}}}_{\mathrm{two}}+{{\mathrm{R}}^{\text{'}}}_3}-\mathrm{V}\mathrm{ref}=0$$

The reference voltage Vref constitutes a set value. The regulation transistor Tr plays the role of an adjustable voltage-controlled resistor by the output of the differential amplifier 20. A decoupling capacitor C ₂ makes it possible to ensure the stability of the servocontrol by introducing a margin of suitable phase under transient conditions.

Finally, an initialization circuit 4 is connected to the gate electrode of the regulation transistor Tr. This circuit 4 allows, in a transient state, during initialization, when power is applied to the supply voltage Vcc of the device. precise reference generator, object of the invention, to replace the precise reference voltage Vref, not yet established by the semiconductor circuit 1 of the "band-gap" type , this type of circuit having a voltage operating threshold not insignificant power supply, by the voltage of establishment of the supply voltage Vcc.

Such a procedure makes it possible, on the one hand, in a transient state, during initialization, to feed the semiconductor circuit 1 from the voltage for setting the supply voltage Vcc, and, because of this, the increasing nature of this supply voltage, to cause, according to a cumulative phenomenon, the corresponding rise in the output voltage V _OUT delivered by the output terminal S ₁ and therefore that of the supply voltage of the circuit to semi -conductors 1 because of the presence of the link This operating mode allows, on the other hand, in steady state, to deliver on the output terminal S ₁ , the precise reference voltage sought, the reference voltage Vref having reached its nominal value, and to supply the semiconductor circuit 1 from the nominal value of the reference voltage Vref.

In the example represented in FIG. 2, Vref = 1.25V, R'1 = 0.955MΩ, R'2 = 0.16MΩ and R'3 = 0.95MΩ. Therefore, V _OUT = 2.32V.

The differential amplifier 20, which is thus cascaded with the semiconductor circuit 1 generator of the reference voltage Vref and which, as a result, receives as its reference voltage the reference voltage Vref, makes it possible to deliver a voltage of regulated V _OUT output constituting the precise reference voltage sought regardless of the operating temperature and the external supply voltage Vcc. In particular, a fine-tuning of the semiconductor circuit 1 may be chosen preferentially, since the voltage regulation as a function of the supply voltage is also provided by the multiplier and voltage regulator circuit 2.

The series connection of the semiconductor circuit 1 and the voltage multiplier circuit 2 makes it possible to produce a device generating a precise reference voltage which is particularly suitable for being associated with a load, such as an electronic circuit, of digital or analog type, requiring a very stable voltage reference for a comparison of ADC digital analog conversion for example and a controlled operating stability. This is so, for example, analog converters digital.

The advantage of such an assembly resides in fact in the loopback, by the galvanic connection 3, the voltage multiplier circuit 2 on the supply input of the semiconductor circuit 1 generator of the reference voltage Vref which allows advantageously to substantially reduce the adjustment of the voltage accuracy of the latter but to increase the accuracy of the temperature adjustment range. It is possible to obtain a high precision of the reference voltage Vref of the semiconductor circuit 1 and therefore of the output voltage V _OUT . Indeed, when the semiconductor circuit 1 generator of the reference voltage Vref and the multiplier circuit 2 have each reached their steady state, in steady state, the regulation transistor Tr is adjusted so that the output voltage V _OUT is fed back to the power supply input IN of the semiconductor circuit 1, which is then powered from the stable supply voltage constituted by the precise reference voltage.

Various specific embodiments of the initialization circuit 4 will now be described.

In a first simplified embodiment, the initialization circuit 4 may be formed by a generator of a fixed duration control pulse. Under these conditions, the control pulse CP applied to the gate electrode of the regulation transistor Tr makes it possible to bring this transistor to the fully conductive state during the initialization period and thus to impose on the terminal output S ₁ of the specific voltage generator device object of the invention, and on the supply terminal of the semiconductor circuit 1 generator of the reference voltage Vref, a voltage substantially equal to the voltage setting the supply voltage.

In a non-limiting embodiment, the generator 4 may be constituted by a monostable type circuit of adjustable duration from a control voltage VD. The duration of the control pulse CP can be adjusted experimentally for a given circuit group. The generator 4 is of course supplied by the supply voltage Vcc, which is established more rapidly than the reference voltage Vref delivered by the semiconductor circuit 1.

In a second preferred embodiment, the circuit 4 generating a determined duration control pulse is constituted by a bistable type circuit, synchronized to a start time and an end time of the initialization time. In this situation, the initialization time is defined by the beginning, respectively the end of the establishment of the reference voltage Vref delivered by the semiconductor circuit 1.

A specific embodiment of the preferred embodiment of the initialization circuit 4 is shown in FIG. 3. In the above-mentioned figure, the same references represent the same elements as in the context of FIG.

With reference to FIG. 3, the synchronized bistable type circuit comprises a first and a second circuit for detecting the simultaneous presence of a reference voltage setting voltage Vref, delivered by the semiconductor circuit 1, respectively of the precise reference voltage V _OUT present at the output terminal S ₁ . The first and second detection circuits are each formed by an N-MOS transistor T ₂ , T ₃ connected in cascade via a resistor R ' ₄ between the supply voltage Vcc and the ground voltage V _GND . The gate of the transistor T ₂ , the first detection circuit, is connected at the output S of the semiconductor circuit 1 to detect the presence of the voltage for setting the reference voltage Vref. The gate of the transistor T ₃ , the second detection circuit, is connected to a point representative of the output voltage V _{OUT in order} to detect the presence of the voltage for establishing the precise reference voltage. This representative point may, for example, be constituted by the connection point of the resistive bridge, the junction point between R ' ₂ and R' ₃ for example.

In addition, a nonlinear switching circuit NL is provided. This circuit is formed by two cascaded inverters INV ₁ and INV ₂ . The non-linear circuit controls an initialization control transistor TN ₄ , which is connected between the gate of the regulation transistor Tr and the reference voltage V _GND . The gate electrode of the initialization control transistor is directly connected to the output of the second inverter INV ₂ forming the nonlinear circuit NL. The non-linear switching circuit NL receives as input the voltage detected by the first and the second detection circuit T ₂ , T ₃ , and makes it possible to compare this detected voltage representative of a reference voltage or a reference voltage respectively. accurate less than a threshold value. This threshold value is representative of the initialization time. In this comparison, the non-linear switching circuit NL delivers a first control voltage as long as the detected voltage is greater than the threshold value and a second control voltage otherwise, to the initialisation control transistor T ₄ , which delivers in turn switching the control pulse CP to regulation transistor Tr.

• le circuit d'initialisation 4 ne fonctionne que pour 0 ≤ Vcc ≤ 2V, c'est-à-dire avant que le circuit à semi-conducteurs 1 ne fonctionne et ne délivre la tension de référence Vref.
• La tension de sortie V_OUT, constituant la tension de référence précise, est égale à Vcc tant que la tension délivrée par le circuit non linéaire de commutation NL à la grille du transistor TN4 de commande d'initialisation est à un niveau haut, le transistor étant totalement conducteur et imposant V_OUT = Vcc (établissement).

The operation of the whole is then the following:

• the initialization circuit 4 operates only for 0 ≤ Vcc ≤ 2V, that is to say before the semiconductor circuit 1 operates and delivers the reference voltage Vref.
• The output voltage V _OUT , constituting the precise reference voltage, is equal to Vcc as long as the voltage delivered by the non-linear switching circuit NL to the gate of the initialization control transistor TN4 is at a high level, the transistor being totally conductive and imposing V _OUT = Vcc (establishment).

The device generating a precise voltage according to the present invention operates in the following manner.

When powering up, the semiconductor circuit 1 generator of the reference voltage Vref outputs a first potential close to 0V, Vref <1V, and the differential amplifier 20 outputs a first near output potential. 0V, V _OUT <2V, the transistors T ₂ and T ₃ are then blocked. The input of the inverter INV ₁ then receives a voltage equal to V _CC which is supplied to the source of the transistor T ₃ by R ' ₄ . This voltage is transmitted via the two inverters INV ₁ and INV ₂ constituting the nonlinear switching circuit NL on the gate of the transistor T ₄ which turns on. The gate of the regulation transistor Tr is then biased by the drain / source voltage of the transistor 4, which has a low level, the regulation transistor Tr becoming in turn passing. Given that this drain / source voltage has a low level and that the value of the drain / source voltage of the regulating transistor Tr is equal to approximately 0V, V _drain = V _source = Vcc, the supply input IN of the semiconductor circuit 1 is subjected to the voltage for setting the supply voltage Vcc by the galvanic connection 3.

When the semiconductor circuit 1 generator of the reference voltage outputs a reference voltage having reached Vref = 1.2V which represents its minimum reference potential in operation, and that the differential amplifier 20 outputs a voltage output V _OUT > 2V, the corresponding gates of the transistors T ₂ and T ₃ are respectively biased by Vref and V _OUT , these transistors then becoming on. The input of the inverter INV ₁ then receives a voltage of zero value which is supplied on the source of the transistor T ₃ . This voltage is transmitted via the non-linear switching circuit NL to the gate of transistor T ₄ which becomes blocked. The gate of the regulation transistor Tr is then biased by the output voltage V _SI1 delivered by the differential amplifier 20, and the regulation transistor Tr then behaves as a resistor which follows the evolution of V _SI1 . The output voltage constituting the precise reference voltage is now delivered to the power supply input IN of the semiconductor circuit 1.

When, in steady state, the operation of the semiconductor circuit 1 generator of the reference voltage and of the differential amplifier 20 is stabilized, that is to say that, in the example represented, Vref = 1.25V and that V _OUT = 2.4V, the power supply input IN of the semiconductor circuit 1, connected to the output S ₁ and to the drain of the transistor T ₁ , is permanently subjected to the precise reference voltage at V _OUT = 2.4V, this independently of the variations of Vcc. This mode of operation implies a clear reduction in current consumption of the device generating a precise reference voltage, object of the present invention, compared to that of the corresponding devices of the prior art.

In addition, particularly remarkably, given the fact that the device according to the invention operates in closed-loop control, the semiconductor circuit 1 generator of the reference voltage is intrinsically stable and accurate in voltage, without which it is necessary to make a specific adjustment in voltage, which then makes it possible to choose a precise adjustment in temperature, rather than in tension. Measurements have shown that the voltage accuracy of the semiconductor circuit 1 generator of the reference voltage was of the order of 2mV. Such accuracy and stability are advantageously reflected in the output voltage V _OUT output OUT and constituting the precise reference voltage in the sense of the present invention.

• les figures 4a et 4b représentent les valeurs de la tension de sortie V_OUT et de la tension de référence Vref en fonction de la tension d'alimentation externe Vcc, respectivement les valeurs de l'intensité du courant délivré par la tension d'alimentation Vcc et par la borne de sortie S₁ à une charge donnée, l'axe des ordonnées étant gradué en centaines de micro-ampères ;
• les figures 4c et 4d représentent les variations de la tension de référence Vref délivrée en sortie S en fonction de la température, respectivement de la tension d'alimentation Vcc, pour un réglage mixte ;
• les figures 4e et 4f représentent les variations de la tension de référence Vref délivrée en sortie S en fonction de la température, respectivement de la tension du circuit à semi-conducteurs 1 réglé seulement en température, la figure 4f montrant une forte variation de la tension d'alimentation.

For a semiconductor circuit 1:

• FIGS. 4a and 4b represent the values of the output voltage V _OUT and of the reference voltage Vref as a function of the external supply voltage Vcc, respectively the values of the intensity of the current delivered by the supply voltage Vcc and by the output terminal S ₁ at a given load, the ordinate axis being graduated in hundreds of microamperes;
• FIGS. 4c and 4d represent the variations of the reference voltage Vref delivered at output S a function of the temperature, respectively of the supply voltage Vcc, for a mixed regulation;
• FIGS. 4e and 4f represent the variations of the reference voltage Vref delivered at the output S as a function of the temperature, respectively of the voltage of the semiconductor circuit 1 regulated only at a temperature, FIG. 4f showing a strong variation of the voltage power.

• les figures 4g et 4h représentent, à des échelles de valeurs de tension différentes, les variations de la tension de sortie V_OUT, de la tension de référence Vref et de la tension appliquée sur la grille du transistor de régulation Tr lorsque, en référence aux figures 4e et 4f, le circuit à semi-conducteurs est réglé seulement en température ;
• les figures 4i et 4j représentent, à des échelles de valeurs de tension différentes, la tension de référence Vref délivrée par le circuit à semi-conducteurs 1, respectivement la tension de sortie V_OUT, tension de référence précise délivrée sur la borne S₁ en fonction de la valeur de la tension d'alimentation Vcc.

For the device object of the invention represented in FIG.

• FIGS. 4g and 4h represent, at scales of different voltage values, the variations of the output voltage V _OUT , of the reference voltage Vref and of the voltage applied to the gate of the regulation transistor Tr when, with reference to FIGS. Figures 4e and 4f, the semiconductor circuit is set only temperature;
• FIGS. 4i and 4j show, at different voltage value scales, the reference voltage Vref delivered by the semiconductor circuit 1, respectively the output voltage V _OUT , a precise reference voltage delivered to the terminal S ₁ in FIG. depending on the value of the supply voltage Vcc.

Claims (4)

1. Device generating a precise reference voltage (V_OUT) comprising a semiconductor circuit (1) generating a second reference voltage (Vref) and a voltage multiplier circuit (2) which are supplied from a supply voltage (Vcc), this voltage multiplier circuit (2) comprising at least one differential amplifier (20) receiving on its negative terminal said second reference voltage (Vref) as set-point voltage and a resistive feedback circuit comprising a regulating transistor (Tr) connected between said supply voltage (Vcc) and a resistive bridge (C₂,R'₁) restoring, in part, the precise reference voltage (V_OUT) on the positive terminal of said differential amplifier (20), the gate electrode of said regulating transistor (Tr) being linked and controlled by the output of said differential amplifier (20) and the junction point between said regulating transistor and said resistive bridge constituting for this generating device an output terminal (S₁) delivering said precise reference voltage (V_OUT),
   wherein it furthermore comprises:

   - a galvanic link linking said output terminal (S₁) delivering said precise reference voltage (V_OUT) to the supply input (IN) of said semiconductor circuit (1);

   - an initialization circuit (4) connected to the gate electrode of said regulating transistor (Tr) and making it possible, under transient conditions, on initialization, by turning on at the supply voltage (Vcc) of said precise reference voltage generating device, to replace said precise reference voltage (V_OUT) with the build-up voltage of said supply voltage, thereby making it possible, on the one hand, under transient conditions, on initialization, to supply said semiconductor circuit from the build-up voltage of said supply voltage, and, on the other hand, under steady conditions, to deliver on said output terminal (S) of said generating device said precise reference voltage (V_OUT) and to supply said semiconductor circuit (1) from this precise reference voltage (V_OUT).
2. Device according to Claim 1, wherein said initialization circuit (4) includes a circuit generating a control pulse of specified duration, said control pulse applied to the gate electrode of said regulating transistor tripping said regulating transistor (Tr) into the fully on state, for the duration of initialization, thereby making it possible to impose on the output terminal (S₁) of said device a voltage equal to said build-up voltage of said supply voltage.
3. Device according to Claim 2, wherein said circuit generating a control pulse of specified duration consists of a circuit of bistable type, synchronized with the start instant and with the end instant of said duration of initialization defined by the start respectively the end of the build-up of said second reference voltage (Vref) delivered by said semiconductor circuit (1).
4. Device according to Claim 3, wherein said synchronized circuit of bistable type comprises:

   - a first and a second circuit for detecting the simultaneous presence of a build-up voltage of the reference voltage, respectively of the precise reference voltage (V_OUT) on the output terminal (S₁), these first and second detection circuits being connected in cascade and making it possible to develop a detected voltage representative of the second reference voltage (Vref), respectively of the precise reference voltage (V_OUT), below a threshold value representative of said duration of the initialization period;

   - a non-linear switching circuit receiving as input said detected voltage and making it possible to compare this detected voltage with said threshold value, said non-linear circuit delivering a first control voltage while said detected voltage is above said threshold value and a second control voltage otherwise;

   - an initialization control transistor whose gate electrode connected at the output of said non-linear circuit is controlled in switching mode by the first, respectively the second control voltage delivered by said non-linear switching circuit, said initialization control transistor being connected in parallel between the gate electrode of said regulating transistor and the earth voltage of said device, thereby making it possible to turn on said initialization control transistor when said non-linear switching circuit delivers the first control voltage, the output terminal of the device delivering, for the duration of initialization, the build-up voltage of said supply voltage by way of said regulating transistor, rendered fully on, respectively the turning off of said initialization control transistor when said non-linear switching circuit delivers the second control voltage, the output terminal of said device delivering said precise reference voltage (V_OUT) by way of said regulating transistor, playing the role of a voltage-controlled resistor tripped by the output of said differential amplifier (20).

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