EP1196947A4 - Oberflächenpassivierung von dünnen silizium-filmen während und nach verarbeitungsschritten bei der sequentiellen lateralen kristallisation - Google Patents
Oberflächenpassivierung von dünnen silizium-filmen während und nach verarbeitungsschritten bei der sequentiellen lateralen kristallisationInfo
- Publication number
- EP1196947A4 EP1196947A4 EP00919501A EP00919501A EP1196947A4 EP 1196947 A4 EP1196947 A4 EP 1196947A4 EP 00919501 A EP00919501 A EP 00919501A EP 00919501 A EP00919501 A EP 00919501A EP 1196947 A4 EP1196947 A4 EP 1196947A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- laser pulses
- thin film
- polycrystalline
- single crystal
- crystal thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims abstract description 80
- 238000007711 solidification Methods 0.000 title claims abstract description 29
- 230000008023 solidification Effects 0.000 title claims abstract description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims description 29
- 229910052710 silicon Inorganic materials 0.000 title claims description 28
- 239000010703 silicon Substances 0.000 title claims description 28
- 238000012545 processing Methods 0.000 title claims description 13
- 239000010409 thin film Substances 0.000 claims abstract description 67
- 239000013078 crystal Substances 0.000 claims abstract description 53
- 230000008569 process Effects 0.000 claims abstract description 44
- 238000013519 translation Methods 0.000 claims abstract description 27
- 230000008018 melting Effects 0.000 claims abstract description 16
- 238000002844 melting Methods 0.000 claims abstract description 16
- 230000003746 surface roughness Effects 0.000 claims abstract description 11
- 230000000694 effects Effects 0.000 claims abstract description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 230000000873 masking effect Effects 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 230000008602 contraction Effects 0.000 claims description 3
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 3
- 230000014616 translation Effects 0.000 description 20
- 239000010408 film Substances 0.000 description 17
- 239000004065 semiconductor Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000012805 post-processing Methods 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 238000005224 laser annealing Methods 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004320 controlled atmosphere Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 239000010438 granite Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
- B23K26/06—Shaping the laser beam, e.g. by masks or multi-focusing
- B23K26/062—Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam
- B23K26/0622—Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam by shaping pulses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02686—Pulsed laser beam
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
- B23K26/06—Shaping the laser beam, e.g. by masks or multi-focusing
- B23K26/064—Shaping the laser beam, e.g. by masks or multi-focusing by means of optical elements, e.g. lenses, mirrors or prisms
- B23K26/066—Shaping the laser beam, e.g. by masks or multi-focusing by means of optical elements, e.g. lenses, mirrors or prisms by using masks
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/08—Devices involving relative movement between laser beam and workpiece
- B23K26/083—Devices involving movement of the workpiece in at least one axial direction
- B23K26/0853—Devices involving movement of the workpiece in at least in two axial directions, e.g. in a plane
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/352—Working by laser beam, e.g. welding, cutting or boring for surface treatment
- B23K26/3568—Modifying rugosity
- B23K26/3576—Diminishing rugosity, e.g. grinding; Polishing; Smoothing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02678—Beam shaping, e.g. using a mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
Definitions
- the present invention relates to techniques for semiconductor processing, and more particularly to semiconductor processing which may be performed at low temperatures.
- An object of the present invention is to provide techniques for planarizing the surfaces of polycrystallme and single crystal thin film semiconductors.
- a further object of the present invention is to provide surface planarization techniques that may be applied as a post processing step to polycrystallme and single crystal thin film semiconductors that are produced during a sequential lateral solidification process.
- the present invention provides systems and methods for reducing surface roughness of a polycrystallme or single crystal thin film that had previously been produced by the sequential lateral solidification process.
- the system includes an excimer laser for generating a plurality of excimer laser pulses of a predetermined fluence, an energy density modulator for controUably modulating the fluence of the excimer laser pulses such that the fluence is below that which is required to completely melt the thm film, a beam homogemzer for homogenizing modulated laser pulses in a predetermined plane, a sample stage for receiving homogenized laser pulses to effect partial melting of portions of the polycrystallme or single crystal thm film corresponding to the laser pulses, translating means for controUably translating a relative position of the sample stage with respect to the laser pulses, and a computer for coordinating the excimer pulse generation and fluence modulation with the relative positions of the sample stage to thereby process
- the beam homogemzer is operable to shape laser pulses with a tophat profile in both the x and y directions
- the energy density modulator is operable to attenuate fluence of the excimer laser pulses to approximately 25% to 75% of the full melt threshold of the polycrystallme or single crystal thm film
- the translating stage advantageously includes an X direction translation portion and a Y direction translation portion, each being coupled to the computer and to each other and permitting movement in two orthogonal directions that are perpendicular to a path formed by the laser pulses, and being controllable by the computer for controUably translating the sample in both of said translatable directions under control of said computer
- the beam homogemzer is operable to shape said laser pulses with a tophat profile in both the x and y directions
- the translating means is operable to translate the polycrystallme or single crystal thin film in two directions orthogonal to a direction of said laser pulses such that sequential homogenized laser pulses are incident on slightly overlapping regions of the polycrystallme or single crystal thm film in the two directions
- the present invention provides for systems and methods for processing an amorphous silicon thm film sample into a single or polycrystallme silicon thin film having a reduced surface roughness
- the method includes forming a rigid cap layer on an amorphous silicon thin film sample having sufficient thickness to withstand contractions and expansions during melting and resolidification of the silicon thin film during the sequential lateral solidification process.
- the method also includes generating a sequence of excimer laser pulses; controUably modulating each excimer laser pulse in the sequence to a predetermined fluence; homogenizing each modulated laser pulse in the sequence in a predetermined plane; masking portions of each homogenized fluence controlled laser pulse in the sequence to generate a sequence of fluence controlled pulses of patterned beamlets, irradiating the amorphous silicon thin film sample with the sequence of fluence controlled patterned beamlets to effect melting of portions thereof; controUably sequentially translating the sample relative to each of said fluence controlled pulse of patterned beamlets to thereby process the amorphous silicon thin film sample into a single or polycrystallme silicon thin film having a reduced surface roughness; and removing said cap layer from the processed single or polycrystallme silicon thin film.
- FIG. 1 is a functional diagram of a system for performing the sequential lateral solidification process preferred to implement a preferred process of the present invention
- Fig. 2 is a chart showing the surface profile of a typical film which has been processed by the sequential lateral solidification system of Fig. 1;
- Fig. 3 is a functional diagram of a preferred system for planarizing the surface of a polycrystallme or single crystal thin film semiconductor produced during a sequential lateral solidification process in accordance with the present invention;
- Figs. 4a and 4b are illustrative diagrams of a crystallized silicon film to be processed by the system of Fig. 3 using a narrow beam;
- Fig. 5 is an illustrative diagram of a crystallized silicon film to be processed by the system of Fig. 3 using a wide beam;
- Figs. 6-7 are charts showing the surface profile of a typical film before and after processing by the system of Fig. 3;
- Fig. 8 is an illustrative diagram of a cross section of a crystallized silicon film processed by the system of Fig. 1 in accordance with a second embodiment of the present invention
- Fig. 9 is a chart showing the surface profile of a typical film which has been processed in accordance with the second embodiment of the present invention.
- Fig. 10 is a flow diagram illustrating the steps implemented in the system of Fig.3 in accordance with the first embodiment of the present invention.
- Fig. 11 is a flow diagram illustrating steps implemented in the system of Fig. 1 in accordance with the second embodiment of the present invention.
- the present invention provides techniques for planarizing the surfaces of polycrystallme and single crystal thin film semiconductors.
- the surface planarization techniques are applied as a post processing step to polycrystallme and single crystal thin film semiconductors that are produced during a sequential lateral solidification process, or as a processing step during the production of polycrystallme and single crystal thin film semiconductors in a sequential lateral solidification process. Accordingly, in order to fully understand those techniques, the sequential lateral solidification process must first be appreciated.
- the sequential lateral solidification process is a technique for producing large grained silicon structures through small-scale unidirectional translation of a silicon sample in between sequential pulses emitted by an excimer laser. As each pulse is absorbed by the sample, a small area of the sample is caused to melt completely and resolidify laterally into a crystal region produced by the preceding pulses of a pulse set.
- our co-pending patent application describes as a preferred embodiment a system including excimer laser 110, energy density modulator 120 to rapidly change the energy density of laser beam 111, beam attenuation and shutter 130, optics 140, 141, 142 and 143, beam homogenizer 144, lens system 145, 146, 148, masking system 150, lens system 161 , 162, 163, incident laser pulse 164, thin silicon film sample 170, sample translation stage 180, granite block 190, support system 191, 192, 193, 194, 195, 196, and managing computer 100
- X and Y direction translation of the silicon sample 170 may be effected by either movement of a mask 710 within masking system 150 or by movement of the sample translation stage 180 under the direction of computer 100.
- an amorphous silicon thin film sample is processed into a single or polycrystallme silicon thin film by generating a plurality of excimer laser pulses of a predetermined fluence, controUably modulating the fluence of the excimer laser pulses, homogenizing the modulated laser pulses in a predetermined plane, masking portions of the homogenized modulated laser pulses into patterned beamlets, irradiating an amorphous silicon thin film sample with the patterned beamlets to effect melting of portions thereof corresponding to the beamlets, and controUably translating the sample with respect to the patterned beamlets and with respect to the controlled modulation to thereby process the amorphous silicon thin film sample into a single or polycrystallme silicon thin film by sequential translation of the sample relative to the patterned beamlets and irradiation of the sample by patterned beamlets of varying fluence at corresponding sequential locations thereon.
- a 200 nm thick crystal will exhibit variations in height throughout the length of the crystal.
- a height of 0 indicates the optimal height in a 200 nm thick crystal, and heights varying from 175 to 225 nm are shown to be common throughout the length of the crystal.
- the large bump 210 near the crystal boundary, where crystal thickness exceeds the optimal 200 nm thickness by 350 nm.
- Fig. 3 illustrates a post processing system embodiment for planarizing polycrystallme and single crystal thin film semiconductors produced by the sequential lateral solidification process.
- the system includes an excimer laser 310, beam attenuator and shutter 320, reflecting plate 330, telescoping lenses 331, 332, reflecting plate 333, beam homogenizer 340, condensing lens 345, reflecting plate 347, field lense 350, sample 360, sample translation stage 370, optical table 380, and managing computer 300.
- a preferred laser 310, attenuator 320, telescoping lenses 332, 332, homogenizer 340, and sample translation stage 370 that is movable in two orthogonal directions are each described in the co-pending patent application serial number 09/390,537.
- the table 380 may be as described in that patent document, or may be an ordinary table. It is preferable that the homogenized beam
- the sample 360 is shown in greater detail. Since the sample in this embodiment has already been processed, it already includes a large number of single crystal regions, shown illustratively as chevron shaped crystals 365.
- the homogenized beam 346 is shown incident upon a portion 361 of sample 360 to induce partial melting thereof.
- the full melt threshold is approximately 600 mJ/cm2.
- a beam 346 having an energy that is approximately 25% to 75% of the full melt threshold should be utilized. If the beam is more energetic, energy fluctuations inherent in excimer lasers create the possibility of causing a full melt of the sample region 361. If the beam is less energetic, the sample portion 361 will not melt sufficiently to satisfactorily planarize.
- the sample 360 includes a silicon oxide base layer
- the outer surface of silicon layer 410 is caused to melt to a depth 420.
- the rough surface 430 is reformed in a more planarized manner.
- the sample stage 370 is translated, under the control of computer 300, from right to left to cause the homogenized beam 346 to scan the sample 360 from left to right 450 on the top of sample 360.
- the stage 370 is then moved in an orthogonal direction (shown as the Y direction) to realign the sample at a new position 460, and translation in the opposite direction is began 470. This processes is repeated until the entire surface of sample 360 has been scanned by the homogenized beam 346.
- the sample stage When the sample stage is translated in the Y direction, it may be advantageous to align the homogenized beam to slightly overlap a previously scanned region of the sample 360.
- the region 361 is 1.2 x 1.2 cm
- Y direction translation of 1.15 cm may be utilized to avoid edge effects caused by irregularities in the homogenized beam.
- a wide homogenized beam 500 which is sufficiently wide to eliminated the need for X direction translation may be utilized, with the benefit of necessitating less movement by the translation stage 360, and adoringly, greater throughput.
- a beam that is shaped with a Gaussian profile in the X direction could be utilized if greater overlaps between X translations are performed.
- Fig. 6a The profile of a sample 360 fabricated in accordance with the sequential lateral solidification process is shown in Fig. 6a.
- the sample exhibits surface irregularities of +/- 25 nm from the optimal 200 nm height.
- Fig. 6b after post processing with a single laser pulse in accordance with the present invention, those surface irregularities are markedly reduced.
- Fig. 7 where it is shown >100% decrease in surface roughness caused by post processing in accordance with the invention herein.
- Fig. 8 shows a thin silicon sample formed of an approximately 50-200 nm thick amorphous silicon layer 810 deposited on a silicon oxide base layer 820. The sample is capped with a thick second silicon oxide layer
- the cap layer must be sufficiently thick to withstand the contractions and expansions during melting and resolidification of the silicon layer during the sequential lateral solidification process.
- the sample with cap layer 830 are then used in place of sample 170 in the lateral solidification process, a complete description of which is contained in the above mentioned patent application serial number 09/390,537.
- the cap layer 830 is removed from the sample by traditional wet or dry etching techniques.
- Fig. 9 the results of the process described with reference to Fig. 8 is illustrated.
- Fig. 10 the steps executed by computer 300 to control both the sequential lateral solidification process of Fig. 1 and the surface planarization process implemented with respect to Fig. 3 will be described.
- the various electronics of the system are initialized 1000 by the computer 300 to initiate the process. A sample is then loaded onto the sample translation stage 1005.
- the sample is processed in accordance with the sequential lateral solidification process using the apparatus of Fig. 1 1010.
- the processed sample is positioned for planarization 1015.
- the various optical components of the system are focused 1020 if necessary.
- the laser is then stabilized 1025 to a desired energy level and reputation rate, as needed to partially melt the sample in accordance with the teachings of the present invention. If necessary, the attenuation of the laser pulses is finely adjusted 1030.
- translation of the sample is commenced 1035 at a predetermined speed and in a predetermined direction, in accordance with the previously sequential lateral solidification processed regions of the sample.
- the shutter is opened 1040 to expose the sample to irradiation and accordingly, to commence the planarization process.
- FIG. 10 is a flow diagram illustrating the basic steps implemented in the system of Fig. 1 using a capped sample as illustrated in Fig. 8.
- An oxide layer is deposited on a base 1100.
- a silicon layer is then deposited on the oxide buffer layer 1110, and a cap oxide is deposited at the top layer of the sample 1120.
- the sample is processed in accordance with the sequential lateral solidification process using the apparatus of Fig. 1 1030.
- the cap oxide is removed, e.g., by a dilute hydrofluoric acid solution.
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
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Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2000/007479 WO2001071791A1 (en) | 2000-03-21 | 2000-03-21 | Surface planarization of thin silicon films during and after processing by the sequential lateral solidification method |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1196947A1 EP1196947A1 (de) | 2002-04-17 |
EP1196947A4 true EP1196947A4 (de) | 2003-08-13 |
Family
ID=21741175
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP00919501A Withdrawn EP1196947A4 (de) | 2000-03-21 | 2000-03-21 | Oberflächenpassivierung von dünnen silizium-filmen während und nach verarbeitungsschritten bei der sequentiellen lateralen kristallisation |
Country Status (10)
Country | Link |
---|---|
EP (1) | EP1196947A4 (de) |
JP (1) | JP4220156B2 (de) |
KR (1) | KR100672909B1 (de) |
CN (1) | CN1186802C (de) |
AU (1) | AU2000240180A1 (de) |
CA (1) | CA2374498A1 (de) |
HK (1) | HK1046469A1 (de) |
MX (1) | MXPA01011852A (de) |
TW (1) | TW499717B (de) |
WO (1) | WO2001071791A1 (de) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6555449B1 (en) | 1996-05-28 | 2003-04-29 | Trustees Of Columbia University In The City Of New York | Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidfication |
KR100333275B1 (ko) * | 1999-05-20 | 2002-04-24 | 구본준, 론 위라하디락사 | 액정표시장치의 tft 및 그 제조방법 |
US7156916B2 (en) | 2002-04-23 | 2007-01-02 | Sharp Laboratories Of America, Inc. | Monolithic integrated crystal-structure-processed mechanical, and combined mechanical and electrical devices, and methods and systems for making |
US7135070B2 (en) | 2002-04-23 | 2006-11-14 | Sharp Laboratories Of America, Inc. | Monolithic stacked/layered crystal-structure-processed mechanical, and combined mechanical and electrical, devices and methods and systems for making |
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Also Published As
Publication number | Publication date |
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TW499717B (en) | 2002-08-21 |
AU2000240180A1 (en) | 2001-10-03 |
MXPA01011852A (es) | 2002-05-06 |
CA2374498A1 (en) | 2001-09-27 |
KR20020002466A (ko) | 2002-01-09 |
CN1363117A (zh) | 2002-08-07 |
CN1186802C (zh) | 2005-01-26 |
HK1046469A1 (zh) | 2003-01-10 |
WO2001071791A1 (en) | 2001-09-27 |
JP2003528463A (ja) | 2003-09-24 |
EP1196947A1 (de) | 2002-04-17 |
KR100672909B1 (ko) | 2007-01-22 |
JP4220156B2 (ja) | 2009-02-04 |
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