EP1016106A1 - Ceramic multilayer printed circuit boards with embedded passive components - Google Patents

Ceramic multilayer printed circuit boards with embedded passive components

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Publication number
EP1016106A1
EP1016106A1 EP19980910019 EP98910019A EP1016106A1 EP 1016106 A1 EP1016106 A1 EP 1016106A1 EP 19980910019 EP19980910019 EP 19980910019 EP 98910019 A EP98910019 A EP 98910019A EP 1016106 A1 EP1016106 A1 EP 1016106A1
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EP
Grant status
Application
Patent type
Prior art keywords
green tape
layers
layer
glass
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19980910019
Other languages
German (de)
French (fr)
Other versions
EP1016106A4 (en )
Inventor
Michael James Liberatore
Ponnusamy Palanisamy
Ashok Narayan Prabhu
Attiganal Narayanaswamy Sreeram
Ellen Schwartz Tormey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Lamina Ceramics Inc
Original Assignee
Sharp Corp
Sarnoff Corp
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Filing date
Publication date

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES, OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C8/00Enamels; Glazes; Fusion seal compositions being frit compositions having non-frit additions
    • C03C8/14Glass frit mixtures having non-frit additions, e.g. opacifiers, colorants, mill-additions
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES, OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C8/00Enamels; Glazes; Fusion seal compositions being frit compositions having non-frit additions
    • C03C8/22Enamels; Glazes; Fusion seal compositions being frit compositions having non-frit additions containing two or more distinct frits having different compositions
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C13/00Resistors not provided for elsewhere
    • H01C13/02Structural combinations of resistors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/30Apparatus or processes specially adapted for manufacturing resistors adapted for baking
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/003Thick film resistors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01012Magnesium [Mg]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01077Iridium [Ir]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the metallic pattern or other conductive pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties

Abstract

Passive components such as capacitors, resistors, and RF filters can be made by screen printing suitable inks onto green tapes, completed with conductive layers (14, 15) below and above the component ink layers. The resultant green tape stack is then fired to form embedded capacitors. By laminating the green tape stack onto metal support board substrate, shrinkage in the x and y dimensions is limited and the components can maintain close tolerances. When many green tape layers are to be stacked, improved shrinkage is obtained when green tapes having a moderate amount of oxide fillers, e.g., less than about 15 % by weight of the green tape composition, are interleaved with green tape having higher amounts, e.g., above 25 % by weight, of oxide fillers.

Description

CERAMIC MULTILAYER PRINTED CIRCUIT BOARDS WITH EMBEDDED PASSIVE COMPONENTS

This invention relates to multilayer, ceramic, supported printed circuit boards that have low shrinkage in two dimensions on firing. More particularly this invention relates to metal supported, multilayer, ceramic printed circuit boards that incorporate co-fired passive components.

BACKGROUND OF THE INVENTION

Ceramic compositions of crystallizing glasses are known which, when mixed with non-crystallizing glasses, form green tape compositions which can be adhered to metal core support substrates, such as copper/nickel clad or plated kovar plates. Kovar is a Fe/Co/Ni alloy commercially available from Carpenter Technology. One such alloy includes 53.8 weight percent of iron, 29 weight percent of nickel, 17 weight percent of cobalt and 0.2 weight percent of manganese. These alloys display a sharp change in their coefficient of expansion at certain temperatures. They are available with a 1 mil thick coating of copper and a 1 mil thick coating of nickel on both sides of the kovar core. They have a thermal coefficient of expansion (TCE) of 5.8 ppm/°C (RT to 300°C) and a thermal conductivity (z or thickness direction) of 21.8 Watt/m°K.

To use these kovar plates as support substrates for printed circuit boards, they are heat treated in air to oxidize the nickel coating and then glazed with a bonding glass, generally a CaO-Al203-ZnO-B203 glass. The bonding glasses can be screen printed onto the support substrate by making a printable ink of the bonding glass powder mixed with an organic binder and a solvent. The bonding glass is generally applied to a thickness of 40-70 microns on the support substrate. The bonding glass is then dried and densified by heating at 700-800°C. To improve the adhesion of the bonding glass to a kovar support, about 6% by weight of copper powder can be added to the bonding glass. These kovar support substrates prepared as above are used herein and, when co-laminated to low firing temperature green tape compositions, they prevent shrinkage of the ceramic layers in the x and y dimensions during firing.

Low firing temperature green tapes adhered to a metal core support board having a bonding glass thereon as dexcribed above are made from a mixture of crystallizing and non-crystallizing glasses. Suitable crystallizing glasses for example contain 20-

55% by weight of ZnO; 20-28% by weight of MgO; 10-35% by weight of B203; and 10-40% by weight of Si02. These glasses have a TCE matched to kovar, and they have low dielectric loss properties; however, they have a low crystallization temperature which inhibits densification of the glass on firing. Thus these glasses can be mixed with a lead-based, non-crystallizing glass. Suitably, these non-crystallizing glasses contain from 30-80% by weight of PbO; 15-50% by weight of Si02; up to 10% by weight of Al203; up to 15% by weight of B203; and up to 10% by weight of ZnO.

However, when the crystallizing glasses are mixed with lead-based, non-crystallizing glasses, the TCE is lowered and the dielectric loss properties are increased. The lateral shrinkage (x and y) is still higher than desirable as well. The addition of minor amounts of oxide fillers, such as quartz, alumina, forsterite and the like, reduces the lateral shrinkage on firing, and thus these filler- modified ceramics have desirable dielectric properties, low shrinkage during firing and a TCE matched to kovar.

Green tape compositions useful herein are formed by mixing suitable glass powders, including crystallizing glasses, generally of the ZnO-MgO-B203-Si02 type, with non- crystallizing glasses and oxide fillers with an organic vehicle, generally including resin, solvent, dispersants and the like, and casting the resultant slurry into a thin tape, known as green tape .

Conductive inks can be screen printed onto the green tapes to form circuit patterns. Several of the green tapes can be aligned and stacked and laminated under pressure. Via holes punched in the green tapes and filled with conductive inks, e.g., mixtures of a conductive metal powder, an organic vehicle and a glass, generally the same glass as that used to make the green tape, provide a conductive path between the circuit patterns on different green tape layers. These laminated green tape stacks are then aligned with a support substrate coated with a bonding glass, and co- laminated, also under pressure. Since shrinkage occurs mainly in the thickness (z) dimension during firing, the circuitry is not disturbed during firing and close tolerances can be maintained. These ceramics are compatible with low melt temperature conductive inks, such as silver- based inks, used to form the electrically connected circuits on the various layers and to form bond pads and the like. Thus the ceramic circuit boards as described hereinabove have low dielectric loss properties and are useful for use with microwave/digital packaging.

Up to the present time, when multilayer ceramic circuit boards are to include passive components, such as resistors or capacitors, discrete components have been mounted to the top of the fired boards, using solder or epoxy type adhesives, to adhere the components to the multilayer ceramic. The addition of these components increases the number of steps needed to make these circuit boards, i.e., the components must be aligned and adhered to the ceramic multilayer board, and connected to a source of power. Further, in order to accommodate a number of discrete devices, the multilayer boards have to be large. Thus the costs of making such boards is high.

It would be advantageous to be able to screen print passive components onto particular green tapes of multilayer, low temperature co-fired ceramic circuit boards because the packing density can be increased, reducing the size and cost of the packaging, and the number of processing steps required can be reduced. Using the recently developed low firing temperature glasses and a metal support board that reduce shrinkage in the x and y dimensions, screen printing of such components to tight tolerances, and high precision placement, become feasible. Further, because fewer interconnects need to be made, reliability would also be improved.

However, it is difficult to maintain reduced shrinkage during firing and to prevent de-lamination of the green tape stacks from the support substrate when a plurality of green tapes are aligned and fired with components therebetween.

SUMMARY OF THE INVENTION We have found that passive components, such as capacitors, resistors and RF components, can be embedded in green tape stacks made of suitable glasses on a support substrate that prevents shrinkage in the x and y dimensions. Suitable capacitor or resistor inks and conductive layers can be screen printed onto green tapes, embedded between other green tapes, laminated and fired at fairly low temperatures, i.e., 850-900°C, without de-laminating from the support and without shrinkage in the x and y dimensions so as to produce printed circuit boards with close tolerances that have embedded components therein.

Capacitor inks can be made from barium titanate, titanium oxide and lead magnesium niobate dielectrics, which, when combined with appropriate glasses, sinter at low temperatures. The capacitor inks can be screen printed onto ceramic green tapes and connected to a silver conductor layer 'by means of vias in the green tape that are filled with appropriate conductive inks. After printing the passive component precursor inks and other circuitry on the green tapes, multiple green tapes are aligned, laminated together and co-fired in air at a temperature of about 850-900°C. Capacitors can be made in a wide range of dielectric constants .

Shunt capacitors can also be made by using a ground plane metal as the bottom capacitor plate. The capacitors are located one or more layers from the top of the stack. Capacitors can be terminated by screen printing a conductive layer over and under the printed capacitor dielectric ink.

Thick film resistor inks can be made based on ruthenium oxide (Ru02) and appropriate glasses that sinter at low temperatures, together with suitable organic vehicles. The resistor inks are screen printed onto green tapes that are aligned and stacked on a support, and fired to produce embedded resistors having a wide range of resistor values and thermal coefficient of resistance (TCR) values. To adjust the TCR values, a small amount of barium titanate can be added. The resistors are connected to a source of power with a conductive layer screen printed on top of the green tape stack. After printing the resistors and other circuitry, the multiple green tape layers are aligned, laminated together, applied to a metal support substrate via a bonding glass, and co-fired in air at temperatures of from about 780-900°C to form printed circuit boards having embedded resistors therein that are stable and reliable.

When many green tape layers are to be stacked to produce a fired stack about 2 mm in thickness or higher, we have found that de-lamination and shrinkage problems still occur. Thus we have further found that by interleaving green tape layers including low dielectric loss glasses that are mixed with minor amounts of oxide fillers with green tape layers from the same glasses but now including greater amounts of oxide fillers, many more layers of green tapes can be stacked, laminated and fired with no shrinkage in the x and y directions, and with no de-lamination from a metal support substrate. These thick multilayer metal supported circuit board stacks are particularly useful when RF components are to be embedded in the stacks.

BRIEF DESCRIPTION OF THE DRAWING Fig. 1 is a graph of dielectric constant versus capacitor size for low dielectric constant inks.

Fig. 2 is a cross sectional view of one embodiment of a buried capacitor of the invention.

Fig. 3 is a graph of dielectric constant versus capacitor size for capacitors of the invention. Fig. 4 is a graph of temperature coefficient of capacitance versus capacitor size for capacitors of the invention.

Fig. 5 is a graph of dielectric constant versus capacitor size for capacitors of the invention. Fig. 6 is a graph of resistor area versus resistance and TCR for resistors having a first size.

Fig. 7 is a graph of resistor area versus resistance and TCR for resistors having a second size.

Fig. 8 is a cross sectional view of a multilayer ceramic circuit board of the invention having buried silver layers.

Fig. 9 is a cross sectional view of a multilayer ceramic circuit board of the invention having RF filters embedded in the layers.

DETAILED DESCRIPTION OF THE INVENTION The formulation of various capacitor inks, methods of formation and test results of embedded capacitors having differing dielectric constant and TCC will be discussed first .

We have discovered low dielectric constant, i.e., K = about 50, capacitor inks based on barium titanate and titanium oxide powders. These powders sinter at high temperatures, about 1100-1300°C, and thus they must be modified by combining them with low melting glasses so that the barium titanate/glass or titanium oxide/glass compositions will sinter at lower temperatures of about 850- 900°C, and to adjust the dielectric constant (K) and to minimize the temperature coefficient of capacitance (TCC) . Barium titanate is commercially available from the Degussa Company under the trade name AD302L, (designated below as D) and a mixture of barium titanate and barium tin oxide from the Ferro Corporation under the trade name YL12000 (designated below as F) . The properties of these powders are set forth below in Table I, wherein K is the dielectric constant, the dielectric loss is Tanδ and the temperature is in degrees Centigrade. Particle size is given as average particle size in microns (μm) . TABLE I

CompoFirinq Av . Part . sition K Tanδ TCC,% T,°C Size, μm

F 12000 0.022 -80* 1200 1.0

D 3200 <0.02 _ 9** 1140 0.6

* RT to 125°C

* *** 885E°C

A suitable titanium oxide, #4162-01, is available from

Mallincrodt Baker Co.

Prior to making capacitor ink compositions, the barium titanate or titanium oxide powder was mixed with various low firing temperature glasses. The compositions of suitable glasses, in weight percent, is given below in Table II.

TABLE II

Oxide Glass 1 Glass 2 Glass 3 Glass 4* Glass 5 Glass 6

A1203 6.00 10.10 1.0 1.82

BaO <2.0

B,03 39.00 19.60 >5.0 5.0 8.18

Bi203 23.0

CaO 5.0

CdO 36.0

MgO 24.50

PbO 50.00 >70.0 25.0 68.82

Si02 39.90 24.50 < 2.0 5.0 2.23

Ti02 9.09

ZnO 50.00 29.40 >12.0 5.0 9.09

Zr02 2.73

Partic e Il5-7 10-12 5.0 5.0 4.0

Size, . μm ls

* Commercially available glass as SCC-11 from Sem Com, Inc., Toledo, OH Representative low dielectric constant capacitor inks were made from barium titanate powder admixed with various glasses and glass mixtures, together with conventional dispersants, resin and solvent, and screen printed onto green tapes. The ink compositions are summarized in Table III below wherein the glass compositions are as shown in Table II.

TABLE III

BaTiO, Wt % Glass# Wt % Dispersant Resin Solvent

Tvpe t % Wt% Wt %

F 62.29 1 7.14 1.43 4.07 23.07

F 66.09 1 8.25 1.52 4.84 19.38

F 64.89 2 9.8 1.49 4.76 19.05

D 65.62 1 13.52 1.57 4.83 14.48

D 59.99 1 3.08 1.44 4.45 21.04

D 62.27 2 12.15 1.54 4.41 17.83

D 60.86 2 15.34 1.52 4.46 17.82

D 60.10 3 14.84 1.50 4.71 18.85

D 57.05 2 15.35 1.54 4.46 17.84

SrZr03 3.76

D 59.15 2 15.38 1.54 4.47 17.89

SrTi03 1.57

D 58.88 2 15.33 1.53 4.48 17.85

SrZr03 1.94

D 62.25 2 14.04 1.56 4.43 17.73

D 63.61 2 12.79 1.53 4.41 17.66

The capacitor inks can be screen printed onto green tapes formulated for co-firing onto metal, particularly kovar, support substrates. The primary crystallizing glass used is made from a mixture of the following oxides: 29.4% of ZnO, 24.5% of MgO, 19.6% of B203, 24.5% of Si02 and 2.0% of Co304, all % by weight. Typical green tape compositions are given below in Table IV. TABLE IV

Additive Function Amount , wt% Amount , wt% Green tape 1 Green tape 2

Glass Primary 57.34 57.29

Crystallizing

Glass

Glass P121 Secondary 6.98 7.03

Crystallizing

Glass

Forsterite2 Ceramic 7.27 4.42 Powder Filler

Cordierite3 Ceramic 1.09 3.44 Powder Filler

Hypermer PS24 Dispersant 0.58 0.58

Butvar B98s Binder 2.04 2.04

Santicizer Plasticizer 1.36 1.36 1606

Methyl ethyl Solvent 11.67 11.67 Ketone

Anhydrous Solvent 11.67 11.67 Ethanol

1 Glass composition (wt% ) 10 . 0 % Al203 , 42 . 0 % PbO , 38 . 0 % Si02 ,

10 . 0% ZnO

2 3-5μm median particle size

3 2-3μm median particle size

4 Registered trademark of ICI Americas, Inc.

5 Registered trademark of Monsanto Co.

6 Registered trademark of Monsanto Co.

The capacitor inks were screen printed onto the above green tapes in square capacitor patterns 1.27, 2.54 and 5.08 mm in size. Three four-layer green tapes were made with the capacitor ink layer one layer from the top of the stack. The green tapes were laminated at 278 psi and co-laminated to a kovar substrate at 347 psi. A silver-based powder or silver flake-based conductor ink was buried to make a buried co- fired capacitor. Suitable conductor ink compositions are set forth in Table V.

TABLE V

Component Ink 1 Ink 2 Ink 3 Ink 4

Silver Powders- 83.78 20.11

Silver-Palladium

Powder1 84.93

Silver Flake1 80.97 60.30

Glass 3 0.65

Dispersant 1.22 1.32 0.53 1.21

Resin2 0.88 0.86 0.46 0.46

Resin3 1.85 1.84

Resin4 0.80 0.79

Texanol Solvent 3.22 3.25

Terpineol Solvent 6.81 6.73 6.48 6.44

Butyl Carbitol 2.54 2.12 9.71 9.66

1 Available from Degussa Corporation, So. Plainfield, NJ Ethyl Cellulose Resin N300 of Aqualon Corporation

3 Ethyl cellulose Resin N14

4 Elvacite 2045

The resultant laminated stack was fired at 850°C. The capacitance and dielectric loss (tanδ) were measured at lOKHz. The dielectric constant for each capacitor was calculated from the measurement of capacitance (C) in pF, the area (A) of the capacitor in square centimeters and the thickness (t) in centimeters in accordance with the equation

K = Ct A£„ wherein εo is a constant = 0.0885pF/cm. These capacitor inks were suitable for operation at high frequency (1GHz) . The capacitor sizes and property measurements are given below in Table VI, wherein the thickness is for the fired capacitor, capacitance is measured as pF/mm2, dielectric loss is given as tanδ, K is the dielectric constant, and TCC is given in ppm/°C from room temperature (RT) to 125°C. In Table VI, the glass is given in volume % except as otherwise noted.

TABLE VI

Capacitor Size , mm Thick, pF/mm2 Tanδ K TCC Composition um

F + 13.4% 1.27 32 23.0 0.010 83 -115 Glass 1 5.08 32 18.9 0.011 68 515

F + 15% 1.27 32 22.1 0.007 80 582 Glass 1 5.08 10.6 0.012 74.5 689

F + 15% 1.27 30 10.5 0.007 36 878 Glass 2 5.07 9.3 0.008 31.4

D + 25% 1.27 32 16.1 0.002 59 Glass 1 5.08 14.9 0.002 56

D + 26% 1.27 32 13.5 0.003 48.5 -1136 Glass 1 5.08 10.7 0.001 38.4 37

D + 20% 1.27 33 30.4 0.007 114 -264 Glass 2

D + 25% 1.27 32 15.3 0.002 55 -560 Glass 2 5.08 12.7 0.004 46 -342

D + 30% 1.27 30 13.3 0.002 45 -918 Glass 3 5.08 9.8 0.002 33 34

D + 25% 1.27 29 40.5 0.009 131 61 Glass 2 + 5.08 38.6 0.008 125 360 6.6Wt% SrZr03

D + 25% 1.27 34 14.8 0.003 57 -756 Glass 2 + 5.08 10.9 0.003 42 193 2.7Wt% SrZr03

D + 25% 1.27 31 20.7 0.005 72.: 3 -119 glass 2 + 5.08 15.7 0.005 55 579 3.3Wt% SrZrO,

Additional low dielectric constant capacitor inks made of barium titanate were screen printed to form capacitors of various sizes, laminated at 1670 psi, terminated with a silver ink layer, co-laminated to kovar at 1740 psi, and fired at 865°C. Several screen printings were applied to produce a minimum thickness of the fired capacitor. The composition, size and fired properties are summarized below in Table VII, wherein the glass is given in volume %.

TABLE VII

Composition Thick Size pF/mm2 K Tanδ TCC μm mm

25% Glass 2 39 1.27 15.7 71 0.004 -127

2.54 13.0 56 0.004 201

5.08 12.6 55 0.004 348

25% Glass 2 + 32 1.27 22.7 84 0.007 70

3.3wT% SrZr03 2.54 20.0 71 0.006 313

5.08 20.5 74 0.006 453

23% Glass 2* 32 1.27 19.7 71 0.003 -118

2.54 16.2 58 0.003 185

5.08 15.2 55 0.003 296

21% Glass 2 35 1.27 25.0 99 0.004 -69

2.54 22.4 89 0.004 242

5.08 22.1 90 0.004 365

30% Glass 2 35 1.27 14.8 59 0.002 271

2.54 12.9 51 0.003 360

5.08 12.6 50 0.004 411

* IR was measured to be 1.4 x 1012 ohms.

It is apparent that there is a size dependence of capacitance per unit area and dielectric constant for buried capacitors and TCC values. In general, dielectric constant decreases with an increase in capacitor size, as shown in Fig. 1, whereas TCC shows more positive capacitance. The smaller the capacitor, the higher the capacitance, which may be due to fringing capacitance effects and to interaction between capacitors and the surrounding ceramic layers.

Designing high dielectric constant buried co-fired capacitors (K = 1500) however, is a much more difficult problem. Since the capacitor dielectric materials have a high sintering temperature, the low firing temperature used with the present green tapes results in a porous dielectric; the mixture of barium titanate with a low firing temperature glass dilutes the dielectric constant; the surrounding low dielectric constant glass-ceramics diffuse into the capacitor, resulting in further dilution effects; and the diffusion of silver metal into the capacitor also dilutes the dielectric constant . Thus the resultant buried capacitors based on barium titanate were limited to K values of no more than 700, as shown in Tables VIII and IX. Table VIII summarizes capacitor properties for buried

BaTi03 -based capacitor inks using a silver powder conductor layer. Green tape and capacitor layers were laminated at 280 psi and fired at 850°C. The glass is given in volume %.

TABLE VIII Composition Thick, m Size, mm pF/mm2 K Tanδ TCC

7.5 vol% 29 1.27 123.4 404 0. .005

Glass 4* 2.54 120.22 394 0. .007

5.08 107.5 352

Same 29 1.27 221.3 725 0. .008 259

2.54 193.6 634 0, .007 313

5.08 187.9 615 0, .007 305 The above capacitors were made with a capacitor dielectric ink applied above and below the conductor pads as a barrier.

7.5 vol% 29 1. ,27 167.4 549 0. .008 335 Glass 4** 2. .54 151.3 496 0. .008 423

5. .08 154.1 505 0. .008 433

7.5 vol% 26 1, .27 150.0 441 0, .014

PbTi03/ 5. .08 131.2 385 0, .013

Bi203

8 8..88 vvooll%% 32 1 .27 158.7 574 0 .009 625 Glass 5** 5 .08 160.0 586 0 .010 550

* using the silver powder as the conductor

** using silver-palladium powder as the conductor The following capacitors were made, as summarized in Table IX, by laminating green tape and capacitors at 1670 psi and firing at 865°C. The silver conductor used was silver flake. The glass is given as volume %.

TABLE IX Composition Thick, μm Size, mm pF/mm2 K Tanδ TCC 7.5% Glass 4* 27.4 1.27 215. .9 668 0.007 104

2.54 197, .9 612 0.007 56

5.08 214, .5 664 0.007 -173

8.8% Glass 5** 27.2 1.27 223, .2 686 0.010 166

2.54 220, .2 677 0.010 39

5.08 222, .4 600 0.010 -130 7 . 5% PbTi03/ 25 . 6 1.27 198 .7 575 0.010

Bi203 2.54 ' 186 .5 540 0.010

5.08 183 .6 531 0.009

* IR was 4 . 7xl 010 ohms * * IR was 5 . 1xl 010 ohms

The above capacitor compositions were tailored to promote sintering at low temperatures with a minimum dilution of the dielectric constant and to contain less than

10 volume percent of low melting oxides or glass additives made from PbO, B203, ZnO, CdO or PbTi03, materials that are soluble in the BaTi03 perovskite lattice structure. These represent fired compositions having a maximum dielectric constant of about 700.

When a low TCC is required, i.e., less than 60 ppm/°C at a temperature range of either between room temperature to -

25°C or room temperature to 85°C , a barium titanate-based capacitor formulation also includes a substantial amount of a TCC modifier, SrZr03.

Table X illustrates compositions of two such suitable capacitor inks, given in % by weight.

TABLE X Composition Ink 1 Ink 2

BaTi03 47.7 37.5

SrZr03 15.9 30.6

Glass 2 12.4 1.5

Glass 4 6.8

Hypermer PS2 1.5 1.5

Elvacite/solvent 22.5 22.1

A silver-based ink made from 83.78% silver powder,

0.65% glass 3 filler, 4.2% of a mixture of 15% ethylcellulose in a texanol solvent, 7.61% of 13% Elvacite resin in terpineol solvent, 1.22% of Hypermer PS2 and 2.54% of butyl carbitol solvent. The bottom electrode was screen printed as a single layer, the dielectric layer was screen printed in three layers, and the top electrode singly printed.

The green tape stacks were laminated at 1670 psi and co-laminated to a kovar substrate at 1100 psi and the whole fired at 865°C. The dielectric constant (K) and TCC at two temperatures are given below in Table XI .

TABLE XI TCC

Dielectric Size , mil RT to 85°C RT to -25°C K

1 200 -47.8 -430.4 77.8

100 12.0 -441.6 84.5

50 13.8 -356.7 97.0

2 200 -335.3 -73.5 75.6

100 -388.2 -28.6 77.6

50 -440.0 18.3 88.6

A capacitor ink having a low TCC and a low dielectric constant can also be made using titanium oxide (Ti02) as the dielectric. A dielectric ink was made using 42.1% of Ti02 powder, 29.6% of glass 2, 1.4% of Hypermer PS2 dispersant and 26.9% of a mixture of 20% of Elvacite resin in terpineol solvent .

The dielectric ink was applied to a green tape at least one layer below the top of the stack, and a termination layer applied thereunder using a conductor ink, and the stack laminated and fired as above. The TCC and dielectric constant K are given in Table XII below.

TABLE XII TCC

Size, mm RT to 85°C RT to -25°C K

1.27 68.6 32.4 25.7

2.54 14.6 55.4 18.5

55..0088 33..00 6699..88 15.7

In order to achieve higher dielectric constants for buried co-fired capacitors (K>1000) , we have found that lead-magnesium-niobate-based (PMN) compositions must be used. Suitable high dielectric constant capacitor ink compositions based on PMN are summarized below in Table

XIII, wherein % is by weight.

TABLE XIII

%PMN Additives % Dispersant Resin Solvent

75.02 Glass 4 5.33 1.65 3.33 13.32

BaTi03 1.35

76.88 Glass 4 3.97 1.61 3.31 13.32

BaTi03 1.01

74.16 PbTi03 6.01 1.65 3.28 13.11

PbO 1.60

MgO 0.20

74.93 Glass 5 5.49 1.65 3.32 13.27

BaTi02 1.35

74.93 Glass 6 5.12 1.65 3.32 13.27

PbTi03 1.72

74.70 Glass 5 5.48 1.64 3.29 13.15

PbTiO, 1.74

Using the above lead-magnesium-niobate-based capacitor inks and co-firing on alumina support substrates, produced K values of over 2000 with a silver powder conductor ink. However, when buried in green tape laminates on kovar support substrates, the K values were dramatically lowered to about 30-50 due to the dilution effects discussed above. In order to obtain high dielectric constant capacitors on kovar, a barrier layer can be used to block the diffusion of the ceramics into the capacitors during co-firing. This barrier layer can be of a more effective silver metal composition, or of a different dielectric material.

We have found that a BaTi03 based capacitor ink can be used as a barrier material when a very low melting glass, lower melting than the glass used in the green tape layers, is used. This barrier glass densifies and crystallizes at a lower temperature than that required for the green tape glasses to soften significantly. Thus the barrier glass blocks the diffusion of the green tape glasses into the capacitor. In such case the barrier is printed as a pad larger than the capacitor, both below the bottom conductor pad and above the top conductor pad, as shown in Fig. 2. In Fig. 2, a three layer capacitor 12 having a two layer top and bottom conductor layers 14 and 15 respectively is sandwiched between two top and bottom two-layer barrier layers 16 and 17 respectively. The buried capacitor is in turn laminated to top and bottom green tape layers 18 and 19 respectively .

Using a capacitor ink including Glass 6 and 71.07 percent of BaTi03, as described above, a barrier layer was printed as a pad 19x19mm, centered about a capacitor 5.08 x 5.08mm made from a PMN ink including 74.16% of PMN. Silver powder was used to make the conductor ink. Various layers were employed to determine how many barium titanate barrier layers were required to obtain a high dielectric constant capacitor on a kovar supported multilayer circuit board. Controls without the barrier layers were also tested. The test results are given below in Table XIV wherein the number of prints refers to the number of screen prints used for each layer. TABLE XIV

Dielec- trie

Function #Prints Thick pF/mm2 K Tanδ TCC IR

,um xlO10 ohms

Barrier 3 24

Conductor 1

Capacitor 3 55 181.3 1132 0.017

Control 1 58 5.1 34

Barrier 3 24-48

Conductor 2 10

Capacitor 3 36 751.6 3058 0.038 -19.6

Control 2 35 208.0 823 0.022 -9.5

Barrier 1 10

Conductor 2 11

Capacitor 3 46 91.6 493 0.009 -17.5 8, .3

Control 3 53 128.2 689 0.022 -8.5 6. .4

Barrier 2 32

Conductor 2 11

Capacitor 3 36 360.0 1463 0.033 -21.5 2, .3

Control 4 31 219.0 766 0.024 -4.2 3. .8 Thus when a minimum thickness barrier layer is present, the dielectric constant was much higher than when no barrier layer, or a thin barrier layer, was used. Buried capacitors having a high dielectric constant were achieved however using a double metallization print, and a double barrier layer print. By increasing the number of barrier prints to three on either side of the conductive layers, dielectric constant (K) values above 3000 were obtained. However, while high dielectric constant capacitors can be made via the above process, several extra printing steps are required, and the barrier thickness must be about 16-20 microns to be effective.

Further, due to the thickness of the several barrier layers, conductive layers and capacitor layers, the top green tape layer is subject to tearing and care must be taken to prevent that. Further, the large number of screen printing steps required (up to eleven as described above) adds to the costs of the process.

Thus a modified buried conductor ink was sought that would be a more effective barrier, one that would require fewer printing steps and have a reduced thickness that would not subject the top green tape layer to tearing.

We have further found that a mixture of silver flake and silver powder as the conductive layer makes very effective barrier layers, better than using either silver flake or silver powder alone. Silver powder inks produce low dielectric constant capacitors. Silver flake alone formed a very effective barrier layer (K=3600) but it resulted in tearing of the overlying green tape layer during lamination or firing. Thus a mixture of 75% by weight of silver flake and 25% by weight of silver powder, although not as effective a barrier as silver flake alone, resulted in high dielectric constant capacitors. However, outgassing of capacitors is a problem during firing. If the silver metal seals the capacitor too well, the gases formed from the additive (PbO containing) materials cannot escape. Thus the silver flake, while it results in a high dielectric constant capacitor, forms a structure that becomes too dense during firing, and leads to tears in the overlying green tapes. Thus the use of a mixture of silver powder and silver flake, although a compromise in terms of dielectric constant, does not tear the top green tape layer nor do these structures have outgassing or bubbling problems.

A plurality of buried PMN-based capacitors on kovar substrates were made using silver powder, silver flake and a mixed silver powder and silver flake conductor layer. The layers were laminated at 1670 psi and fired at 865°C. The test results are summarized below in Table XV.

TABLE XV

Silver #Prints/ Thick Size pF/mm2 K Tanδ TCC Type thick um mm powder 2/10-11 31 1.27 14. 6 51 0.001 -2.0 μm 2.54 27. 7 97 0.010

5.08 112. 6 394 0.018 -6.9 powder 2/l3μm 35 1.27 60. 9 246 0.009 11.4

2.54 230 908 0.021 -16.5

5.08 482. 5 1581 0.045 -27.6 flake 2/10μm 29 1.27 447 716 0.027 -21.7

2.54 716 2346 0.037 -27.6

5.08 1066 3601 0.040 -30.1 flake l/5μm 21 1.27 383 928 0.018 -30.8

2.54 841 1967 0.027 -38.1

5.08 1050 2498 0.026 -41.9 mixed l/6μm 29 1.27 228 748 0.023 -30.8

2.54 477 1564 0.033 -39.8

5.08 706 2313 0.045 -44.7 mixed 2bott/6.5 29 1.27 624 2043 0.025 -42.7 1 top/3.2 2.54 931 3052 0.037 -49.1 μm 5.08 1005 3295 0.048 -51.8

Insulation Resistance (IR) of the first capacitor of 5.08mm size was 3.8xl010 ohms. IR of the second capacitor of 5.08mm size using silver flake was 6.0xl010 ohms. The IR of the first capacitor using the mixed silver and the same size was l.OxlO10 ohms.

The above buried capacitors made with the mixture of silver flake and silver powder as the conductor layer, required fewer printing steps and fired without any problems with bubbling or outgassing. No tearing of the overlying green tape layer was noted.

The dielectric constant of the PMN capacitors exhibit a large size dependence; i.e., the dielectric constant increases with increasing capacitor size, and TCC also increases (becomes more negative) with increasing capacitor size. It is believed this is a result of dilution of the capacitor dielectric by the surrounding low dielectric constant ceramic. Large capacitors have less dilution effect than small capacitors. This is shown in Table XVI below, and schematically in Figs 3 and 4, graphs of dielectric constant and TCC versus capacitor size, respectively. In Table XV the capacitors are based on PMN with mixed silver powder-silver flake inks.

TABLE XVI

Capacitor Fired Size pF/mm2 K Tanδ TCC IR

Compositn Thk , um mm % xlO10

10% glass 4 22.4 1.27 205 518 0.015 -45, .5

+ B BaaTTii0O3, 2 2..5544 449966 11225599 00..001188 --5555,. .66

5.08 728 1844 0.019 -59 .7 1.9 7 7..55%% ggllaassss 44 3 311 1 1., .2277 7 7111166 4 40000 0.011 -38.4

+ BaTi03 2, .54 334 1154 0.017 -50.3

5, .08 607 2098 0.022 -57.3

10% glass 5 24 1 .27 173 456 0.007 -37.6 + + BBaaTTiiO0,3 2 2. .5544 5 50088 1 1336677 0.008 -47.3

5. .08 821 2209 0.009 -52.9 1.5

10% glass 6 30 1.27 227 484 0.014 -24.2

+ BaTi03 2 . 54 253 870 0 . 016 - 33 . 6 5.08 372 1279 0.018 -38.4

10% glass 6 25 1.27 68 196 0.011 -18.1 + PbTi03 2.54 216 620 0.016 -24.8

5.08 329 944 0.019 -27.1

Intermediate range (K=500-700) barium titanate-based buried capacitors fabricated with the same mixed silver flake/powder conductor layers which were also laminated at

1670 psi and fired at 865°C are not as size dependent. Fig. 5, which is a graph of dielectric constant versus capacitor size using a mixed silver conductor, illustrates the differences in the size dependence of barium titanate- based capacitors and PMN-based capacitors. Thus, for applications requiring intermediate dielectric constant values, barium titanate-based buried capacitors will be more consistent and have lower TCC as compared to PMN-based capacitors .

The buried capacitors of the invention, buried one or two tape layers below the top of the stack, have been subject to the HHBT reliability test (85°C/85%RH/50VDC) for over 1000 hours with no degradation of the capacitance, dielectric loss or insulation resistance (IR) of the buried capacitors. The above co-fired multilayer ceramic circuit boards having buried capacitors of the invention are useful in various applications, such as cellular telephones.

The formulation of various resistor inks, method of formation of embedded resistors and test results will be discussed below.

Resistor inks with resistor values of from 300 ohm/sq to 100 Kohms/sq and a TCR of <+200 ppm/°C over a temperature range of room temperature to 125°C, also can be made in accordance with the invention. The target properties for a particular cellular telephone application are 1 Kohm/sq and a TCR less than or equal to 200 ppm/°C over the room temperature to 125°C range.

The resistor inks are made from a fine particle size, high surface area Ru02 powder having the characteristics as summarized in Table XVII.

TABLE XVII

Property Specification

Particle size, microns 0.15 - 0.45 Surface Area (m2/g) 15 - 25 Purity - Wt% Ru 73-76

The Ru02 is mixed with one or more glasses to reduce the firing temperature of the conductor powder. Glasses 1 and 3 as set forth above are suitable. A TCR modifier such as BaTi03 can also be added. The above glasses are mixed with the Ru02 powder, optional modifier and a suitable organic vehicle to form a screen printable composition that can be fired at low temperatures, similar to the firing temperature of the green tape stacks they will be applied to. The resistor ink powder generally contains 17.33 to 24.8% by weight of Ru02, 74.3- 81.7% by weight of glass 1 and 0.99 to 1.10% by weight of barium titanate. The preferred compositions contain 19.8 to 23.14% by weight of Ru02, 75.87 to 79.21% by weight of glass 1 and 0.99 to 1.1% by weight of BaTi02.

Resistor inks were screen printed onto a green tape incorporated into a laminated green tape stack in various patterns (1/2 squares and squares) in sizes from 0.508 x 0.508 to 2.032 x 4.064 mm. Green tape compositions suitable for use herein include the following ingredients, summarized in Table XVIII. The median particle size of the glass and filler materials are given in microns.

TABLE XVIII

Material Function Com . 1 Comp . 2 Glass 2 Crystallizing 57.34 57.29 glass

P12 glass* Non-crystall- 6.98 7.03 izing glass

Forsteπte Ceramic filler 7.27 4.42

Cordierite Ceramic filler 1.09 3.44

Hypermer P321 Dispersant 0.58 0.58

Butvar B982 Binder 2.04 2.04

Santicizer 1603 Plasticizer 1.36 1.36

Methyl ethyl ketone Solvent 11.67 11.67

Anhydrous ethanol Solvent 11.67 11.67

1) Registered Trademark if ICI America Inc

2) Registered Trademark of Monsanto Co.

3) Registered Trademark of Monsanto Co.

The resistors were terminated with a silver conductor ink which was also screen printed. A suitable silver ink composition includes 83.78% by weight of silver powder, 0.65 weight % of glass 3, 1.22 weight% of a dispersant, 0.88 weight % of ethyl cellulose resin, 0.80 of Elvacite 2045 resin (available from Monsanto Company) , and a mixed solvent of 3.32 weight % of texanol, 6.81 weight % of terpineol and 2.54 weight % of butyl carbitol .

The green tape stacks were laminated together and placed on a kovar support substrate and co-fired in air at 850-900°C. The resistors were printed and buried one layer below the top surface of the ceramic stack. After co-firing, the resistors were then connected to the outside by printing with a silver-palladium or gold conductor ink and post-fired at 700-750°C in air.

Table XIX below summarizes the Ru02-glass compositions and the properties of the fired resistors. In Table XIX the compositions are given in weight %, and TCR was measured from room temperature to 125°C. A short term overload test (STOL) was also performed.

TABLE XIX Composition R (KΩ/sσ) TCR , STOL ppm/°C

15% Ru02 99 . 9 - 80 85% glass 3

22.5% Ru02 5 . 08 - 111 200V/5sec/ 75.5% glass 3 0 . 06% ΔR 2.0% BaTi03

22.8% Ru02 4.00 28 76.2% glass 3 2.0% BaTiO,

24.75% Ru02 0.86 209 40V/5sec/ 74.26% glass 3 4.5% ΔR 0.99% BaTi03

21.5% Ru02 1.01 •20 77.6% glass 1 0.9% BaTiO,

21.6% Ru02 0.46 153 150V/5sec/ 77.9% glass 1 1.1% ΔR 0.5% BaTiO,

18% Ru02 0.52 262 82% glass 1

10% Ru02 22.9 44 90% glass 1

24.8% Ru02 0.54 25 74.3% glass 1 0.99% BaTiO,

18.9% Ru02 0.94 117 80.6% glass 1 0.5% BaTiO, Thus the use of glass 3 was effective to form high value resistors of over 2 Kohms/sq. The glass 1 compositions were chosen for further development of a 1 Kohm/sq resistor.

The above resistor compositions were admixed with an organic vehicle to form an ink composition, using a dispersant (1.44% by weight), ethyl cellulose Resin N300

(0.10% by weight), Elvacite resin 2045 (3.9% by weight) and

25.18% of a mixed solvent of terpineol and butyl carbitol.

The resistor ink was adjusted to about 38 volume % solids. In order to maximize circuit density, it is desirable to print small size resistors such as patterns of 0.508 x

1.016 to 1.016 to 2.032 mm to obtain a 510 ohm resistor.

Various resistor inks were made having varying ratios of solids to adjust the resistance and TCR values while keeping the volume % constant at 38%, and maintaining the dispersant concentration constant at 2 weight % of the total powder weight. The powder components of useful resistor inks are summarized below in Table XX.

TABLE XX Material Composition, Wt% Preferred composition, Wt%

Ru02 17.33-24.8 19.8-23.14

Glass 1 74.3-81.7 75.87-79.21 BaTi03 0.99-1.10 0.99-1.1

Suitable resistor ink compositions made from the above powder mixtures are shown below in Table XXI . TABLE XXI

Material Function Ink Compositions, Wt%

Ru02 Conductor 16.70 14.42 14.93 glass 1 Sintering aid 54.73 57.59 56.15

BaTi03 TCR Control 0.71 0.72

Hypermer PS2 Dispersant 1.43 1.44 1.45

15% Elvacite Binder/solvent 25.12 25.84 25.38 2045/terpineol

7.5% ethyl Binder/solvent 1.31 1.32 1.30 cellulose N300 in butyl carbi tol/terpineol

After screen printing resistors on one layer of 4-5 layer laminated green tapes as above which had been co-fired onto kovar at 850-900°C, a top surface conductor ink made from silver-palladium or gold was applied and post fired at 750°C. The resistance was measured at DC or low frequency (lOKHz) and the TCR was calculated from the resistance measured at room temperature and at 125°C. The results are shown below in Table XXII.

TABLE XXII

Ink Size Thi .ck Area TCR, CO -fired mm μm (sq) R(KΩ) ppm/°C.

2 0.51x1.02 18. ,3 0.496 0.438 91

1.02x2.03 18. ,7 0.496 0.501 10

1.52x3.05 14. ,3 0.496 0.563 -18

3 0.51x1.02 18. ,0 0.506 0.434 58

1.02x2.03 16. ,0 0.502 0.504 1

1.52x2.03 14. ,5 0.505 0.543 -46

2 0.51x1.02 19, .2 0.461 0.412 62

1.02x2.03 19, ,3 0.487 0.503 -59

1.52c3.05 13, .1 0.490 0.617 -64

Ink Size TCR, post fired mm R(KΩ) ppm°C R(KΩ/sσ)

2 0.51x1.02 0.472 85 0.952

1.02x2.03 0.536 9 1.080

1.52x3.05 0.598 -34 1.206

3 0.51x1.02 0.471 75 0.931

1.02x2.03 0.542 -9 1.080

1.52x3.05 0.582 -34 1.154

2 0.51x1.02 0.442 58 0.959

1.02x2.03 0.540 -54 1.109

1.52x3.05 0.660 -82 1.347

It is apparent that resistance values increase after post firing at 750°C by an average of 7.3%. In addition, resistor values increase with increasing resistor size. This increase in resistance value with increasing size is due to dilution of the resistor by the silver terminating conductor layer during co-firing, which decreases sheet resistance for smaller size resistors. Additional resistors from resistor ink compositions 1 and 2 are given below in Tables XXIII and XXIV respectively. TCR was measured at room temperature and at 125°C. TABLE XXIII

Size , mm Area , mm2 Resistance (ohms) Postfired TCR Cofired Postfired ppm/°C

(1) Square Resistors

0.51x0.52 0.258 721 778 -43.4 1.02x1.02 1.032 922 1003 -94.6 1.52x1.52 2.323 976 1064 111

(2) 1/2 Resistors:

0.51x1.02 0.516 459 496 -55

1.02x2.03 1.065 498 541 -92

1.52x3.05 4.645 511 557 108

2.03x4.06 8.258 534 582 118

The print thickness of the 1/2 sq 1.02x2.03 mm resistor was 18.6 microns.

TABLE XXIV Size, mm Area, mm2 Resistance (ohms) Postfired TCR Thick

Co- Postfired ppm/°C (μm fired

(1) Square Resistors:

0.51x0.51 0.258 957 1022 -2 1.02x1.02 1.032 1086 1172 -55 1.52X1.52 2.323 1109 1200 -74

(1/2) Square Resistors

0.51x1.02 0.516 525 563 -9 15.3

1.02x2.03 2.065 547 591 -53 15.2

1.52x3.05 4.645 562 608 -66 13.8

2.03x4.06 8.258 566 612 -70

The data for resistors of the resistor ink composition 1 is plotted in Figs. 6 and 7 which are graphs of resistance versus resistor area for (1) square resistors and for (1/2) resistors respectively.

The above resistors were also subjected to reliability testing. Test 1 was for 1000 hours at 85°C/85%RH, Test 2 consisted of cycling over 200 times between -55 and 125°C. Test 3 applied 15.5 Watts/cm2 of power to the resistor at 70°C for 1000 hours. The resistors passed these tests. Resistor ink 1 was used to make a 510 ohm buried resistor 1.016 x 2.032 mm in size in a receiver board designed for operation at 1 GHz. A resistance value of 510 ohms ±10% was obtained after post firing, providing the dried ink thickness was maintained at between 18 and 25 microns .

The ceramic printed circuit boards of the invention are also useful for incorporating or embedding other components, such as RF filters. In such case, thick multilayer stacks that are over 2 mm in thickness after firing are made. However, the large number of green tape layers after firing preclude close control of the shrinkage in the x and y dimensions, and, in addition, the multilayer stack tends to de-laminate from the metal support substrate when fired.

Thus a method had to be developed that would be able to control shrinkage and prevent de-lamination from a metal support substrate over many thicknesses of green tape. We have found that by interleaving green tape layers made from the prior art low dielectric loss glasses mixed with minor amounts of oxide fillers together with green tape layers made from the same glasses but including greater amounts of oxide fillers, many more layers of green tapes can be stacked, laminated and fired with no shrinkage in the x, y directions and no de-lamination from the metal support. These thick multilayer metal supported circuit board stacks are particularly useful when RF components are to be embedded in the stacks.

Useful prior art glasses used to make one type of green tape are made from zinc-magnesium-borosilicate crystallizing glasses as described above. A suitable crystallizing glass is glass 3 above to which 2.0% by weight of Co304 coloring agent is added.

This glass is mixed with 9.6% by weight of a non- crystallizing lead-based glass of the lead- zinc-aluminum silicate system. An exemplary glass contains 42.0% by weight of PbO; 10.0% by weight of Al203, 38.8% by weight of Si02 and 10.0% by weight of ZnO.

These crystallizing-non-crystallizing glass mixtures are combined with oxide fillers, such as alumina, cordierite, quartz, cristoballite, forsterite and willemite, which serve to control the shrinkage and to further modify the TCE. With the addition of a second oxide filler, the desired dielectric properties, shrinkage characteristics and TCE matched to kovar can all be achieved. For example minor amounts of filler oxides, e.g., 1.5-2% by weight of cordierite and 9.5-10.0% by weight of forsterite, produce excellent ceramics for the present applications.

Thus these glasses have major amounts of glass and minor amounts of oxide fillers (<15%) . These glasses have excellent dielectric properties at microwave frequencies, such as 1 GHz. These ceramics are referred to hereinafter as Type I glass-ceramics.

A second type of glass-ceramic is made from the same zinc-magnesium-borosilicate glasses but they include increased amounts, over about 25% by weight, of oxide fillers. These glasses have lower shrinkage than the Type 1 glass-ceramics, and are referred to hereinafter as Type 2 glass-ceramics . The following Table XXV sets forth examples of different ceramic compositions useful to make the second type of green tape layers.

TABLE XXV

Ceramic λ 2. 1 1 Composition ^_«_^^__«__..^^^__«_______^_^____________

Crystallizing glass 50.0 50.0 57.94 66.85

Non-crystallizing glass 6.1 6.1 7.04 8.15

Forsterite 30.0 21.95 30.44 21.70

Cordierite 13.9 21.95 4.57 3.30

Vol. % Glass 50.9 49.1 61.9 72.4

Vol. % Filler 49.1 50.9 38.1 27.6 Thus these ceramics include major amounts of filler, e.g., about 25-50% by weight.

Green tapes are made by formulating the Type 1 and

Type 2 glass-ceramics with a resin binder together with plasticizer, dispersants and solvents in known manner, to form a thick slurry. A typical glass-ceramic composition for use herein has a crystallizing glass particle size of about

10-12.5 microns, a non-crystallizing glass particle size of about 6.5-8 microns, forsterite having a particle size of about 3-5 microns, and cordierite having a particle size of about 2-3 microns. Table XXVI below sets forth a suitable ceramic green tape formulation in percent by weight. TABLE XXVI

Composition Function Type 1 Type 2 Glass/ Glass/ Ceramic Ceramic Green Green Tape Tape

Primary Glass 57.34 31.2-36.4

Secondary Glass 6.98 3.8-4.4 Forsterite powder Filler 7.27 13.7-16.0 Cordierite powder Filler 1.09 13.7-16.0 Hypermer® PS2 Dispersant 0.58 0.56-0.79 Butvar® B98 Binder 2.04 2.13-2.87 Santicizer® 160 Plasticizer 1.36 1.42-1.91 Methyl ethyl ketone Solvent 11.67 11.58-16.06 Anhydrous ethanol Solvent 11.67 11.58-16.06

The resultant slurry is cast to form a green tape about 0.15-0.20 mm thick, and the green tape is dried.

The two types of green tape using minor and major amounts of amounts of oxide fillers respectively, are then interleaved. Silver or other metal patterns are screen printed on the green tapes to form circuit patterns. Preferably circuit patterns are printed between two green tapes of Type 1, to form a hermetic ceramic, since the Type 2 (high filler content) glass-ceramics tend to become more porous on firing than the Type 1 glass-ceramics.

In order to provide various conductor patterns on the green tapes, a co-firable conductive metal-based thick film conductor ink based on the glass compositions of the invention can be made with a conductive metal powder, such as silver powder, mixed with a small amount of the glasses disclosed above, together with known dispersants, resins and solvents to form a screen printable conductor ink. Top conductor inks can be made in like fashion using silver- palladium powder, or a gold powder. Via fill inks to connect circuit patterns on various green tape layers together can also be made with silver powder, in known manner.

The green tape stack is then suitably laminated at a pressure of about 1.174 kg/mm2 at about 93°C for four minutes, and co-laminated with the prepared metal support substrate at a pressure of about 1.3-1.4kg/mm2. After laminating and co-laminating, the multilayer stack on the kovar support is fired in a belt furnace at a belt speed of 0.4 inch/min to a peak temperature of 850-900°C. During firing the organic materials are vaporized, and the low melting glazing glass softens, adhering the multilayer ceramic stack to the metal core. The metal core aids in limiting the shrinkage of the overlying green tapes in the x and y directions. Thus almost all of the shrinkage occurs in the z direction, perpendicular to the metal support. The presence of the interleaved Type 2 glass-ceramics, which have low shrinkage, also serves to constrain the shrinkage of the multilayer stack in the x and y directions.

After firing, a conductive ink may be applied to the top of the fired multilayer stack, as to form bond pads, inductors, microstrip interconnects and the like, in known manner .

The invention will be further described in the following Examples, but the invention is not meant to be limited to the details described therein. In the Examples, percent is by weight. Example 1

Eleven layers of Type 1 green tape (A) , three of which had a silver-based ink applied thereto (C,D) , and 7 layers of Type 2 green tape (B) were interleaved as shown in Fig. 1. The green tape stack was then laminated and placed over a kovar support substrate, and co-laminated. The stack was fired. The shrinkage was 17.0% in the z direction, but only

0.96% in the x direction and 0.61% in the y direction. The total stack after firing was 2.50 mm thick. Example 2

Eleven layers of Type I green tape, having metallized planes on three of the layers, were interleaved with Type 2 green tapes, as shown in Fig. 8. Fig. 8 illustrates the Type 1 green tapes as A, Type 2 green tapes as B, C designates embedded RF filters, and D illustrates silver patterning. The green tapes were interleaved and stacked, laminated, co- laminated to a kovar support and fired. The fired stack was 2.40 mm thick.

The shrinkage was 17.0% in the z direction, 0.64% in the x direction and 0.60% in the y direction. Example 3 Eleven layers of Type 1 green tape and 7 layers of

Type 2 green tape were interleaved and stacked, laminated and fired. The resultant stack was 2.20 mm thick.

The shrinkage was about 17% in the z direction, 0.83% in the x direction and 0.98% in the y direction. Example 4

Fifteen layers of Type 1 (A) green tape having embedded filters (C) on one layer and ground planes (D) on two layers, as shown in Fig. 9, and 8 layers of Type 2 green tape (B) were interleaved and stacked, laminated and fired to form a stack 2.52 mm in thickness.

The shrinkage was about 17% in the z direction, 0.35% in the x direction and 0.85% in the y direction. The physical properties of the resultant multilayer tapes alone. The results are given below in Table XXVII.

TABLE XXVII

Property Type I tape Interleaved with alone* Type 2 tape **

TCE (25-300°C) 6 . 3 ppm/°C *

7 . 7 ppm/°C * *

Dielectric Constant 6.8 @ 1GHz 5.4 @ 12 GHz D z 0.0018 @ 12 GHz V Surface Resistivity,

(π-cm) >1.0 x 1012 Chemical Durability pass Buried Conductor Resistance 3.6mΩ/square Via conductor Resistance 0.72 mΩ/via

* on kovar

** ceramic alone

Example 5

Properties of various Type I and Type 2 green tape stacks were fired at 865°C and their properties measured. The results are summarized below in Table XXVIII

TABLE XXVIII

Sample Stack Fired Density ε_ Tanδ Frequency 5 layers Type 1 3.14 g/cc 6.41 0.0023 15.6 GHz 5 layers Type 2 2.01 g/cc 3.64 0.0017 17.9 GHz

23 layers, of Example 4 5.39 0.0018 11.6 GHz

20 interleaved layers 5.24 0.0019 12.2 GHz Thus the interleaved green tape layers can be stacked to produce thick fired metal supported multilayer circuit boards that shrink in only one dimension.

Although the invention has been described in terms of specific embodiments, it will be clear to those skilled in the art that variations in the glass compositions, the amounts of oxide fillers, the metal support, the number of green tape layers, the types of capacitors and capacitor inks, resistors and resistor inks and conductors and conductor inks and the like can be made and are meant to be included herein. The invention is only to be limited by the appended claims.

Claims

We Claim :
1. A supported ceramic circuit board having an embedded component therein comprising a) a laminated green tape stack on a kovar support; b) a screen printed component screen printed onto a green tape layer from an ink comprising a dielectric and a low melt temperature glass, c) a conductor layer below said screen printed component and d) an overlying green tape layer.
2. A supported ceramic circuit board having embedded components comprising: a) a laminated green tape stack on a kovar support; b) a buried screen printed capacitor made from a dielectric selected from the group consisting of barium titanate, titanium oxide and lead-magnesium-niobate; c) a silver conductor layer printed below and above the capacitor; and d) an overlying green tape layer.
3. A supported ceramic circuit board according to claim 2 wherein said capacitor is sandwiched between silver barrier layers, said barrier layer comprised of a mixture of silver powder and silver flake.
4. A supported ceramic circuit board according to claim 2 wherein said dielectric is lead-magnesium-niobate, and said capacitor is sandwiched between silver or barium titanate barrier layers, said capacitors having a high dielectric constant over 700.
5. A green tape stack which, when fired, is at least two millimeters thick comprising alternating green tape layers of a first type comprising a mixture of crystallizing and non-crystallizing glasses together with at least 5% up to 15% by weight of an oxide filler, with green tape layers of a second type comprising a mixture of crystallizing and non-crystallizing glasses together with a higher percent by weight of an oxide filler than the first type, onto a metal support substrate.
6. A green tape stack according to claim 5 wherein said non- crystallizing glass is made from PbO, Al203 and Si02.
7. A green tape stack according to claim 5 wherein said oxide filler is selected from the group consisting of alumina, cordierite, quartz, cristobalite, forsterite and willemite .
8. A green tape stack according to claim 5 wherein said metal support substrate is a copper-nickel clad or plated kovar support .
9. A green tape stack according to claim 5 wherein a conductive layer is screen printed between one or more green tape layers of the first type.
10. A green tape stack according to claim 9 wherein said conductive layer is a silver-based layer.
11. A green tape stack according to claim 9 wherein a conductive layer is screen printed onto the top surface of the stack.
12. A fired green tape stack according to claim 5.
13. A fired green tape according to claim 5 wherein an RF component is embedded in the green tape stack.
14. A multilayer ceramic green tape structure comprising a plurality of low firing temperature green tapes that do not shrink in the x and y dimensions during firing having circuit patterns thereon mounted on a metal support substrate, a capacitor screen printed on a green tape layer one or more layers below the top of the stack, and a conductor layer screen printed above and below the capacitor.
15. A multilayer ceramic green tape structure according to claim 14 wherein said capacitor layer is made from barium titanate, titanium oxide or lead-magnesium-niobate.
16. A multilayer ceramic green tape structure according to claim 14 wherein the conductor layer is of silver.
17. A multilayer ceramic green tape structure according to claim 14 wherein said capacitor is sandwiched between two barium titanate barrier layers having a thickness sufficient to prevent diffusion of the green tape glasses into the capacitor during firing.
18. A method of forming embedded components in a multilayer ceramic circuit board on a metal support substrate comprising a) forming a component precursor ink of a precursor compound, a low firing temperature glass and an organic vehicle; b) screen printing a bottom conductor layer; c) screen pringing the component precursor ink over the bottom conductor layer; d) covering said screened component precursor ink layer with one or two layers of green tape; e) screen printing a top conductor layer; f) aligning and laminating said layers together, and g) firing said laminated layers.
19. A method of forming embedded capacitors in a multilayer ceramic circuit board on a metal support substrate comprising a) forming a capacitor ink from a mixture of a dielectric selected from the group consisting of barium titanate, titanium oxide and lead-magnesium-niobate, a low firing temperature glass and an organic vehicle; b) screen printing a bottom conductor layer; c) screen printing capacitors over the bottom conductor layer; d) screen printing a top conductor layer; e) covering said capacitors with one or more layers of green tape; f) aligning and laminating said layers together, and g) firing said laminated layers.
20. A capacitor ink comprising a dielectric selected from the group consisting of barium titanate, titanium oxide and lead-magnesium niobate, a low firing temperature glass and an organic vehicle.
21. A resistor ink composition comprising ruthenium oxide, a low firing temperature glass in sufficient amount to reduce the firing temperature of the mixture within the range 850- 900┬░C and an organic vehicle.
22. A resistor ink composition according to claim 20 further including a TCR modifier of barium titanate.
23. A ceramic multilayer printed circuit board including embedded resistors comprising a screen printed resistor layer of ruthenium oxide and a low firing temperature glass covered with one or two layers of green tape, said layer printed onto a green tape stack laminated to a metal support board and a conductor layer underlying said resistor layer.
24. A ceramic multilayer printed circuit board according to claim 22 wherein said metal support board is of kovar.
25. A method of making embedded resistors comprising a) forming a resistor ink comprising ruthenium oxide mixed with a sufficient amount of a low firing temperature glass so that the mixture has a firing temperature between about 850-900┬░C together with an organic vehicle; b) screen printing the ink on a green tape stack to deposit resistors thereon; c) covering said resistor layer with one or two green tape layers; and d) terminating the resistors with an underlying first conductive layer, e) laminating the resultant green tape stack; f) firing said stack to a temperature of from about 850-900┬░C, g) coating the top surface of the fired stack with a second conductive layer, and h) post firing said fired multilayers.
EP19980910019 1997-03-06 1998-03-03 Ceramic multilayer printed circuit boards with embedded passive components Withdrawn EP1016106A4 (en)

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US812151 1985-12-23
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US812832 1997-03-06
US08812172 US5866240A (en) 1997-03-06 1997-03-06 Thick ceramic on metal multilayer circuit board
US08812151 US5953203A (en) 1997-03-06 1997-03-06 Multilayer ceramic circuit boards including embedded capacitors
US09031745 US6055151A (en) 1997-03-06 1998-02-27 Multilayer ceramic circuit boards including embedded components
PCT/US1998/003270 WO1998039784A1 (en) 1997-03-06 1998-03-03 Ceramic multilayer printed circuit boards with embedded passive components

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