EP0952508B1 - Generating circuit for reference voltage - Google Patents

Description

The present invention relates to a reference voltage generating circuit or reference voltage source after the Preamble of claim 1.

Most integrated circuits that do not consist of one stabilized supply voltage are operated, d. H. Almost all smart power ICs require an internal reference voltage source. This applies in particular to voltage regulators, whose output voltage other integrated circuits or Circuit blocks serve as reference voltage.

Known reference voltage sources use, for example Zener diodes, to which an unstabilized via a series resistor Input voltage is supplied, which at the Zener diode tapped voltage as voltage-stabilized Reference voltage is used. Furthermore, in principle generally the forward or forward voltage of a diode or the base-emitter voltage of a bipolar transistor as a reference voltage be used. However, the The forward voltage of a pn junction has a negative temperature coefficient and thus a temperature dependency that for many applications is negative. For example, with With the help of a voltage regulator, the output voltage as Reference voltage is used, sensors, A / D converters or similar Components are supplied, the output voltage of the voltage regulator highly accurate and in particular extremely temperature stable his. Nowadays there are tolerance limits up to maximum 1% are normal requirements.

For this reason, the previously described reference voltage sources in recent years through bandgap or Bandgap reference voltage sources replaced, one deliver temperature-stabilized reference voltage. These well-known Bandgap reference voltage sources are based on one Addition of a forward voltage of a current-carrying pn junction and multiplied one by a corresponding factor Differential voltage resulting from two forward voltages of two pn junctions with different current densities is formed. Generally has the forward voltage of a current-carrying pn junction - as before has been explained - a negative temperature coefficient. In contrast, the difference between two flow voltages increases proportional to the absolute temperature and is therefore subject to a positive temperature coefficient. The factor with multiplied by the previously explained differential voltage is set so that the negative temperature coefficient the forward voltage of the pn junction the positive Eliminates the temperature coefficient of the differential voltage, can be a temperature stabilized output or reference voltage can be obtained, which is only a parabolic or has quadratic temperature dependence. In particular is the output voltage of the bandgap reference voltage source, which by adding the previously explained Forward voltage of a current-carrying pn junction with the differential voltage multiplied by the corresponding factor is obtained from two further river voltages, approx. 1.25 V, which is about the bandgap of silicon corresponds. The amount of output voltage from this reference voltage source therefore has the bandgap reference voltage source given their name.

2 shows a generalized circuit diagram of a known bandgap reference voltage source. A current mirror circuit S _{1 is} connected to a positive supply voltage connection V _cc and compares the collector currents I ₁ and I ₂ from two npn bipolar transistors T ₁ and T ₂ connected according to FIG. 2. The currents of these currents I ₁ and I ₂ are predetermined by the transistors T ₁ and T ₂ . The base terminals of these transistors T ₁ and T ₂ are connected to each other, wherein the base voltage of the transistor T is multiplied up ₁ via a voltage divider consisting of two resistors R ₅ and R _6, so that the resistor R _{6 ref} a desired initial or reference voltage V can be tapped. 1, the current mirror S _{1 has} an output which reproduces the result of the comparison of the currents I ₁ and I ₂ and is coupled to an actuator ST, for example an operational amplifier or an amplifying transistor.

With the aid of the control circuit shown in Fig. 2 with the current mirror S ₁ and the actuator ST, the ratio of through the transistors T ₁ and T ₂ flowing currents I ₁ and I ₂ is adjusted, the currents I ₁ and I ₂ usually are the same size. In BICMOS circuits, however, the current I _{1 is} often also set to a multiple value of the current I ₂ , so that the following generally applies: I. 1 = m · I 2nd .

The transistors T ₁ and T ₂ have different emitter areas, the emitter area of the transistor T ₂ corresponding to a multiple of the emitter area of the transistor T ₁ , so that the relationship between the emitter areas A _E1 and A _{E2 of} the transistors T ₁ and T ₂ is shown as follows can be: A E2 = n · A E1 .

Because of the relationships given above, the emitter current densities of the transistors T ₁ and T ₂ differ by the factor n * m, ie the emitter current density of the transistor T ₁ is (n * m) times as large as the emitter current density of the transistor T ₂ .

At the common base connection of the transistors T ₁ and T ₂ , the total voltage is tapped from the base-emitter voltage of the transistor T ₁ and the voltage present at the node between the resistors R ₁ and R ₂ . The first-mentioned base-emitter voltage of the transistor T ₁ corresponds to the forward voltage of a current-carrying pn junction and therefore, as has been explained above, has a negative temperature coefficient. The voltage drop across the resistor R ₁ is dependent on the difference between the base-emitter voltage of the transistor T ₁ and the base-emitter voltage of the transistor T ₂ and, as has also been explained above, has a positive temperature coefficient. The emitter-base voltage of the bipolar transistor T ₁ decreases by 2mV / K depending on the temperature. The bandgap reference voltage source shown in FIG. 2 can be dimensioned in such a way that the differential voltage across the resistor R ₁ from the forward voltages of the two transistors T ₁ and T _{2 is} one by appropriate selection of the resistors R ₁ and R ₂ and the previously specified factor n the negative temperature coefficient compensating positive temperature coefficient of + 2mV / K is subject. The voltage 2mV / K x 300K = 600mV drops across the resistor R ₁ at room temperature, so that the desired temperature-stabilized bandgap reference voltage is obtained at the common base connection of the transistors T ₁ and T ₂ due to the typical emitter-base voltage of approx. 650mV of approximately 1.25V (= 650mV + 600mV), which is then multiplied by the divider with the resistors R ₅ and R ₆ .

For a close tolerance of the output voltage V _ref , the resistance ratios R ₅ : R ₆ , R ₁ : R ₂ , the current mirror ratio I ₁ : I ₂ (m: 1) and the ratio of the emitter areas of the transistors T ₁ and T ₂ (1 : n) critical. Furthermore, the circuit shown in FIG. 2 reacts very sensitively to the temperature gradients which are ubiquitous in integrated power circuits. With usual emitter area ratios (e.g. n = 8) and room temperatures, the difference between the emitter-base voltages of the two transistors T ₁ and T _{2 is} approximately 50 mV. If the temperatures of the transistors T ₁ and T ₂ differ by 1K, the difference in the emitter-base voltages changes by approximately 2 mV, ie by approximately 4%. It is therefore necessary to arrange the transistors T ₁ and T ₂ exactly on isotherms of the largest heat source of the corresponding circuit in an implemented circuit layout. However, modern layout with reusable circuit and layout blocks prohibits the circuit from being adapted to the respective location of the existing heat sources. In addition, the number of heat sources in smart power ICs is constantly increasing, so that the course of the corresponding isotherms of these heat sources cannot be clearly determined. Furthermore, due to the large number of components of the bandgap reference voltage source that are critical with regard to the mating properties, an individual adjustment of the circuit is generally required, which can be done, for example, with the help of so-called "zapping" zener diodes, which break through in the reverse direction when a high external voltage is applied and a generate low-resistance connection. However, this increases the complexity of the circuitry.

The invention is therefore based on the object of a reference voltage generating circuit the one described at the beginning Specify which type is less sensitive to temperature fluctuations and component tolerances.

This object is accomplished in accordance with the present invention a reference voltage generating circuit with the features of claim 1 solved. The subclaims describe in each case advantageous and preferred embodiments of the present Invention, in turn, as simple as possible circuit to be implemented or the largest possible Contribute to temperature stability.

According to the present invention, the reference voltage further by adding a voltage component with a negative temperature coefficient with a voltage component generated with a positive temperature coefficient. The one negative temperature coefficient underlying portion includes according to the invention, however, corresponding to several forward voltages pn transitions, and the portion with the positive Temperature coefficient in turn comprises a differential voltage, where each voltage contributing to the differential voltage is one Sum voltage from several forward voltages of corresponding pn junctions corresponds. In particular, as Differential voltage, which is the proportion of the desired Reference voltage with a positive temperature coefficient represents the difference between two sums of several Flow voltages with different current densities flow through pn transitions used. In this case, the reference voltage source delivers an output voltage that a Is a multiple of the usual bandgap reference voltage. This voltage is sufficient for most applications high, so that for example a voltage divider for Highly multiplying the reference voltage can be omitted.

By appropriate dimensioning of the invention Reference voltage source can be achieved that a deviation the temperature around 1K of one of the transistors used only 1.3% in the difference in total voltages comes in. It is also possible to use the transistors in the layout of the reference voltage source according to the invention to be arranged crosswise so that linear temperature gradients the output voltage of the reference voltage source from any direction cannot falsify.

According to a preferred embodiment, circuit means used which is the remaining parabolic Temperature dependency of the generated reference voltage compensate so that the output reference voltage in Ideally, temperature stable within a 0.03% window can be generated.

Fig. 1 zeigt ein vereinfachtes Schaltbild eines bevorzugten Ausführungsbeispiels der erfindungsgemäßen Referenzspannungsquelle,

Fig. 2 zeigt ein vereinfachtes Schaltbild einer bekannten Referenzspannungsquelle,

Fig. 3 zeigt ein verfeinertes Ausführungsbeispiel der erfindungsgemäßen Referenzspannungsquelle, und

Fig. 4 zeigt eine weiter verfeinerte und tatsächlich realisierte Ausgestaltung der in Fig. 3 dargestellten Referenzspannungsquelle der vorliegenden Erfindung.

The invention is explained in more detail below on the basis of preferred exemplary embodiments with reference to the accompanying drawings.

1 shows a simplified circuit diagram of a preferred exemplary embodiment of the reference voltage source according to the invention,

2 shows a simplified circuit diagram of a known reference voltage source,

3 shows a refined embodiment of the reference voltage source according to the invention, and

FIG. 4 shows a further refined and actually implemented embodiment of the reference voltage source of the present invention shown in FIG. 3.

In the simplified circuit shown in Fig. 1, the one preferred embodiment of a reference voltage source in accordance with the present invention again the principle described above, known per se used the reference voltage by adding a share with negative temperature coefficient and a share with to generate positive temperature coefficient, whereby by suitable circuit dimensioning the negative temperature coefficient through the positive temperature coefficient can be compensated. According to the in Fig. 1st illustrated embodiment, however, is considered the one Share of the generated reference voltage, that of a positive Temperature coefficient is subject to the difference of two Sum voltages from several forward voltages of with different current densities through which pn junctions flow used. Furthermore, the part that includes the negative Subject to temperature coefficients, the sum of Forward voltages of several pn junctions.

The circuit shown in FIG. 1 again comprises npn transistors T ₁ and T ₂ , the emitter areas A _E1 and A _{E2 of which are} in the ratio 1: n ₁ . The transistors T ₁ and T ₂ are operated with collector currents I ₁ and I ₂ , respectively, which are compared by a current mirror circuit S ₁ , the current strengths of these currents I ₁ and I ₂ being predetermined by the transistors T ₁ and T ₂ . The currents I ₁ and I ₂ are in the ratio m ₁ = I ₁ / I ₂ . The base connections of the transistors T ₁ and T ₂ are separately connected to the emitters of further npn bipolar transistors T ₃ and T ₄ . The emitter areas A _E3 and A _{E4 of} the transistors T ₃ and T ₄ are in a ratio of 1: n ₂ . The transistors T ₃ and T ₄ are flowed through by different currents I ₃ and I ₄ , which can be set via resistors R ₃ and R ₄ . 1, the collectors of the transistors T ₃ and T ₄ are connected to a positive supply voltage _potential V _CC . The base connections of the transistors T ₃ and T ₄ are connected to one another. Furthermore, the resistors R ₁ and R _{2 are} connected to the transistors T ₁ and T ₂ in accordance with the known reference voltage source shown in FIG. 2.

A diode D or a corresponding pn junction is coupled to the resistor R ₃ . The voltage across resistor R ₄ corresponds to the difference between the emitter-base voltages of transistors T ₃ and T ₄ . So that the ratio of the emitter currents of these transistors is temperature stable, the voltage across resistor R ₃ must also be proportional to temperature. This is achieved with the aid of the diode D, since the voltage at R ₁ increases in proportion to the temperature and the forward voltages of the bipolar transistor T ₁ and the diode D do not differ significantly, so that the voltage across the resistor R _{3 is} proportional to the temperature as desired.

In the reference voltage source shown in FIG. 1, the desired reference or output voltage is tapped at the common base connection of the bipolar transistors T ₃ and T ₄ . This output voltage corresponds to the total voltage from the base-emitter voltages of the transistors T ₃ and T ₁ and the voltage present at the node between the resistors R ₁ and R ₂ . The base-emitter voltages of the transistors T ₃ and T _{1 are} known to have a negative temperature coefficient of approximately -2 mV / K. The voltage present at the node between the resistors R ₁ and R ₂ is determined by the base-emitter voltages of the transistors T ₁ -T ₄ and corresponds in particular to the difference between a first voltage and the sum of the forward voltages of those through which a high current density flows Transistors T ₁ and T ₃ depends, and a second voltage, which depends on the sum of the forward voltages of the bipolar transistors T ₂ and T ₄ through which a low current density flows. That is, the voltage present at the node between the resistors R ₁ and R ₂ depends on the difference between the sum of the base-emitter voltages of the transistors T ₁ and T ₃ and the sum of the base-emitter voltages of the transistors T ₂ and T ₄ from. By suitable dimensioning of the components shown in FIG. 1 or the currents supplied to the individual bipolar transistors, it can be achieved that the differential voltage present at the node between the resistors R ₁ and R ₂ has such a positive temperature coefficient that the negative temperature coefficient of the base emitter -Voltage of the bipolar transistors T ₃ and T ₁ compensated. In this case, the positive temperature coefficient of the differential voltage dropping across the resistor R ₁ must be as high as the negative temperature coefficient of the base-emitter voltages of the transistors T ₃ and T ₁ and consequently be approximately + 4 mV / K. Thus, at room temperature (300K), a voltage drop of approximately 1.2 V must occur at R ₁ , so that the output voltage finally tapped at the common base connection of the bipolar transistors T ₃ and T _{4 is} approximately 2.5 V (= 1.2 V + 2x650 mV) , which is twice as high as in the known reference voltage source shown in FIG. 2, so that the reference voltage source shown in FIG. 1 is in principle a double bandgap reference voltage source.

The voltage of approximately 2.5 V present at the common base of the transistors T ₃ and T ₄ is sufficiently high for most applications, so that in principle the use of a voltage divider with resistors R ₅ and R ₆ for high multiplication of the reference voltage can be omitted . Therefore, in the circuit shown in FIG. 1, the voltage divider with the resistors R ₅ and R _{6 is} only shown in broken lines.

Of course, the circuit shown in Fig. 1 can be modified in a simple manner so that not only the difference is formed from two summation voltages, but that the difference is formed from several summation voltages by using a correspondingly larger number of bipolar transistors, each of these summation voltages corresponds to an addition of even three or more forward voltages of pn junctions through which different current densities flow. In this way, the circuit shown in FIG. 1 can be modified in such a way that a voltage which corresponds to a multiple of the bandgap of silicon is generally tapped at the base terminal of the transistor T ₃ .

With regard to the circuit shown in Fig. 1 it should be noted that the emitter current of the bipolar transistor T ₄ can be selected to be very small, since the greatest thermal leakage current from the collector of each npn transistor to the substrate in barrier-layer-insulated bipolar technologies does not enter the emitter current of the in the present case corresponding npn transistor is received. For example, if the emitter currents of the bipolar transistors T ₃ and T _{4 are} 10 μA and 0.5 μA (ratio 1:20), the emitter area ratios n ₁ and n _{2 are} each 4 and the collector currents I ₁ , I _{2 of} the bipolar transistors T ₁ , T _{2 of the} same size (ie m ₁ = 1), the previously explained differential voltage of the sums of the individual forward voltages is approximately 150 mV. A deviation of the temperature of one of the bipolar transistors T ₁ - T ₄ by 1K is only 1.3% in this differential voltage, so that the reference voltage circuit shown in Fig. 1 is less sensitive to temperature fluctuations or temperature gradients. In addition, it is easier to arrange the transistors shown in FIG. 1 crosswise in the layout of the circuit actually implemented in such a way that linear temperature gradients from any direction cannot falsify the output voltage at the common base connection of the bipolar transistors T ₃ and T ₄ .

The resistance ratio R ₁ : R _{2 can be set} to 4: 1 by a clever choice of the individual components shown in FIG. 1. This is a ratio that can be adjusted particularly precisely. The current mirror S ₁ can be manufactured particularly precisely if the current ratio I ₁ : I _{2 is} 1: 1, ie m ₁ = 1.

As in the known reference voltage source shown in FIG. 2, an actuator ST is also coupled to the output terminal of the current mirror S _{1 in the} circuit shown in FIG. 1, which is controlled depending on the comparison result of the current mirror S1 in order to avoid an uneven load Output connection to allow readjustment of the output voltage V _ref .

1 was the basis of the present invention general principle explained. 3 shows a refined embodiment of the invention Reference voltage source, the corresponding components are provided with the same reference numerals and on a repeated description of these components is omitted.

According to FIG. 3, a further current mirror circuit S _{2 is} used, which compares collector currents I ₇ and I ₈ from further transistors T ₇ and T ₈ and controls the actuator ST depending on the comparison result. These bipolar transistors T ₃ and T ₄ form an amplifier stage in order to keep the current consumption of the reference voltage source shown in FIG. 3 as low as possible. With current mirror S ₁ , the inputs correspond to the outputs and are connected to the base connections of transistors T ₇ and T ₈ . Another npn bipolar transistor T ₅ , together with another current mirror circuit S _3, serves to compensate for the errors arising from the base current of transistor T ₂ . By using the npn bipolar transistor T ₆ shown in Fig. 3 it can be achieved that the thermal leakage currents of the bipolar transistors T ₁ and T ₅ cancel from their collectors to the substrate compared to the thermal leakage currents of the bipolar transistors T ₂ and T ₆ , if that Transmission ratio of the current mirror S _{1 is} 1: 1. The bipolar transistor T ₅ has an emitter area corresponding to the emitter area of the bipolar transistor T ₂ , while the bipolar transistor T _{6 has} an emitter area corresponding to the emitter area of the bipolar transistor T ₁ , ie the emitter area of the bipolar transistor T ₅ is n ₁ times as large as the emitter area of the bipolar transistor M ₆ .

A circuit arrangement is coupled to the resistor R ₃ , which, in addition to the diode D already shown in FIG. 1 in accordance with FIG. 3, has connected resistors R ₇ -R ₉ and a further bipolar transistor T ₉ . This circuit arrangement works as follows. At low temperatures, the current flow through the resistor R _{3 is} smallest and the flow voltages of all pn junctions are so high that the resistors R7 and R8 essentially determine the behavior of this circuit arrangement. At medium temperatures, the path leading through the diode D and the resistor R _{9 dominates} , in which case the resistance of the equivalent circuit diagram of this circuit arrangement is lower due to the parallel connection of R ₈ and R ₇ to R ₉ and the diode voltage by the factor (R ₈ + R ₇ ) / (R ₇ + R ₈ + R ₉ ) is divided down. At high temperatures, on the other hand, the path leading through transistor T ₉ dominates, the equivalent circuit diagram having a diode forward voltage increased by the factor (R ₇ + R ₈ ) / R ₇ without series resistance. This results in a sectionally linear temperature response at the collector of the bipolar transistor T ₉ , which proceeds approximately according to a parabolic function, so that, with the correct dimensioning of this circuit arrangement, the parabolic temperature dependency of the reference voltage which remains despite the temperature stabilization as a result of the differential voltage formation can be compensated. Ideally, the generated reference voltage can be generated in a temperature-stable manner within a 0.03% window. Finally, in FIG. 3, a voltage divider with resistors R ₅ and R _{6 is also connected} to the common base connection of the transistors T ₃ and T ₄ in order to multiply the base voltage of these transistors and to obtain the desired reference voltage V _ref .

Fig. 4 shows an example of one realized on a test chip Double bandgap reference voltage source according to the present invention. Again, those components are which correspond to the components shown in Fig. 3 with have the same reference numerals and will not be repeated explained.

4, two p-channel MOS field effect transistors M ₁ and M _{2 form} the current mirror S ₁ shown in FIG. 3, the common gate connection of these transistors M ₁ and M ₂ to the common emitter connection of transistors T ₇ and T ₈ is laid. . The current mirror S ₃ shown in Figure 3 includes p-channel MOS field effect transistors M ₃ - M ₆ and n-channel MOS field effect transistors M ₇ - M _10. The current mirror circuit S ₂ , however, is implemented by a pnp bipolar transistor T ₁₁ . 4, the reference potential of the current mirrors S ₁ and S ₃ corresponds to the input potential of the actuator ST, which is implemented by a control transistor M ₁₁ . Furthermore, the reference potential of the current mirror S _{2 is} connected to the reference potential of the control transistor M ₁₁ . However, the previously described relationship of the reference potentials is not absolutely necessary.

The resistor R ₁₀ additionally shown in FIG. 4 serves to compensate for the thermal leakage current of the resistor R ₄ . The components T ₁₂ , T ₁₃ , C ₁ - C ₃ and R ₁₁ serve to stabilize the circuit.

Finally, the diode D shown in FIG. 3 is realized by the pn junction of a further bipolar transistor T ₁₀ , the base-collector path of which is short-circuited. Otherwise, the mode of operation of the reference voltage source shown in FIG. 4 corresponds to that of the circuits shown in FIGS. 1 and 3.

Claims (19)

1. Circuit for producing a reference voltage, having first circuit means (T₁, T₃) for producing a first voltage, which has a negative temperature coefficient, and having second circuit means (T₁ - T₄, R₁ - R₄) for producing a difference voltage from a second voltage and a third voltage, the second voltage and the third voltage each being derived from forward voltages across corresponding pn junctions and the difference voltage being subject to a positive temperature coefficient, it being possible for the reference voltage (V_ref) to be tapped off as the sum of the first voltage from the first circuit means (T₁, T₃) and the difference voltage from the second circuit means (T₁ - T₄, R₁ - R₄), characterized in that the first circuit means (T₁, T₃) are designed and arranged such that they derive the first voltage from a summed voltage formed by at least two forward voltages across corresponding pn junctions, and in that the second circuit means (T₁ - T₄, R₁ - R₄) are designed and arranged such that they derive the second voltage and the third voltage, respectively, from a first and a second summed voltage, respectively, which are each formed by at least two forward voltages across corresponding pn junctions, and produce the difference voltage from said second and third voltages.
2. Circuit for producing a reference voltage according to Claim 1, characterized in that the second circuit means (T₁ - T₄, R₁ - R₄) are designed and arranged such that they derive the second voltage and the third voltage, respectively, from a first summed voltage and a second summed voltage, respectively, which are each formed by at least two forward voltages across corresponding pn junctions which have different current densities flowing through them.
3. Circuit for producing a reference voltage according to Claim 1 or 2, characterized in that the second circuit means comprise first, second, third, and fourth bipolar transistors (T₁ - T₄), respectively, which have a first, a second, a third and a fourth current density, respectively, flowing through them and are connected such that the second voltage is derived from the summed voltage formed by the forward voltages across the first and the third bipolar transistor (T₁, T₃), and the third voltage is derived from the summed voltage formed by the forward voltages across the second and the fourth bipolar transistor (T₂, T₄), the first and the third bipolar transistor (T₁, T₃) having a higher current density flowing through them than the second and the fourth bipolar transistor (T₂, T₄), and in that the first and the third bipolar transistor (T₁, T₃) are both constituent parts of the first circuit means such that the first voltage is derived from the summed voltage formed by the forward voltages across the first and the third bipolar transistor (T₁, T₃).
4. Circuit for producing a reference voltage according to Claim 3, characterized in that the emitter area of the second bipolar transistor (T₂) is equivalent to a multiple of the emitter area of the first bipolar transistor (T₁), and the emitter area of the fourth bipolar transistor (T₄) is equivalent to a multiple of the emitter area of the third bipolar transistor (T₃).
5. Circuit for producing a reference voltage according to Claim 3 or 4, characterized in that the collector of the first bipolar transistor (T₁) is supplied with a first current, the collector of the second bipolar transistor (T₂) is supplied with a second current, the collector of the third bipolar transistor (T₃) is supplied with a third current and the collector of the fourth bipolar transistor (T₄) is supplied with a fourth current, in that the base of the first bipolar transistor (T₁) is connected to the emitter of the third bipolar transistor (T₃), and the emitter of the first bipolar transistor (T₁) is connected via a first resistor (R₁) to a negative supply voltage connection and via a second resistor (R₂) to the emitter of the second bipolar transistor (T₂), in that the base of the second bipolar transistor (T₂) is connected to the emitter of the fourth bipolar transistor (T₄), the node between the base of the first bipolar transistor (T₁) and the emitter of the third bipolar transistor (T₃) being connected via a third resistor (R₃) to the negative supply voltage connection and via a fourth resistor (R₄) to the node between the base of the second bipolar transistor (T₂) and the emitter of the fourth bipolar transistor (T₄), and in that the base of the third bipolar transistor (T₃) is connected to the base of the fourth bipolar transistor (T₄), so that the summed voltage comprising the base/emitter voltages of the third bipolar transistor (T₃) and of the first bipolar transistor (T₁) corresponds to the first voltage, and the voltage drop across the first resistor (R₁) corresponds to the difference voltage, and the reference voltage (V_ref) can be tapped off at the base of the third bipolar transistor (T₃).
6. Circuit for producing a reference voltage according to Claim 5, characterized in that the emitter area of the second bipolar transistor (T₂) is roughly four times as large as the emitter area of the first bipolar transistor (T₁), and the emitter area of the fourth bipolar transistor (T₄) is roughly four times as large as the emitter area of the third bipolar transistor (T₃), in that the first current, supplied to the first bipolar transistor (T₁), is roughly the same size as the second current, supplied to the second bipolar transistor (T₂), and in that the first resistor (R₁) is roughly four times as large as the second resistor (R₂).
7. Circuit for producing a reference voltage according to Claim 5 or 6, characterized in that the third and the fourth current, respectively, supplied to the third and the fourth bipolar transistor (T₃, T₄), respectively, and the third and the fourth resistor (R₃, R₄) are designed such that the emitter current in the fourth bipolar transistor (T₄) is markedly smaller than the emitter current in the third bipolar transistor (T₃).
8. Circuit for producing a reference voltage according to one of Claims 5 to 7, characterized by a current-mirror circuit (S₁) which, on the one hand, is connected to a positive supply voltage connection and, on the other hand, provides the first current, which is supplied to the first bipolar transistor (T₁), and the second current, which is supplied to the second bipolar transistor (T₂).
9. Circuit for producing a reference voltage according to Claim 8, characterized in that a fifth bipolar transistor (T₅) is connected between the current-mirror circuit (S₁) and the collector of the first bipolar transistor (T₁), and in that a further current-mirror circuit (S₃) is connected between the base of the fifth bipolar transistor (T₅) and the node between the base of the second bipolar transistor (T₂) and the emitter of the fourth bipolar transistor (T₄).
10. Circuit for producing a reference voltage according to Claim 9, characterized in that a sixth bipolar transistor (T₆), with a short-circuited base/collector junction, is connected between the current-mirror circuit (S₁) and the collector of the second bipolar transistor (T₂).
11. Circuit for producing a reference voltage according to Claim 10, characterized in that the emitter area of the sixth bipolar transistor (T₆) is roughly equivalent to the emitter area of the first bipolar transistor (T₁), and the emitter area of the fifth bipolar transistor (T₅) is roughly equivalent to the emitter area of the second bipolar transistor (T₂), and the translation ratio of the current-mirror circuit (S₁) is 1:1.
12. Circuit for producing a reference voltage according to one of Claims 5 to 11, characterized in that a further current-mirror circuit (S₂) is provided which is connected to a positive supply voltage connection (V_cc) and provides the third current, which is supplied to the third bipolar transistor (T₃), and the fourth current, which is supplied to the fourth bipolar transistor (T₄), and in that an amplifier circuit (T₇, T₈) is connected between the further current-mirror circuit (S₂) and the collectors of the third and the fourth bipolar transistor (T₃, T₄), respectively.
13. Reference-earth voltage reference circuit according to one of the preceding claims, characterized by third circuit means (D, T₉, R₇ - R₉) for compensating for a parabolic temperature dependency of the reference voltage (Vref) produced by the second circuit means (T₃, R₃).
14. Reference-earth voltage reference circuit according to Claim 13 and one of Claims 5 to 12, characterized in that the third circuit means (D, T₉, R₇ - R₉) comprise a diode (D) connected between the third resistor (R₃) and the negative supply voltage connection.
15. Circuit for producing a reference voltage according to Claim 14, characterized in that the third circuit means comprise a parallel circuit which is connected between the third resistor (R₃) and the negative supply voltage connection and comprises a series circuit made up of a resistor (R₉) with the diode (D) and a series circuit made up of two further resistors (R₇, R₈), the main current path of a further bipolar transistor (T₉) being connected in parallel with the two further resistors (R₇, R₈), and the base of said further bipolar transistor (T₉) being connected to the node between the two further resistors (R₇, R₈).
16. Circuit for producing a reference voltage according to one of the preceding claims, characterized in that the first circuit means comprise amplifier means (R₅, R₆) for amplifying the reference voltage (V_ref).
17. Circuit for producing a reference voltage according to one of Claims 5 to 12 and Claim 16, characterized in that the amplifier means comprise a voltage divider (R₅, R₆) acting on the base of the third bipolar transistor (T₃).
18. Circuit for producing a reference voltage according to one of the preceding claims, characterized in that the first and the second circuit means (T₁ - T₄, R₁ - R₄) are designed such that the reference voltage (Vref) produced as the sum of the first voltage from the first circuit means (T₃, T₁) and the difference voltage from the second circuit means (T₁ - T₄) is roughly 2.5 V.
19. Circuit for producing a reference voltage according to one of the preceding claims, characterized in that control means (ST, M₁₁) are provided to keep constant the reference voltage (Vref) output to an output connection by the circuit for producing a reference voltage when the output voltage connection is unevenly loaded.

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