EP0907965A1 - Boitier de composant pour monter en surface un composant a semiconducteur - Google Patents

Boitier de composant pour monter en surface un composant a semiconducteur

Info

Publication number
EP0907965A1
EP0907965A1 EP97931678A EP97931678A EP0907965A1 EP 0907965 A1 EP0907965 A1 EP 0907965A1 EP 97931678 A EP97931678 A EP 97931678A EP 97931678 A EP97931678 A EP 97931678A EP 0907965 A1 EP0907965 A1 EP 0907965A1
Authority
EP
European Patent Office
Prior art keywords
chip carrier
circuit board
component
chip
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97931678A
Other languages
German (de)
English (en)
Inventor
Jürgen WINTERER
Gottfried Beer
Bernd Stadler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19626082A external-priority patent/DE19626082C2/de
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0907965A1 publication Critical patent/EP0907965A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
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    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
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    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
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    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
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    • H05K2201/10931—Exposed leads, i.e. encapsulation of component partly removed for exposing a part of lead, e.g. for soldering purposes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • Designation of the invention Component housing for surface mounting of a semiconductor component
  • the invention relates to a component housing with a mounting level for a surface mounting of a semiconductor component on the component surface of a printed circuit board, consisting of a chip carrier having an in particular approximately flat chip carrier surface, which consists in particular of electrically insulating material, on which chip carrier surface a semiconductor chip, preferably with an integrated electronic circuit is fastened, and the electrode carrier passing through the chip carrier and electrically connected to the semiconductor chip with a surface-mountable arrangement.
  • Such a surface mounting also known as a surface mounted design (SMD) arrangement
  • SMD surface mounted design
  • a surface mounted design enables the application of an electronic component on a circuit board in a particularly space-saving or low-profile manner.
  • the component connections are no longer inserted into holes in the printed circuit board as in plug-in assembly, but instead are placed on connection spots on the printed circuit board and soldered there.
  • Components for surface mounting can be smaller than for plug-in mounting, since no more hole and soldering eye diameters determine the grid dimension of the connections.
  • the present invention is based on the object of providing a component housing for surface mounting a semiconductor component on the component surface of a printed circuit board, which eliminates the use of any trim and shaping tools when populating the printed circuit board, and at the same time compensates for deflections caused by tolerances the circuit board as well as thermal or mechanical tension of the circuit board.
  • the outer boundary surfaces of the chip carrier which are provided facing the component surface of the printed circuit board, that is to say toward the assembly plane, are designed such that they have a distance from the assembly plane that increases continuously from the edge region to the center region of the chip carrier.
  • the assembly of the printed circuit board is cheaper because it ensures good adhesion of the placement adhesive used in the assembly, possible tolerances of the printed circuit board in the form of deflections are compensated for, and tension of a thermal or mechanical nature is counteracted, since contact of the component with the Printed circuit board is given only by the connecting legs.
  • the outer boundary surfaces of the chip carrier facing the component surface of the printed circuit board have a substantially V-shaped profile in the cross section of the chip carrier as seen from the inside of the chip carrier.
  • the greatest distance between the outer boundary surfaces of the chip carrier facing the component surface and the printed circuit board has a value of approximately 0.1 to approximately 0.5 mm.
  • the electrode connections passing through the chip carrier and electrically connected to the semiconductor chip are designed in the form of connecting legs which are led out to at least one side, preferably to two sides, of the chip carrier and which are bent into short, rocker-shaped connecting stubs and are cut.
  • the chip carrier which is made of electrically insulating material and in particular is made in one piece, has a lower part which is raised relative to the component surface of the printed circuit board and has side parts arranged on both sides of the lower part.
  • the bends of the connection pins are partially or completely accommodated within the side parts of the chip carrier.
  • connection pins are mechanically anchored within the component, which ultimately contributes to an increase in the electrical reliability
  • the ends of the connecting pins protruding from the side parts of the chip carrier have a slight inclination with respect to the component surface of the printed circuit board, such that they extend downward from the center region of the chip carrier in the direction of the assembly plane
  • the chip carrier is made in one piece from a thermoplastic material
  • Figure 1 shows a schematic sectional view of a component housing according to an exemplary embodiment of the invention
  • Figure 2 is a schematic overall view of the chip carrier of a component housing according to the embodiment.
  • the figures show an exemplary embodiment of a component housing 1 according to the invention with a mounting level for surface mounting on the component surface 2 of a printed circuit board 3.
  • the component housing 1 has an approximately flat chip carrier surface 4 having a chip carrier 5 made of electrically insulating plastic material, on which chip carrier surface 4
  • Semiconductor chip 6 is fastened with an integrated pressure sensor and associated electronic circuit, the pressure sensor and the circuit not being shown in the figures, and the electrode terminals 7 penetrating the chip carrier 5 and electrically connected to the semiconductor chip 6, their ends 8 Terminal pads (not shown) are placed on the mounting surface 2 of the circuit board 3 and soldered there.
  • the chip carrier 5 which is produced in particular in one piece by means of a plastic casting method known per se, comprises a lower part 9, which is raised relative to the assembly plane and consequently with respect to the mounting surface 2, on which the semiconductor chip 6 is supported, and side parts 10, 10a and 11 arranged on the sides of the lower part 9 , 11a, which form the laterally closing housing walls of the pressure sensor housing.
  • the chip carrier 5 is designed in the manner shown in FIG. 1, essentially to scale, in such a way that the outer boundary surfaces 12, 13 of the chip carrier 5 facing the component surface 2 of the printed circuit board 3 continuously increase from the lower edge regions 14, 15 to the central region 16 of the chip carrier 5 Have a distance to the mounting surface 2 of the circuit board 3.
  • the outer boundary surfaces 12, 13 of the chip carrier 5, seen in cross-section, have an essentially inverted V-shaped course or roof-shaped course such that the tip of the inverted V is arranged in the center, the greatest distance at this point from the circuit board a value of about 0.1 mm to about 0.5 mm.
  • the electrode connections 7 m penetrating the chip carrier 5 and electrically connected to the semiconductor chip 6 are designed in the form of connecting legs which are led to at least two sides of the chip carrier 5 and which are bent and cut into short, rocker-shaped connecting stubs 17. Such an arrangement ensures the lowest overall height of the sensor component.
  • the bends 18 of the connecting pins are completely accommodated within the side parts 10, 11 of the chip carrier 5, which has the advantage that the dimensions of the housing are reduced again, the size of the leadframe is reduced, and, moreover, the creepage distances for corrosive media are considerably increased
  • such an arrangement enables the leadframe or the electrode connections 7 to be mechanically anchored within the housing of the component and thus an additional increase in the overall mechanical stability.
  • this can be done by means of so-called trimming and shaping tools omitted, and at the same time the specified requirements for the ground clearance to be maintained are taken into account.
  • the mounting must be carried out favorably, since a good adhesion of the Bestuckkleber ⁇ is ensured and over ", possible tolerances in the circuit board 3 with respect to deflections are balanced, and there is counteracted tension thermal and / or mechanical type, since a contact with the circuit board 3 is only given by the connecting legs.
  • a wire contacting method can be used for the electrical connection of the pressure sensor integrated on the semiconductor chip 6 or the electronic circuit associated therewith with the electrode connections 7, in which bond wires 21 are attached to the chip on metallic chip connection locations 2la and connected to the corresponding connection Electrode legs are pulled.
  • a so-called Sp der contacting can also be used for this electrical connection, in which an electrically conductive system carrier plate or a so-called lead frame is used instead of bond wires.
  • the silicon integrated on the semiconductor chip 6 pressure sensor represents a so-called piezoresistive sensor, in which a thin silicon membrane is provided in the surface of the chip 6 by methods of micromechanics, which is electrically coupled with pressure-dependent resistors, which are also in the Silicon substrate are formed and are connected in a conventional manner in a bridge circuit. Also integrated in the semiconductor chip 6 is a circuit assigned to the sensor, which serves for signal processing (amplification and correction), but also for adjustment and compensation of the sensor.
  • semiconductor pressure sensors on which the invention is based are primarily suitable for applications in which the smallest overall size is important. for example in the case of pressure measurements in the motor vehicle sector, for example in the measurement of brake pressures, tire pressures, combustion chamber pressures and the like.
  • semiconductor pressure sensors that operate on the principle of piezoresistive pressure measurement, it also those ver ⁇ are reversible addition that work with capacitive measuring principles.
  • the chip carrier 5 is designed to be open on one side on its side 22 facing away from the component surface 2 of the printed circuit board 3, and has a support means 26 on the upper edge regions 24, 25 delimiting the opening 23 for a positive mechanical, play-free Connection with a holding means of a connector (not shown in detail) which can be placed on the chip carrier 5 such that when the connector is placed on the chip carrier 5, the holding means and the support means 26 alternately engage.
  • the support means 26 of the chip carrier 5 has on its outer circumference a circumferential abutment surface 29 which supports the holding means of the connecting piece. As shown, this can be designed in the form of a circumferential groove 30 on the edge region of the chip carrier 5, into which a groove 30 Outer periphery of the connector shaped spring engages at least partially.
  • the chip carrier 5 is filled with a flowable filler 32 which completely covers the semiconductor chip 6 and which in particular represents a gel which transmits pressures to the semiconductor pressure sensor almost without delay and without errors.
  • the gel serves on the one hand to protect the sensitive pressure sensor chip 6 and the further, in particular metallic components of the electronic component, in particular the bonding wires 21, the connecting pins 7 or the leadframe, from contact with the medium 33 to be measured, and in this way one Contamination of the component by ions or other harmful components of the medium 33, or the risk of corrosion due to the medium 33 to prevent.
  • the gel 32 serves as a filling material in order to keep the dead volume between the sensor component and the attached connector as small as possible, in order to avoid falsifications or delays in the measurement of the pressure.
  • the side of the connector facing the chip carrier 5 is closed with an elastic membrane.
  • the membrane is able to pass on the pressure pulse of the medium supplied to the sensor without significant falsification or time delay, but prevents the risk of contamination of an endangered component by ions or other harmful parts of the medium.
  • the side walls 24, 25 of the chip carrier 5, which is open on one side, can furthermore be equipped with a flow stop edge 36 arranged continuously on the inside.
  • the inside of the chip carrier 5 is only filled with the gel 32 up to the level of the flow stop edge 36.
  • This flow stop edge 36 enables a defined stop of the capillary forces of the adhesive gel 32 and thus prevents an undesired rising of the gel 32 beyond the housing edges due to capillary forces.
  • the flow stop edge advantageously also enables the effective thickness of the flowable filler to be kept as small as possible in order not to worsen the undesirable influence on the measurement sensitivity of the pressure sensor with regard to the accelerations or pressures to be measured, which is known to decrease with increasing Geldicke.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Measuring Fluid Pressure (AREA)

Abstract

L'invention concerne un boîtier de composant utile pour monter en surface un composant semiconducteur sur la surface à équiper (2) d'une plaquette à circuit imprimé (3). Ledit boîtier comprend un porte-puce (5) en matériau électro-isolant avec une surface (4) approximativement plate de support de la puce sur laquelle est assujettie une puce de semiconducteur (6), de préférence pourvue d'un circuit électronique intégré, et des bornes d'électrodes (7) qui traversent le porte-puce (5), sont électriquement connectées à la puce de semiconducteur (6) et agencés de façon à permettre un montage en surface. Les surfaces extérieures de délimitation (12, 13) du porte-puce tournées vers la surface à équiper (12) de la plaquette de circuits imprimés (3) sont situées à une distance de la surface à équiper (2) de la plaquette à circuit imprimé (3) qui augmente en continu depuis la zone marginale (14, 15) vers la zone centrale (16) du porte-puce (5).
EP97931678A 1996-06-28 1997-06-27 Boitier de composant pour monter en surface un composant a semiconducteur Withdrawn EP0907965A1 (fr)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE19626082A DE19626082C2 (de) 1996-06-28 1996-06-28 Bauelementgehäuse für eine Oberflächenmontage eines Halbleiter-Bauelementes
DE19626098 1996-06-28
DE19626082 1996-06-28
DE19626098 1996-06-28
PCT/DE1997/001358 WO1998000864A1 (fr) 1996-06-28 1997-06-27 Boitier de composant pour monter en surface un composant a semiconducteur

Publications (1)

Publication Number Publication Date
EP0907965A1 true EP0907965A1 (fr) 1999-04-14

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Application Number Title Priority Date Filing Date
EP97931678A Withdrawn EP0907965A1 (fr) 1996-06-28 1997-06-27 Boitier de composant pour monter en surface un composant a semiconducteur

Country Status (4)

Country Link
US (1) US6058020A (fr)
EP (1) EP0907965A1 (fr)
JP (1) JPH11514153A (fr)
WO (1) WO1998000864A1 (fr)

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DE19844461A1 (de) 1998-09-28 2000-03-30 Siemens Ag Hanhabungs- und Montageschutz
JP3418373B2 (ja) * 2000-10-24 2003-06-23 エヌ・アール・エス・テクノロジー株式会社 弾性表面波装置及びその製造方法
EP1251592A1 (fr) * 2001-04-21 2002-10-23 Ascom AG Dispositif pour fixer et connecter des modules d'appareillage électrique
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WO2009135476A1 (fr) * 2008-05-09 2009-11-12 Conti Temic Microelectronic Gmbh Dispositif de commande comportant un cadre
US20090283137A1 (en) * 2008-05-15 2009-11-19 Steven Thomas Croft Solar-cell module with in-laminate diodes and external-connection mechanisms mounted to respective edge regions
US9059351B2 (en) 2008-11-04 2015-06-16 Apollo Precision (Fujian) Limited Integrated diode assemblies for photovoltaic modules
US8586857B2 (en) * 2008-11-04 2013-11-19 Miasole Combined diode, lead assembly incorporating an expansion joint
JP2010190706A (ja) * 2009-02-18 2010-09-02 Panasonic Corp 慣性力センサ
DE102009001969A1 (de) * 2009-03-30 2010-10-07 Robert Bosch Gmbh Sensormodul
US8203200B2 (en) * 2009-11-25 2012-06-19 Miasole Diode leadframe for solar module assembly
JP5742323B2 (ja) * 2011-03-14 2015-07-01 オムロン株式会社 センサパッケージ
DE102013226066A1 (de) * 2013-12-16 2015-06-18 Siemens Aktiengesellschaft Planartransformator und elektrisches Bauteil
US20150342069A1 (en) * 2014-05-20 2015-11-26 Freescale Semiconductor, Inc. Housing for electronic devices
JP6359049B2 (ja) * 2016-05-09 2018-07-18 Ｎｉｓｓｈａ株式会社 ガスセンサデバイス及びその製造方法
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Also Published As

Publication number Publication date
US6058020A (en) 2000-05-02
JPH11514153A (ja) 1999-11-30
WO1998000864A1 (fr) 1998-01-08

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