EP0816965B1 - Générateur de tension de référence régulée en fonction de la température - Google Patents
Générateur de tension de référence régulée en fonction de la température Download PDFInfo
- Publication number
- EP0816965B1 EP0816965B1 EP97201850A EP97201850A EP0816965B1 EP 0816965 B1 EP0816965 B1 EP 0816965B1 EP 97201850 A EP97201850 A EP 97201850A EP 97201850 A EP97201850 A EP 97201850A EP 0816965 B1 EP0816965 B1 EP 0816965B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor
- base
- current mirror
- current
- bases
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010586 diagram Methods 0.000 description 5
- 230000001105 regulatory effect Effects 0.000 description 3
- 239000007858 starting material Substances 0.000 description 3
- 230000033228 biological regulation Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000037213 diet Effects 0.000 description 1
- 235000005911 diet Nutrition 0.000 description 1
- 230000003503 early effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
Definitions
- Such a generator is described in the European patent having for registration number 94 203 440.6.
- This generator has in particular function to provide on the basis of the first and second transistors a voltage whose value does not vary depending on the temperature.
- the object of the present invention is to remedy this disadvantage by proposing a voltage generator in which the collector voltages of the first and second transistors are made equal, without resorting to a complex structure.
- a reference voltage generator is characterized in that it comprises, inserted between the first and second transistors and the current sources, a fourth and fifth transistors whose bases are connected together at the base of the third transistor, whose emitters are connected respectively to the collectors of the first and second transistors and whose collectors are each connected to one of the current sources.
- each of the collectors of the first and second transistor is at a lower potential of a Vbe at the base voltage of the third transistor.
- each of the bases of the first and second transistors is also at a potential one Vbe lower than the base voltage of the third transistor. It shows that the first and second transistors both work under zero collector-emitter voltage, which is a point of particularly stable operation.
- a variant of the invention presents a generator of reference voltage as described above, characterized in that it has first, second and third current mirrors, each of them having first and second branches and one feeding point, the first branches of the first and second current mirror being respectively connected to the collectors of the fourth and fifth transistors, the supply points of the first and second current mirror being connected to the second terminal supply, the second branches of the first and second mirrors of current being respectively connected to the first and second branches of the third current mirror including the power point is connected to the first power supply terminal, the bases of the first, second and third transistors being connected together to one of branches of the third current mirror.
- Such a structure ensures equality of currents passing through the first and second transistors which is necessary to good regulation of the output voltage depending on the temperature.
- this structure being very simple, the tension power supply of such a generator can take low values, of the order of 2 Volts.
- Another variant of the invention presents a generator reference voltage as described above, characterized in that it includes, inserted between that of the branches of the first or second current mirror which is not connected to the base of the third transistor, and that of the branches of the third current mirror which is not connected to the base of the third transistor, a sixth transistor whose base is connected to the emitter of the third transistor.
- the potentials of second current branches of the first and second mirrors of current are identical, both being equal to the output voltage to which is added a Vbe, which further improves the identity of currents flowing through the first and second transistors.
- the third current mirror has a seventh, an eighth, a ninth and a tenth transistor, the basics of the seventh and eighth transistors being connected to their respective collectors and at the bases of the ninth and tenth transistors, the emitters of the seventh and ninth transistors being connected respectively to collectors of the eighth and tenth transistors, including the transmitters are connected together and form the feeding point of the third current mirror, seventh and ninth collectors transistors respectively forming the first and second branches of the third current mirror, the second branch of the third current mirror being connected to the base of the third transistor.
- This structure of the third current mirror makes it possible to partially compensate for the currents drawn from its second branch.
- a generator as described above, characterized in that it comprises a module of startup allowing him to quickly evolve towards a diet stabilized after switching on, module comprising an eleventh and a twelfth transistor mounted in differential pair, the collector the eleventh transistor being connected to the positive supply terminal, the base of the eleventh transistor being connected to the bases of the third, fourth and fifth transistors, the collector of the twelfth transistor being connected to the first branch of that of the first or second current mirror, the second branch of which is connected to the base of the third transistor, the base of the twelfth transistor receiving a voltage of nominal value fixed lower than the voltage which is present at the bases of the third, fourth and fifth transistors when the generator is operating in steady state.
- Such a starter module ensures rapid stabilization generator after power up.
- the transistors T1 and T2 are therefore both polarized at an operating point particularly stable.
- Figure 2 presents a block diagram describing a voltage generator according to a variant of the invention, which comprises first, second and third current mirrors (M1, M2, and M3), each of them having first and second branches and a feeding point.
- the first branches of the first and second current mirror (M1, M2) are respectively connected to collectors of the fourth and fifth transistors (T4, T5).
- the supply points of the first and second current mirrors (M1, M2) are connected to the second VCC supply terminal.
- the second branches of the first and second current mirrors (M1, M2) are connected respectively to the first and second branches of the third M3 current mirror whose power point is connected to the first GND supply terminal.
- the basics of first, second and third transistors (T1, T2 and T3) are connected together to the second branch of the third current mirror M3.
- Such a structure ensures equality of currents passing through the first and second transistors (T1, T2) which is necessary for proper regulation of the output voltage Vbg in temperature function.
- Figure 3 presents a block diagram describing a voltage generator according to a preferred embodiment of the invention, which comprises, inserted between the second branch of the first current mirror M1 and the first branch of the third mirror of current M3, a sixth transistor T6 of PNP type whose base is connected to the emitter of the third transistor T3.
- the potential of the second branch of the first mirror of current M1 is equal to Vbg + Vbe (T6), while the potential of the second branch of the second current mirror M2 is equal to Vbg + Vbe (T3).
- the values of the voltages Vbe of the different transistors are very close to each other. Thanks to this additional transistor T6, the potentials of the second branches of current of the first and second current mirrors (M1, M2) are therefore identical, which further improves the identity of the currents traversing the first and second transistors (T1, T2).
- the third current mirror M3 comprises a seventh, an eighth, a ninth and a tenth transistor (T7, T8, T9 and T10).
- the basics seventh and eighth transistors (T7, T8) are connected to their respective collectors and bases of the ninth and tenth transistors (T9, T10).
- the transmitters of the seventh and ninth transistors (T7, T9) are respectively connected to the collectors of the eighth and tenth transistors (T8, T10), the emitters of which are connected together and form the feeding point of the third mirror current M3.
- the collectors of the seventh and ninth transistors (T7, T9) respectively form the first and second branches of the third current mirror M3.
- the second branch of the third current mirror is connected to the base of the third transistor T3.
- the current entering the second branch of the mirror current M3 is cut off from the base currents of the third, fourth and fifth transistors.
- the asymmetrical structure of the current mirror M3 described above compensates for these losses, because the currents basic transistors contained in the current mirror M3 are taken from the current entering the first branch, restoring thus the symmetry between the two incoming currents, and improving the identity of the currents flowing through the first and second transistors that result from reflections of currents entering the current mirror M3 from mirrors M1 and M2.
- Mirrors of current M1 and M2 are constituted here respectively by the transistors T13, T14 and T15, T16, all four of PNP type.
- the minimum supply voltage VCC which is for example equal to Vbg + Vbe (T4) -Vce sat (T13), with Vbe (T14) and Vce sat (T13) respectively of the order of 0.6V and 0.2V will therefore be close to 2V, which allows the generator to consume little energy, and makes it particularly suitable for uses in portable devices, such as cordless phones.
- the voltage generator shown in Figure 3 also includes an MD starter module allowing it to evolve quickly to a stabilized speed after powering up.
- This MD module includes an eleventh and a twelfth transistor (T11, T12), both NPN type, mounted in differential pair.
- the collector of the eleventh transistor T11 is connected to the second supply terminal VCC, its base being connected to the bases of the third, fourth and fifth transistors (T3, T4, T5).
- the collector of the twelfth transistor T12 is connected to the first branch of the second mirror of current M2, its base being connected, via a resistor R0 at the second VCC supply terminal.
- the basis of the twelfth transistor T12 is further connected to the base of a seventeenth transistor T17, NPN type, diode mounted, the emitter of which is connected via an eighteenth transistor T18, of the NPN type, at the first GND supply terminal.
- the eighteenth transistor T18 is mounted in current mirror with a nineteenth transistor T19, of NPN type, whose collector is connected to the transmitters of the eleventh and twelfth transistors (T11, T12).
- Resistor R0 outputs a current fixed I0, whose value is (VCC-2.Vbe) / R0. This current is reproduced by the current mirror (T18, T19) and thus polarizes the pair differential (T11, T12).
- the base of the third transistor is in permanence at a potential equal to 2.Vbe.
- the voltage of Vbg output of the generator is zero.
- the voltage applied to the base of the eleventh transistor T11 is therefore much less than 2.Vbe, and the twelfth transistor T12 conducts current I0.
- This current is reproduced by the M2 mirror, and allows the conduction of the third transistor T3, which then conducts a current to the load resistance RL, thereby increasing the output voltage Vbg.
- the current 10 reproduced by the mirror M2 also allows the setting in conduction of the fourth and fifth transistors (T4, T5) while the current I0, successively reflected by the mirrors M3 and M2 is sent to the first transistor T1.
- the base of the eleventh transistor T11 is at a potential whose value is of the order of Vbg + Vbe.
- Voltage regulated Vbg itself being of the order of 2.Vbe, the applied potential at the base of the eleventh transistor T11 is then greater than 2.Vbe, which is the potential applied to the base of the twelfth transistor T12. This one hangs, thus separating the MD starter module from the rest of the generator.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
- Amplifiers (AREA)
Description
- un premier et un deuxième transistors, dont les bases sont reliées ensemble et forment la borne de sortie du générateur, l'émetteur du premier transistor étant relié via une première résistance à l'émetteur du deuxième transistor, lequel est en outre relié via une deuxième résistance à une première borne d'alimentation, les collecteurs des premier et deuxième transistors étant reliés à deux sources de courant de valeurs nominales égales,
- un troisième transistor dont la base est reliée à l'une des sources de courant, le collecteur à une deuxième borne d'alimentation et l'émetteur aux bases des premier et deuxième transistors, ainsi qu'à la borne négative d'alimentation via une résistance de charge.
- la figure 1 présente un schéma fonctionnel décrivant un générateur de tension selon l'invention,
- la figure 2 présente un schéma fonctionnel décrivant un générateur de tension selon une variante de l'invention, et
- la figure 3 présente un schéma fonctionnel décrivant un générateur de tension selon un mode de réalisation préféré de l'invention.
- un premier et un deuxième transistors (T1, T2), tous deux de type NPN, dont les bases sont reliées ensemble et forment la borne de sortie du générateur, l'émetteur du premier transistor T1 étant relié via une première résistance R1 à l'émetteur du deuxième transistor T2, lequel est en outre relié via une deuxième résistance R2 à une première borne d'alimentation GND, les collecteurs des premier et deuxième transistors (T1, T2) étant reliés à deux sources de courant de valeurs nominales égales (I1, I2),
- un troisième transistor T3, de type NPN, dont la base est reliée à la source de courant I2, le collecteur à une deuxième borne d'alimentation VCC et l'émetteur aux bases des premier et deuxième transistors (T1, T2), ainsi qu'à la borne négative d'alimentation GND via une résistance de charge RL. Ce générateur comporte en outre, insérés entre les premier et deuxième transistors (T1, T2) et les sources de courant (I1, I2), un quatrième et un cinquième transistors (T4, T5), tous deux de type NPN, dont les bases sont reliées ensemble à la base du troisième transistor T3. Leurs émetteurs sont reliés respectivement aux collecteurs des premier et deuxième transistors (T1, T2). Leurs collecteurs sont reliés chacun à une des sources de courant (I1, I2).
Claims (5)
- Générateur de tension de référence fournissant sur une borne de sortie une tension de sortie régulée, comprenant :un premier et un deuxième transistors, dont les bases sont reliées ensemble et forment la borne de sortie du générateur, l'émetteur du premier transistor étant relié via une première résistance à l'émetteur du deuxième transistor, lequel est en outre relié via une deuxième résistance à une première borne d'alimentation, les collecteurs des premier et deuxième transistors étant reliés à deux sources de courant de valeurs nominales égales,un troisième transistor dont la base est reliée à l'une des sources de courant, le collecteur à une deuxième borne d'alimentation et l'émetteur aux bases des premier et deuxième transistors, ainsi qu'à la borne négative d'alimentation via une résistance de charge,
- Générateur de tension de référence selon la revendication 1, caractérisé en ce qu'il comporte un premier, un deuxième et un troisième miroirs de courant, chacun d'eux présentant une première et une deuxième branches et un point d'alimentation, les premières branches des premier et deuxième miroir de courant étant reliées respectivement aux collecteurs des quatrième et cinquième transistors, les points d'alimentation des premier et deuxième miroir de courant étant reliés à la deuxième borne d'alimentation, les deuxièmes branches des premier et deuxième miroirs de courant étant respectivement reliées aux première et deuxième branches du troisième miroir de courant dont le point d'alimentation est relié à la première borne d'alimentation, les bases des premier, deuxième et troisième transistors étant reliées ensemble à l'une des branches du troisième miroir de courant.
- Générateur de tension de référence selon la revendication 2, caractérisé en ce qu'il comporte, inséré entre celle des branches du premier ou deuxième miroir de courant qui n'est pas reliée à la base du troisième transistor, et celle des branches du troisième miroir de courant qui n'est pas reliée à la base du troisième transistor, un sixième transistor dont la base est reliée à l'émetteur du troisième transistor.
- Générateur de tension de référence selon l'une des revendications 2 ou 3, caractérisé en ce que le troisième miroir de courant comporte un septième, un huitième, un neuvième et un dixième transistor, les bases des septième et huitième transistors étant reliées à leurs collecteurs respectifs et aux bases des neuvième et dixième transistors, les émetteurs des septième et neuvième transistors étant reliés respectivement aux collecteurs des huitième et dixième transistors, dont les émetteurs sont reliés ensemble et forment le point d'alimentation du troisième miroir de courant, les collecteurs des septième et neuvième transistors formant respectivement les première et deuxième branches du troisième miroir de courant, la deuxième branche du troisième miroir de courant étant reliée à la base du troisième transistor.
- Générateur selon l'une des revendications 2 à 4, caractérisé en ce qu'il comprend un module de démarrage lui permettant d'évoluer rapidement vers un régime stabilisé après sa mise sous tension, module comportant un onzième et un douzième transistors montés en paire différentielle, le collecteur du onzième transistor étant relié à la deuxième borne d'alimentation, la base du onzième transistor étant reliée aux bases des troisième, quatrième et cinquième transistors, le collecteur du douzième transistor étant relié à la première branche de celui des premier ou deuxième miroir de courant dont la deuxième branche est reliée à la base du troisième transistor, la base du douzième transistor recevant une tension de valeur nominale fixée inférieure à la tension qui est présente aux bases des troisième, quatrième et cinquième transistors lorsque le générateur fonctionne en régime établi.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9607941 | 1996-06-26 | ||
FR9607941A FR2750515A1 (fr) | 1996-06-26 | 1996-06-26 | Generateur de tension de reference regulee en fonction de la temperature |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0816965A1 EP0816965A1 (fr) | 1998-01-07 |
EP0816965B1 true EP0816965B1 (fr) | 2001-10-17 |
Family
ID=9493434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP97201850A Expired - Lifetime EP0816965B1 (fr) | 1996-06-26 | 1997-06-17 | Générateur de tension de référence régulée en fonction de la température |
Country Status (7)
Country | Link |
---|---|
US (1) | US5783937A (fr) |
EP (1) | EP0816965B1 (fr) |
JP (1) | JPH1084227A (fr) |
KR (1) | KR980006844A (fr) |
CN (1) | CN1170279A (fr) |
DE (1) | DE69707368T2 (fr) |
FR (1) | FR2750515A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3828662B1 (fr) * | 2019-11-29 | 2023-01-18 | STMicroelectronics S.r.l. | Circuit de référence de bande interdite, dispositif et procédé correspondants |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6037833A (en) * | 1997-11-10 | 2000-03-14 | Philips Electronics North America Corporation | Generator for generating voltage proportional to absolute temperature |
DE60110758D1 (de) * | 2001-06-01 | 2005-06-16 | Sgs Thomson Microelectronics | Stromquelle |
US9086358B2 (en) | 2013-03-15 | 2015-07-21 | Foresite, Inc. | Test cell |
CN103760944B (zh) * | 2014-02-10 | 2016-04-06 | 绍兴光大芯业微电子有限公司 | 实现基极电流补偿的无运放内部电源结构 |
CN112162577B (zh) * | 2020-09-25 | 2021-06-22 | 上海联影医疗科技股份有限公司 | 磁共振设备温度控制电路、系统和方法 |
CN114020085B (zh) * | 2021-10-18 | 2023-10-27 | 杭州中科微电子有限公司 | 一种多路输出的基准电压产生电路 |
CN115390611B (zh) * | 2022-09-13 | 2024-01-23 | 思瑞浦微电子科技(苏州)股份有限公司 | 带隙基准电路、基极电流补偿方法及芯片 |
CN115407821B (zh) * | 2022-11-01 | 2023-03-24 | 苏州贝克微电子股份有限公司 | 一种抗干扰能力强的电路 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4396883A (en) * | 1981-12-23 | 1983-08-02 | International Business Machines Corporation | Bandgap reference voltage generator |
GB2218544B (en) * | 1988-05-13 | 1992-05-06 | Plessey Co Plc | Bandgap startup circuit |
GB2236444A (en) * | 1989-09-27 | 1991-04-03 | Motorola Inc | Current mirror |
DE4312117C1 (de) * | 1993-04-14 | 1994-04-14 | Texas Instruments Deutschland | Bandabstands-Referenzspannungsquelle |
BE1007853A3 (nl) * | 1993-12-03 | 1995-11-07 | Philips Electronics Nv | Bandgapreferentiestroombron met compensatie voor spreiding in saturatiestroom van bipolaire transistors. |
-
1996
- 1996-06-26 FR FR9607941A patent/FR2750515A1/fr not_active Withdrawn
-
1997
- 1997-06-17 EP EP97201850A patent/EP0816965B1/fr not_active Expired - Lifetime
- 1997-06-17 DE DE69707368T patent/DE69707368T2/de not_active Expired - Fee Related
- 1997-06-24 US US08/881,349 patent/US5783937A/en not_active Expired - Fee Related
- 1997-06-26 JP JP9170544A patent/JPH1084227A/ja active Pending
- 1997-06-26 CN CN97113883A patent/CN1170279A/zh active Pending
- 1997-06-26 KR KR1019970031025A patent/KR980006844A/ko not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3828662B1 (fr) * | 2019-11-29 | 2023-01-18 | STMicroelectronics S.r.l. | Circuit de référence de bande interdite, dispositif et procédé correspondants |
Also Published As
Publication number | Publication date |
---|---|
KR980006844A (ko) | 1998-03-30 |
US5783937A (en) | 1998-07-21 |
DE69707368D1 (de) | 2001-11-22 |
FR2750515A1 (fr) | 1998-01-02 |
DE69707368T2 (de) | 2002-06-27 |
EP0816965A1 (fr) | 1998-01-07 |
CN1170279A (zh) | 1998-01-14 |
JPH1084227A (ja) | 1998-03-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0838745B1 (fr) | Régulateur de tension à sélection automatique d'une tension d'alimentation la plus élevée | |
EP0816965B1 (fr) | Générateur de tension de référence régulée en fonction de la température | |
CH697322B1 (fr) | Procédé de génération d'un courant sensiblement indépendent de la température et dispositif permettant de mettre en oeuvre ce procédé. | |
EP0649079B1 (fr) | Circuit générateur de tension stabilisée du type bandgap | |
FR2724072A1 (fr) | Etage amplificateur de puissance, de type suiveur. | |
EP0052040B1 (fr) | Amplificateur intégré en classe AB en technologie CMOS | |
FR2546687A1 (fr) | Circuit miroir de courant | |
EP0159233B1 (fr) | Circuit de commande de commutation d'un transistor de puissance | |
FR2470485A1 (fr) | Amplificateurs equilibres de classe ab | |
EP0219158B1 (fr) | Circuit régulateur de tension | |
EP0163332A1 (fr) | Relais statique pour courant continu | |
EP0479377B1 (fr) | Source de courant à rapport donné entre courant de sortie et d'entrée | |
EP0292071A1 (fr) | Miroir de courant à tension de sortie élevée | |
EP0230176A1 (fr) | Relais statique et application de ce relais à un inverseur bipolaire ou à un circuit dans lequel circule un courant de sens quelconque | |
EP0354098A1 (fr) | Circuit de commande de variation de puissance avec plusieurs transistors de puissance en parallèle | |
EP1102148B1 (fr) | Dispositif générateur de tension corrigé à basse température. | |
FR2688361A1 (fr) | Etage de sortie push-pull pour amplificateur en circuit integre. | |
EP0886382A1 (fr) | Convertisseur analogique/numérique. | |
FR2733101A1 (fr) | Circuit logique de type a emetteurs couples, fonctionnant sous une faible tension d'alimentation | |
JP2541003B2 (ja) | サンプルホ―ルド回路 | |
EP0242304B1 (fr) | Amplificateur suiveur à grande vitesse | |
EP0700162A1 (fr) | Circuit logique à étages différentiels | |
JP3073619B2 (ja) | サンプルホールド回路 | |
EP0164770A1 (fr) | Relais statique pour courant continu basse tension | |
FR2640094A1 (fr) | Amplificateur du type cascode |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB IT NL |
|
17P | Request for examination filed |
Effective date: 19980707 |
|
AKX | Designation fees paid |
Free format text: DE FR GB IT NL |
|
RBV | Designated contracting states (corrected) |
Designated state(s): DE FR GB IT NL |
|
GRAG | Despatch of communication of intention to grant |
Free format text: ORIGINAL CODE: EPIDOS AGRA |
|
17Q | First examination report despatched |
Effective date: 20001207 |
|
GRAG | Despatch of communication of intention to grant |
Free format text: ORIGINAL CODE: EPIDOS AGRA |
|
GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB IT NL |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20011017 Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED. Effective date: 20011017 |
|
REF | Corresponds to: |
Ref document number: 69707368 Country of ref document: DE Date of ref document: 20011122 |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: IF02 |
|
GBT | Gb: translation of ep patent filed (gb section 77(6)(a)/1977) |
Effective date: 20011228 |
|
NLV1 | Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act | ||
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20020617 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed | ||
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20030101 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20020617 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20030228 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST |