EP0665560A2 - Dispositif à circuit intégré hybride - Google Patents

Dispositif à circuit intégré hybride Download PDF

Info

Publication number
EP0665560A2
EP0665560A2 EP94119166A EP94119166A EP0665560A2 EP 0665560 A2 EP0665560 A2 EP 0665560A2 EP 94119166 A EP94119166 A EP 94119166A EP 94119166 A EP94119166 A EP 94119166A EP 0665560 A2 EP0665560 A2 EP 0665560A2
Authority
EP
European Patent Office
Prior art keywords
arrangement according
circuit carrier
circuit arrangement
ceramic
ceramic strip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP94119166A
Other languages
German (de)
English (en)
Other versions
EP0665560B1 (fr
EP0665560A3 (fr
Inventor
Karl-Gerd Dipl.-Ing. Drekmeier (Fh)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TE Connectivity Solutions GmbH
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0665560A2 publication Critical patent/EP0665560A2/fr
Publication of EP0665560A3 publication Critical patent/EP0665560A3/fr
Application granted granted Critical
Publication of EP0665560B1 publication Critical patent/EP0665560B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/01—Mounting; Supporting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/08—Cooling, heating or ventilating arrangements
    • H01C1/084—Cooling, heating or ventilating arrangements using self-cooling, e.g. fins, heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the invention relates to a hybrid circuit arrangement with a resistance layer applied at least on one side to a plate-shaped circuit carrier made of glass or ceramic.
  • Electrical circuits with integrated resistors which are used, for example, as series resistors in public telephone exchanges, are usually manufactured using thick-film or thin-film technology. In practice, such layer circuits should be able to withstand short-term large electrical outputs, such as occur in connection with network faults.
  • the object of the present invention is to create a hybrid circuit arrangement of the type mentioned at the outset which has a considerably increased short-term load and which additionally prevents fragmentation, even under higher loads.
  • this is achieved in that a ceramic strip of at least almost the same size surface is attached in a good heat-conducting manner on at least one side of the circuit carrier (substrate).
  • a ceramic strip made of the same material and with approximately the same thickness and glued onto the back of an Al2O3 circuit carrier of 1 mm thickness succeeds in almost doubling the short-term load of the layer circuit without changing the actual circuit. While the primary function of the ceramic strip is to provide additional heat capacity, the thermal expansion behavior similar to that of the circuit carrier must also be taken into account when selecting the material. In addition, the function of a heat sink in the short-term range can only be fulfilled by ceramic materials with high thermal conductivity. In order to avoid breakdowns, the insulation properties must also be observed. Attempts to increase the heat capacity directly by increasing the thickness of the circuit carrier itself have only been successful within narrow limits, since processing difficulties, for example through-contacting, occurred as part of the standard layer technology.
  • FIG. 7 shows the load capacity of a known circuit carrier in comparison with a circuit carrier provided according to the invention with a ceramic strip as a function of the Time shown. What is important for the application is above all the large difference in the short-term range, that is to say at about 0.1 sec. An even higher load then leads to the interruption of the conductor tracks or layer resistances due to cracks in the layers or in the circuit carrier. However, the ceramic strip holding the torn circuit carrier together from at least one side prevents the formation of fragments.
  • circuit carrier 1 shows a circuit carrier 1 with, for example, film resistors 2 applied on both sides, which may be full-surface or meandered.
  • the two layer sides are connected via plated-through holes 3.
  • the external connection 4 is designed in a single-in-line (SIL) version.
  • a ceramic strip 6 of circuit carrier thickness is fastened on the back with a heat-conducting adhesive 5.
  • the embodiment shown in FIG. 1, which corresponds to the diagram in FIG. 7, is particularly cost-effective.
  • the short-term load can be further improved by making the ceramic strip 6 thicker and / or consisting of beryllium oxide or aluminum nitride ceramic.
  • FIG. 2 shows an embodiment with a dual-in-line connection version 7 and an additional contact changeover through a connection comb 8.
  • the backside ceramic 6 is considerably thicker than the circuit carrier 1 and also somewhat smaller than this, so that the circuit carrier 1 projects with its edge region beyond the surface of the ceramic strip 6 and can be contacted there by means of the connecting combs 8.
  • a thermal fuse 10 is shown, which interrupts the electrical voltage of the circuit arrangement when the long-term load is too great.
  • the thermal fuse 10 is designed in a manner known per se so that the previously treated network faults are too short to cause the fuse to melt or unsolder.
  • the thermal fuse 10 is designed in such a way that it triggers with a long-term load of approximately 600 V and electrically interrupts the circuit arrangement.
  • FIG. 3 shows a SIL design with heat-relief ceramic strips 6 applied on both sides.
  • SIL design with heat-relief ceramic strips 6 applied on both sides.
  • FIG. 4 shows a further increase in the short-term load capacity is possible, a recess in the respective ceramic strip 6 being provided for a possible thermal fuse.
  • FIG. 4 Another embodiment of the invention is shown in FIG. 4.
  • the ceramic strip 6 is at most 0.5, but preferably only about 0.1 mm thick. However, it is supplemented by a metal profile, for example made of copper or aluminum, which is fastened in a well heat-conducting manner on its side facing away from the circuit carrier 1.
  • FIGS. 5 and 6 each show the configuration of the external connections 4 as a known, technically advantageous stand aid, as can be used in all configurations of the invention.
  • FIG. 5 shows a resistance layer 2 applied flat between conductor tracks 11 and 12 extending parallel to the longitudinal direction of the circuit carrier 1, the connection surfaces 13 for the external connections 4 being arranged on a longitudinal side of the circuit carrier 1.
  • the contacting of the sheet resistors 2 shown at the connection 13 and opposite 14 is advantageous since the circuit 15 is deliberately interrupted when the circuit carrier 1 breaks due to a too high short-term load, which causes an immediate shutdown of the thermal or electrical overload for the module.
  • FIG. 6 shows an embodiment in which the resistance layer 2 is meandered and has diversions 16 with considerably lower surface resistance on the curves. This serves to ensure the necessary surge voltage resistance of more than 1 kV.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Liquid Developers In Electrophotography (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
  • Structure Of Printed Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
EP94119166A 1993-12-17 1994-12-05 Dispositif à circuit intégré hybride Expired - Lifetime EP0665560B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE9319473U 1993-12-17
DE9319473U DE9319473U1 (de) 1993-12-17 1993-12-17 Hybridschaltungsanordnung

Publications (3)

Publication Number Publication Date
EP0665560A2 true EP0665560A2 (fr) 1995-08-02
EP0665560A3 EP0665560A3 (fr) 1997-05-02
EP0665560B1 EP0665560B1 (fr) 2000-04-05

Family

ID=6902186

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94119166A Expired - Lifetime EP0665560B1 (fr) 1993-12-17 1994-12-05 Dispositif à circuit intégré hybride

Country Status (4)

Country Link
US (1) US5581227A (fr)
EP (1) EP0665560B1 (fr)
AT (1) ATE191581T1 (fr)
DE (2) DE9319473U1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5914648A (en) * 1995-03-07 1999-06-22 Caddock Electronics, Inc. Fault current fusing resistor and method

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002507329A (ja) 1997-07-01 2002-03-05 シーメンス アクチエンゲゼルシヤフト 過負荷保護回路機能付きハイブリッド回路装置
DE19814445C1 (de) * 1998-03-31 1999-06-24 Siemens Ag Hybridschaltungsanordnung mit Thermosicherung
US6404324B1 (en) * 1999-09-07 2002-06-11 General Motors Corporation Resistive component for use with short duration, high-magnitude currents

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4297670A (en) * 1977-06-03 1981-10-27 Angstrohm Precision, Inc. Metal foil resistor
EP0048938A1 (fr) * 1980-09-25 1982-04-07 Siemens Aktiengesellschaft Circuit module "single-in-line" sans boîtier enfichable verticalement
US4494104A (en) * 1983-07-18 1985-01-15 Northern Telecom Limited Thermal Fuse
EP0185244A1 (fr) * 1984-12-07 1986-06-25 TELEFUNKEN electronic GmbH Composant de puissance électrique
US4719443A (en) * 1986-04-03 1988-01-12 General Electric Company Low capacitance power resistor using beryllia dielectric heat sink layer and low toxicity method for its manufacture
EP0465812A1 (fr) * 1990-07-09 1992-01-15 International Business Machines Corporation Assemblage électronique avec évacuation de la chaleur améliorée
EP0508615A1 (fr) * 1991-04-10 1992-10-14 Caddock Electronics, Inc. Résistance en couche
DE4234022A1 (de) * 1992-10-09 1994-04-14 Telefunken Microelectron Schichtschaltung mit mindestens einem Leistungswiderstand

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3792383A (en) * 1971-06-21 1974-02-12 Motorola Inc Hybrid strip transmission line circuitry and method of making same
US3766440A (en) * 1972-08-11 1973-10-16 Gen Motors Corp Ceramic integrated circuit convector assembly
DE3837974A1 (de) * 1988-11-09 1990-05-10 Telefunken Electronic Gmbh Elektronisches steuergeraet
US5254969A (en) * 1991-04-02 1993-10-19 Caddock Electronics, Inc. Resistor combination and method
US5304977A (en) * 1991-09-12 1994-04-19 Caddock Electronics, Inc. Film-type power resistor combination with anchored exposed substrate/heatsink

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4297670A (en) * 1977-06-03 1981-10-27 Angstrohm Precision, Inc. Metal foil resistor
EP0048938A1 (fr) * 1980-09-25 1982-04-07 Siemens Aktiengesellschaft Circuit module "single-in-line" sans boîtier enfichable verticalement
US4494104A (en) * 1983-07-18 1985-01-15 Northern Telecom Limited Thermal Fuse
EP0185244A1 (fr) * 1984-12-07 1986-06-25 TELEFUNKEN electronic GmbH Composant de puissance électrique
US4719443A (en) * 1986-04-03 1988-01-12 General Electric Company Low capacitance power resistor using beryllia dielectric heat sink layer and low toxicity method for its manufacture
EP0465812A1 (fr) * 1990-07-09 1992-01-15 International Business Machines Corporation Assemblage électronique avec évacuation de la chaleur améliorée
EP0508615A1 (fr) * 1991-04-10 1992-10-14 Caddock Electronics, Inc. Résistance en couche
DE4234022A1 (de) * 1992-10-09 1994-04-14 Telefunken Microelectron Schichtschaltung mit mindestens einem Leistungswiderstand

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5914648A (en) * 1995-03-07 1999-06-22 Caddock Electronics, Inc. Fault current fusing resistor and method
US6253446B1 (en) 1995-03-07 2001-07-03 Richard E. Caddock, Jr. Fault current fusing resistor and method

Also Published As

Publication number Publication date
EP0665560B1 (fr) 2000-04-05
DE9319473U1 (de) 1994-06-23
DE59409274D1 (de) 2000-05-11
ATE191581T1 (de) 2000-04-15
EP0665560A3 (fr) 1997-05-02
US5581227A (en) 1996-12-03

Similar Documents

Publication Publication Date Title
DE3221199C2 (fr)
EP0920055B1 (fr) Dispositif de refroidissement pour un composant générant de la chaleur sur un circuit imprimé
DE69633848T2 (de) Leiterplattenfunkenstrecke
DE10238037B4 (de) Halbleitereinrichtung mit Gehäuse und Halterung
DE2822802A1 (de) Elektrische schmelzsicherung
DE19843309A1 (de) Kurzschlussfestes IGBT Modul
DE19631477A1 (de) In Hybridtechnik hergestellte abgleichbare Spannungsteiler-Anordnung
WO2002103735A1 (fr) Composant de fusible
DE3315583A1 (de) Ein elektrisches bauteil tragendes, gut kuehlbares schaltungsmodul
CH663491A5 (en) Electronic circuit module
DE69702719T2 (de) Elektrische sicherung
DE2109760C2 (de) Elektrische Sicherung
DE10158185B4 (de) Leistungshalbleitermodul mit hoher Isolationsfestigkeit
DE102004059389B4 (de) Halbleiterbauelement mit Ausgleichsmetallisierung
EP0665560B1 (fr) Dispositif à circuit intégré hybride
EP1101248A2 (fr) Substrat de modules haute tension
EP0459283A1 (fr) Composant semi-conducteur fixé sur un support céramique
DE69024031T2 (de) Hochleistungshalbleiterbauelement.
EP0555668B1 (fr) Plaquette à circuit imprimé pour un circuit électronique de puissance contenant des semiconducteurs à grande puissance
WO2015135010A1 (fr) Agencement de composants électriques
EP0772217A1 (fr) Fusible de surintensité
DE3931634A1 (de) Halbleiterbauelement
DE3837920A1 (de) Halbleiterelement
DE4206365C1 (fr)
DE102021117573B4 (de) Verfahren zur Herstellung einer elektrischen Verbindung zu einem elektronischen Bauteil und einer Chip-Baugruppe

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT CH DE FR GB IT LI SE

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

RHK1 Main classification (correction)

Ipc: H01C 1/01

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT CH DE FR GB IT LI SE

17P Request for examination filed

Effective date: 19970617

17Q First examination report despatched

Effective date: 19971024

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT CH DE FR GB IT LI SE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRE;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED.SCRIBED TIME-LIMIT

Effective date: 20000405

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: TYCO ELECTRONICS LOGISTICS AG

REF Corresponds to:

Ref document number: 191581

Country of ref document: AT

Date of ref document: 20000415

Kind code of ref document: T

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REF Corresponds to:

Ref document number: 59409274

Country of ref document: DE

Date of ref document: 20000511

ET Fr: translation filed
GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 20000607

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20000705

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: AT

Payment date: 20011105

Year of fee payment: 8

REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: CH

Payment date: 20020103

Year of fee payment: 8

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20021205

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20021231

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20021231

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20071227

Year of fee payment: 14

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20080131

Year of fee payment: 14

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20071217

Year of fee payment: 14

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20081205

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20090831

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20090701

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20081205

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20081231