EP0616429A1 - Procédé et circuit pour générer d'une séquence pseudo-aléatoire et leur utilisation - Google Patents

Procédé et circuit pour générer d'une séquence pseudo-aléatoire et leur utilisation Download PDF

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Publication number
EP0616429A1
EP0616429A1 EP94100237A EP94100237A EP0616429A1 EP 0616429 A1 EP0616429 A1 EP 0616429A1 EP 94100237 A EP94100237 A EP 94100237A EP 94100237 A EP94100237 A EP 94100237A EP 0616429 A1 EP0616429 A1 EP 0616429A1
Authority
EP
European Patent Office
Prior art keywords
shift register
output
data
circuit arrangement
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP94100237A
Other languages
German (de)
English (en)
Other versions
EP0616429B1 (fr
Inventor
Erwin Dr. Rer. Nat. Hess
Hartmut Dr. Rer. Nat. Schrenk
Günther Dipl.-Phys. Eberhard
Rainer Dr. Rueppel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0616429A1 publication Critical patent/EP0616429A1/fr
Application granted granted Critical
Publication of EP0616429B1 publication Critical patent/EP0616429B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318385—Random or pseudo-random test pattern
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • H04L9/0668—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator producing a non-linear pseudorandom sequence
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/26—Testing cryptographic entity, e.g. testing integrity of encryption key or encryption algorithm

Definitions

  • the feedback shift register device when data is encrypted, the feedback shift register device is provided with key information, i.e. a secret data word, applied. With this data word it is determined at which point of the pseudo random sequence at the output of the feedback shift register device the data stream of the pseudo random sequence begins.
  • key information i.e. a secret data word
  • the circuit arrangement according to the invention provides a feedback shift register device which has a large number of shift register cells a ... z connected in series.
  • the shift register cell on the input side is identified by the reference symbol a and the shift register cell on the output side by the reference symbol z.
  • These series-connected shift register cells a ... z are fed back via a feedback circuit R contained in EXOR gates 1 to 7.
  • seven EXOR gates 1 to 7 are provided in the feedback device R in the exemplary embodiment shown in FIG.
  • These EXOR gates 1 to 7 each have two input terminals and one output terminal, a first EXOR gate 1 having an output signal from the last shift register cell z and an output signal from the shift register cell 1 applied to it is.
  • This input signal E can be obtained, for example, from secret information, a random number as a challenge and possibly additional information (for example a data memory content).
  • the circuit arrangement according to the invention is not limited to the EXOR gate 8 shown in the figure. Rather, this EXOR gate 8 can be replaced by any logic logic.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Security & Cryptography (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Nonlinear Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Storage Device Security (AREA)
EP94100237A 1993-01-19 1994-01-10 Procédé et circuit pour générer d'une séquence pseudo-aléatoire et leur utilisation Expired - Lifetime EP0616429B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4301279 1993-01-19
DE4301279 1993-01-19

Publications (2)

Publication Number Publication Date
EP0616429A1 true EP0616429A1 (fr) 1994-09-21
EP0616429B1 EP0616429B1 (fr) 2004-03-31

Family

ID=6478474

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94100237A Expired - Lifetime EP0616429B1 (fr) 1993-01-19 1994-01-10 Procédé et circuit pour générer d'une séquence pseudo-aléatoire et leur utilisation

Country Status (4)

Country Link
EP (1) EP0616429B1 (fr)
JP (1) JP3586475B2 (fr)
DE (1) DE59410366D1 (fr)
TW (1) TW256969B (fr)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19622533A1 (de) * 1996-06-05 1997-12-11 Deutsche Telekom Ag Verfahren und Vorrichtung zum Laden von Inputdaten in einen Algorithmus bei der Authentikation
DE19717110A1 (de) * 1997-04-23 1998-10-29 Siemens Ag Schaltungsanordnung zum Erzeugen einer Pseudo-Zufallsfolge
WO1998048540A1 (fr) * 1997-04-22 1998-10-29 Deutsche Telekom Ag Procede et dispositif de codage
EP1010151A1 (fr) * 1996-05-13 2000-06-21 Micron Technology, Inc. Dispositif de transmission de donnees par radiofrequences
WO2002046912A1 (fr) * 2000-12-08 2002-06-13 Deutsche Telekom Ag Procede et dispositif pour produire une sequence pseudo-aleatoire au moyen d'un logarithme discret
US6496423B2 (en) * 2000-07-03 2002-12-17 Infineon Technologies Ag Chip ID register configuration
WO2003001735A1 (fr) * 2001-06-21 2003-01-03 Infineon Technologies Ag Authentification selon un procede « challenge-response »
US6696879B1 (en) 1996-05-13 2004-02-24 Micron Technology, Inc. Radio frequency data communications device
US6836468B1 (en) 1996-05-13 2004-12-28 Micron Technology, Inc. Radio frequency data communications device
FR2857172A1 (fr) * 2003-07-04 2005-01-07 Thales Sa Procede et dispositif de generation de nombres aleatoires fondes sur des oscillateurs chaotiques
EP1361507A3 (fr) * 1996-05-13 2005-01-19 Micron Technology, Inc. Générateur de nombres aléatoires ayant un mode d'opération à faible consommation
US10452877B2 (en) 2016-12-16 2019-10-22 Assa Abloy Ab Methods to combine and auto-configure wiegand and RS485

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI408903B (zh) * 2004-06-30 2013-09-11 Noriyoshi Tsuyuzaki 隨機脈衝產生源及半導體裝置、使用該源產生隨機數及／或機率之方法與程式
US8183980B2 (en) 2005-08-31 2012-05-22 Assa Abloy Ab Device authentication using a unidirectional protocol
EP2316180A4 (fr) 2008-08-11 2011-12-28 Assa Abloy Ab Communications par interface wiegand sécurisées

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4202051A (en) * 1977-10-03 1980-05-06 Wisconsin Alumni Research Foundation Digital data enciphering and deciphering circuit and method
EP0147716A2 (fr) * 1983-12-24 1985-07-10 ANT Nachrichtentechnik GmbH Procédé et dispositif pour la transmission chiffrable d'une suite de signaux binaires d'information avec contrôle d'authenticité

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060265A (en) * 1990-07-23 1991-10-22 Motorola, Inc. Method of protecting a linear feedback shift register (LFSR) output signal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4202051A (en) * 1977-10-03 1980-05-06 Wisconsin Alumni Research Foundation Digital data enciphering and deciphering circuit and method
EP0147716A2 (fr) * 1983-12-24 1985-07-10 ANT Nachrichtentechnik GmbH Procédé et dispositif pour la transmission chiffrable d'une suite de signaux binaires d'information avec contrôle d'authenticité

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GONG GUANG:: "Nonlinear generators of binary sequences with controllable complexity and double key", ADVANCES IN CRYPTOLOGY - AUSCRYPT '90, INTERNATIONAL CONFERENCE ON CRYPTOLOGY. PROCEEDINGS, SYDNEY, NSW, AU, 8-11 JAN. 1990, pages 32-36 *

Cited By (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6836472B2 (en) 1996-05-13 2004-12-28 Micron Technology, Inc. Radio frequency data communications device
US6771613B1 (en) 1996-05-13 2004-08-03 Micron Technology, Inc. Radio frequency data communications device
US6721289B1 (en) 1996-05-13 2004-04-13 Micron Technology, Inc. Radio frequency data communications device
US6735183B2 (en) 1996-05-13 2004-05-11 Micron Technology, Inc. Radio frequency data communications device
EP1361507A3 (fr) * 1996-05-13 2005-01-19 Micron Technology, Inc. Générateur de nombres aléatoires ayant un mode d'opération à faible consommation
EP1010151A4 (fr) * 1996-05-13 2002-03-13 Micron Technology Inc Dispositif de transmission de donnees par radiofrequences
US6696879B1 (en) 1996-05-13 2004-02-24 Micron Technology, Inc. Radio frequency data communications device
US6836468B1 (en) 1996-05-13 2004-12-28 Micron Technology, Inc. Radio frequency data communications device
US6492192B1 (en) 1996-05-13 2002-12-10 Micron Technology, Inc. Method of making a Schottky diode in an integrated circuit
US6825773B1 (en) 1996-05-13 2004-11-30 Micron Technology, Inc. Radio frequency data communications device
EP1010151A1 (fr) * 1996-05-13 2000-06-21 Micron Technology, Inc. Dispositif de transmission de donnees par radiofrequences
US6600428B1 (en) 1996-05-13 2003-07-29 Micron Technology, Inc. Radio frequency data communications device
US7113592B1 (en) 1996-06-05 2006-09-26 Deutsche Telekom Ag Method and device for loading input data into a program when performing an authentication
DE19622533A1 (de) * 1996-06-05 1997-12-11 Deutsche Telekom Ag Verfahren und Vorrichtung zum Laden von Inputdaten in einen Algorithmus bei der Authentikation
WO1998048540A1 (fr) * 1997-04-22 1998-10-29 Deutsche Telekom Ag Procede et dispositif de codage
US8156328B1 (en) 1997-04-22 2012-04-10 Deutsche Telekom Ag Encryption method and device
DE19717110A1 (de) * 1997-04-23 1998-10-29 Siemens Ag Schaltungsanordnung zum Erzeugen einer Pseudo-Zufallsfolge
DE19717110C2 (de) * 1997-04-23 2000-11-23 Siemens Ag Schaltungsanordnung zum Erzeugen einer Pseudo-Zufallsfolge
US6496423B2 (en) * 2000-07-03 2002-12-17 Infineon Technologies Ag Chip ID register configuration
DE10061315A1 (de) * 2000-12-08 2002-06-13 T Mobile Deutschland Gmbh Verfahren und Vorrichtung zum Erzeugen einer Pseudozufallsfolge
CZ304974B6 (cs) * 2000-12-08 2015-02-25 Deutsche Telekom Ag Způsob a zařízení pro generování pseudonáhodné posloupnosti
WO2002046912A1 (fr) * 2000-12-08 2002-06-13 Deutsche Telekom Ag Procede et dispositif pour produire une sequence pseudo-aleatoire au moyen d'un logarithme discret
WO2003001735A1 (fr) * 2001-06-21 2003-01-03 Infineon Technologies Ag Authentification selon un procede « challenge-response »
EP1499022A1 (fr) * 2003-07-04 2005-01-19 Thales Procédé et dispositif de génération de nombres aléatoires fondés sur des oxcillateurs chaotiques
FR2857172A1 (fr) * 2003-07-04 2005-01-07 Thales Sa Procede et dispositif de generation de nombres aleatoires fondes sur des oscillateurs chaotiques
US10452877B2 (en) 2016-12-16 2019-10-22 Assa Abloy Ab Methods to combine and auto-configure wiegand and RS485

Also Published As

Publication number Publication date
JPH06244684A (ja) 1994-09-02
EP0616429B1 (fr) 2004-03-31
JP3586475B2 (ja) 2004-11-10
TW256969B (fr) 1995-09-11
DE59410366D1 (de) 2004-05-06

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