EP0583385A1 - Detection et isolement des anomalies dans des systemes fttc - Google Patents

Detection et isolement des anomalies dans des systemes fttc

Info

Publication number
EP0583385A1
EP0583385A1 EP19920912219 EP92912219A EP0583385A1 EP 0583385 A1 EP0583385 A1 EP 0583385A1 EP 19920912219 EP19920912219 EP 19920912219 EP 92912219 A EP92912219 A EP 92912219A EP 0583385 A1 EP0583385 A1 EP 0583385A1
Authority
EP
European Patent Office
Prior art keywords
telephone
signaling
time slot
channels
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19920912219
Other languages
German (de)
English (en)
Inventor
William F. Ellersick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raynet Corp
Original Assignee
Raynet Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raynet Corp filed Critical Raynet Corp
Publication of EP0583385A1 publication Critical patent/EP0583385A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/0016—Arrangements providing connection between exchanges
    • H04Q3/0062—Provisions for network management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation

Definitions

  • Fault detection and isolation are key considerations in the design of fiber to the curb (FTTC) and similar systems. Deployment of fiber in the telephone local loop requires network availability comparable to that of today's copper networks. To achieve this, redundancy needs to be provided in high capacity elements of the network, but automatic fault detection and isolation capabilities required to take advantage of the redundancy are just as important. Automatic isolation of failures significantly improves network availability and reduces maintenance costs through accurate and timely dispatch of repair personnel.
  • An object of the invention is to provide a technique (method and apparatus) for detecting and isolating faults, preferably in a fiber to the curb (FTTC) system.
  • This technique uses overhead or unused time slots in conjunction with pattern generation and verification hardware to perform bit error rate tests on digital time division multiplexed data paths. This allows fault diagnosis without interruption of service, especially telephone service.
  • Two types of time slots are preferably used to diagnose faults in each half of head end multiplexer electronics, e.g. office interface unit (OIU).
  • the first type is an unused time slot made available by running an OIU multiplexer clock slightly faster than is necessary to provide time slots for the full data capacity of the system(s) serviced by the OIU.
  • the second type is an overhead time slot normally used for establishing framing information on a standard multiplexed digital trunk, such as the European 2.048 Mbps CCITT standard interface or the US 1.544 Mbps Tl standard interface, connected to the OIU from a central office, or remote extension thereof.
  • This frame clock is passed through the OIU-SIU system using separate hardware signals within the OIU and by transmitting an OIU- SIU framing time slot over the fiber to the SIU fiber interface, the fiber framing time slot preferably being identified by a code violation of a specific byte.
  • framing information for each digital trunk need not be carried past an OIU point where the digital trunks are synchronized to the OIU-SIU system frame clock, and time slots associated with each digital trunk can then be made available by the OIU as overhead fault diagnosis channels.
  • synchronization to the system frame clock is usually accomplished in a digital framer chip that uses a two frame deep receive first-in-first-out (FIFO) memory that uses frame clock information to clock data in from each digital trunk, and system frame clock information to clock data out to the rest of the FTTC system toward the SIUs.
  • FIFO receive first-in-first-out
  • the FIFO is not needed as data is transmitted synchronous to the system frame clock, with the framing channel for each digital trunk being regenerated from the system frame clock in the OIU digital framer.
  • Digital framers such as ones made by Base2 Systems, Inc. allow individual 64 kbps channels to be looped back internally.
  • this internal loop back capability is implemented before the framing channel is generated in the transmit direction.
  • this internal loop back is implemented after framing information from the framing channel in the digital trunk is used to clock data into the receive FIFO.
  • the framing channel is looped back toward the SIUs and used for testing without affecting the use of the framing channel on the digital trunk.
  • a preferred object of the invention is to provide a fault diagnosis apparatus for a telecommunication system that transmits and cross- connects telephone signals between multiple telephone exchange office feeder lines and telephone subscriber equipment, comprising:
  • pattern generation means for transmitting a predetermined bit pattern in the at least one spare time slot channel
  • FIG 1 is a block schematic diagram of a fiber to the curb system
  • FIG 2 is a block diagram of an office interface unit illustrated in FIG 1;
  • FIG 3 is a block diagram schematically illustrating system loop backs for an office interface unit and a subscriber interface unit illustrated in FIG 1;
  • FIG 4 is a further block diagram of the subscriber interface unit illustrated in FIG 1.
  • FIG 1 shows a typical digital FTTC system 1, consisting of exchange feeders 2, an Office Interface Unit (OIU) 3, an Operations and Maintenance system (O&M) system 4, distribution fibers 6, Subscriber Interface Units (SIUs) 7 and subscriber loops 8.
  • OIU Office Interface Unit
  • O&M Operations and Maintenance system
  • SIUs Subscriber Interface Units
  • POTS plain old telephone services
  • ISDN and other digital services have built-in cyclic redundancy check (CRC) checksums which provide excellent fault detection.
  • CRC cyclic redundancy check
  • the exchange or subscriber equipment will detect failures of FTTC system elements for ISDN and other digital services, using the CRC checksums passed through the entire system.
  • the exchange is relayed failure information from CRC checkers in the Line Interface Units (LIUs) in the SIUs as well as in the subscriber equipment. With this information, and the use of loop backs in each LIU, failures can be isolated with good confidence to the exchange, exchange feeders, the FTTC electronics, subscriber loop or subscriber equipment.
  • the FTTC system is also relayed failure -6 - information from CRC checkers in the exchange and subscriber equipment, and can thus distinguish between FTTC system and external failures. Isolation of internal FTTC system failures is discussed in more detail below.
  • POTS presents unique and difficult fault detection problems, as there is no capability for fault detection at the subscriber equipment 10 (telephone), and CRC checksums on digital feeders are generally terminated at the OIU's line interface units 11 (LIUs), as they cannot be maintained through cross-connect circuitry in the OIU.
  • LIUs line interface units 11
  • internal fault detection on POTS is needed throughout an FTTC system, and the present invention is directed to fulfilling this need.
  • the invention combines three fault detection techniques: CRC checksums and coding propagated through the system, data comparisons between redundant modules, and non-service affecting loop back tests. After detection, emphasis is placed on fault isolation techniques that clearly identify the failed module. These techniques rely on loop backs at module and subsystem interfaces, comprehensive self tests, and on utilization of shared Passive Optical Network (PON) topologies to isolate failures to head end or remote equipment.
  • CRC checksums and coding propagated through the system
  • data comparisons between redundant modules and non-service affecting loop back tests.
  • PON Passive Optical Network
  • Digital feeders and LIUs are tested by CRC checksums and line coding generated and verified in the LIUs at each end of the feeder.
  • CRC checksums and line coding generated and verified in the LIUs at each end of the feeder.
  • LIU tests include analog reflection and idle channel noise tests.
  • Subscriber loop tests include foreign voltage, impedance and leakage current tests.
  • Failures on POTS service channels can be isolated to the LIUs or subscribers loops by running digital BER and analog reflection tests. Loop failures can be isolated to customer premise wiring by detecting demarcation circuitry at the end of the subscriber loop.
  • the fault isolation approach of the invention focuses on tests which clearly isolate faults to field replaceable units (FRUs), such as bit error rate (BER) tests with loop backs at FRU interfaces or comprehensive FRU self tests.
  • FRUs field replaceable units
  • BER bit error rate
  • spare time slots are generated within the OIU by running an OIU multiplexer frame clock faster than is necessary to provide time slots for a full data capacity of systems serviced by the OIU. More specifically, according to a preferred embodiment, an OIU intemal bus is run at a speed in excess of 5 megahertz, giving a capacity of 640 time slots, or nominally 512 DSOs plus 120 ABCD signaling byte time slots with 8 spare time slots, otherwise referred to as available overhead, as also more fully described in the copending application cited above.
  • BER tests on these spare time slots provide an inexpensive, effective solution for detecting faults on TDM data paths. With loop backs implemented near FRU interfaces, these BER tests can also be used to isolate faults.
  • each ABCD signaling byte is cross- connected in the OIU to its own dedicated time slot or channel so that, in the example indicated, for transmission feeder lines which include 120 ABCD signaling nibbles, generally stacked in 60 time slots, the OIU connects these 120 signaling nibbles into 120 signaling time slots. Accordingly, since each signaling time slot generated within the OIU contains 4 bits corresponding to the ABCD signaling information, 4 additional bits remain unused which can be utilized for fault detection, for example by utilizing a binary 1 or 0 checksum algorithm. --r-
  • BER tests on unused or overhead time slots are an inexpensive, effective solution for detecting faults on TDM data paths. With loop backs implemented near FRU interfaces, these BER tests can also be used to isolate faults. Space division multiplexed data paths (e.g. cross- connect memories) can be effectively checked by comparing the outputs of redundant hardware.
  • clock generation circuitry is perhaps most effectively checked by comparing the outputs of redundant modules. Disagreements between redundant hardware modules that compare their outputs can be resolved with comprehensive self tests, or by checking the results of nonintrusive BER tests with each of the disagreeing modules in service.
  • Faults on digital feeders or distribution fibers can be isolated by looping back at FRU interfaces.
  • PON-based systems can utilize knowledge of their topology to isolate failures between SIUs and shared distribution fibers, as an SIU failure will leave other SIUs error free.
  • processors should be limited to maintenance and provisioning of service, and associated service carrying hardware should be designed to continue operating under processor failures.
  • processor or firmware failures do not add to system downtime.
  • redundancy is not required on non- service affecting processors, reducing hardware costs and firmware complexity.
  • Fault detection on processors is provided by watchdog timers and periodic polling of distributed processing elements. - ⁇ - Refe ⁇ ing to FIG 2, the OIU comprises a shelf with plug-in
  • the FRUs comprise El Modules 13 (ElMs) which transfer data between 2048 Kbps lines 2, a Global Cross-connect Module 14 (GCM), and a timing generation module 17 (TGM).
  • ElMs El Modules 13
  • GCM Global Cross-connect Module 14
  • TGM timing generation module 17
  • Modules 15 also contains pattern generation and verification circuitry for automated or on demand testing of the system.
  • Central Processing Module 16 coordinates fault isolation, provisioning of service, and interfaces with the O&M system 4.
  • An OIU backplane which interconnects the FRUs has redundant timing and data busses to prevent loss of service due to a driver or receiver failure and contains no active components to minimize the chance of field backplane failures.
  • the TGM and GCM each compare their outputs with redundant hardware, e.g. a redundant TGM and GCM, providing excellent fault detection coverage, and use comprehensive self tests and redundancy switching to isolate faults to the failed FRU. If the two GCMs' or TGMs' outputs do not match, the offline board is self tested. If the self test fails, the offline board is labelled "faulty" and the fault has been isolated. Otherwise, the offline board is switched in and the previously online board is self tested. If it fails self test, it is labelled "faulty”. If both boards pass self test, and there are no secondary failure indications that point to one of the boards, they are both labelled "suspect", the previously online board is switched back online, and a manual fault isolation procedure is necessary.
  • redundant hardware e.g. a redundant TGM and GCM
  • E1M and DFM faults are detected through CRC checks in the LIUs at the exchange, El Ms, SIUs and customer equipment.
  • BER tests from the known good GCM due to redundant GCM output comparison) on the failed time slots isolate the failure using loop backs at FRU interfaces (see FIG 3).
  • the El Ms loop back unused time slots toward the GCM, in their LIUs just before CRC checksums and coding are added.
  • the GCM performs BER tests in the background on the unused time slots through each LIU on the El Ms to detect ElM errors up to the LIUs.
  • a BER test failure indicates an ElM failure, and no further isolation is needed.
  • the CRC checksums and line coding on the 2048 Kbps lines are checked in the LIUs in the exchange and the El Ms, detecting failures of the LIUs or exchange feeders, which are isolated using loop backs close to the line interfaces of the LIUs.
  • coding is added and checked on data between the GCM and SIUs. Failures in the DFMs will result in coding errors, which are isolated by taking advantage of the shared optical architecture of the FTTC system. Coding errors on a single SIU's data indicate an SIU failure, whereas coding errors on multiple SIUs indicate a DFM or fiber failure, which is further isolated to the DFM or fiber with good confidence using loop backs on the DFM.
  • All processors are non-service affecting, eliminating the need for redundant processors and associated hardware cost and firmware complexity. Failures of the CPM or embedded controllers in other boards or their firmware are detected (and isolated) by watchdog timers and periodic polling by the CPM.
  • the SIU comprises a Fiber Interface Unit 21 (FIU) and Line Cards 22 for various services, as shown in FIG 4.
  • the SIU backplane again has no active components to minimize the chance of field failures.
  • FIU and Line Card faults are detected through CRC checks in the LIUs at the exchange, El Ms, SIUs and customer equipment. Once a failure has been isolated to the FTTC system as described above, BER tests from the OIU on the failed time slots isolate the failure using loop backs at FRU interfaces. For POTS, coding is checked on data between the GCM and SIUs.
  • SIU FIU or POTS Line Card's digital path will result in coding, errors, which can be isolated to the SIU as described above. SIU errors can be further isolated to the FIU or Line Card using BER tests from the OIU and loop backs at the Line Card/FTU interface.
  • Sophisticated self tests of POTS Line Card analog circuitry, and analog loop tests preferably are implemented in the SIU, and are performed on demand through the O&M system.
  • the invention has been described by reference to a fiber- to-the-curb system whereby subscribers are connected to SIUs, the invention is not dependent on any particular distribution architecture or topology, e.g. bus, star, PON, etc.
  • the invention described by reference to an El transmission format, is not to be limited to only this format and applies to any format, i.e., Tl. Accordingly, the invention is not to be limited by reference to any particular preferred embodiment described, rather it should only be limited by the appended claims.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Lining Or Joining Of Plastics Or The Like (AREA)
  • Road Signs Or Road Markings (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

Appareil (3, 7) de détection d'anomalies destiné à un système de télécommunications qui transmet et connecte entre eux des signaux téléphoniques entre plusieurs lignes d'alimentation des centraux téléphoniques (2) et l'installation téléphonique (10) des abonnés. Cet appareil fonctionne en retransmettant des signaux téléphoniques reçus en provenance des lignes d'alimentation dans un format à multiplexage numérique dans le temps avec un taux de transmission suffisamment rapide pour créer une pluralité de canaux à fente de temps de réserve dans un bloc de retransmission, qui sont disponibles pour des applications de détection de défaillance. De cette manière il n'est pas nécessaire de prélever des informations vocales d'alimentation ou des canaux de signalisation pour effectuer la détection d'anomalies.
EP19920912219 1991-05-10 1992-05-11 Detection et isolement des anomalies dans des systemes fttc Withdrawn EP0583385A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69850391A 1991-05-10 1991-05-10
US698503 2000-10-27

Publications (1)

Publication Number Publication Date
EP0583385A1 true EP0583385A1 (fr) 1994-02-23

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Application Number Title Priority Date Filing Date
EP19920912219 Withdrawn EP0583385A1 (fr) 1991-05-10 1992-05-11 Detection et isolement des anomalies dans des systemes fttc

Country Status (5)

Country Link
EP (1) EP0583385A1 (fr)
JP (1) JPH06507767A (fr)
AU (1) AU1995992A (fr)
CA (1) CA2108179A1 (fr)
WO (1) WO1992021190A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5743874B2 (ja) * 2011-12-16 2015-07-01 三菱電機株式会社 局側終端装置および光通信ネットワーク

Family Cites Families (4)

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Publication number Priority date Publication date Assignee Title
JPS5012859B1 (fr) * 1969-12-16 1975-05-15
GB2154104B (en) * 1984-02-09 1987-09-23 Marconi Instruments Ltd Test apparatus
DE3528252A1 (de) * 1985-08-07 1987-02-12 Standard Elektrik Lorenz Ag Faseroptische verteileranlage fuer breitbandige signale
JPH036156A (ja) * 1989-06-01 1991-01-11 Mitsubishi Electric Corp データ伝送路障害検知回路

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9221190A1 *

Also Published As

Publication number Publication date
JPH06507767A (ja) 1994-09-01
AU1995992A (en) 1992-12-30
WO1992021190A1 (fr) 1992-11-26
CA2108179A1 (fr) 1992-11-11

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