EP0460857A3 - Semiconductor device with a high density wiring structure and method for producing the same - Google Patents

Semiconductor device with a high density wiring structure and method for producing the same Download PDF

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Publication number
EP0460857A3
EP0460857A3 EP19910304829 EP91304829A EP0460857A3 EP 0460857 A3 EP0460857 A3 EP 0460857A3 EP 19910304829 EP19910304829 EP 19910304829 EP 91304829 A EP91304829 A EP 91304829A EP 0460857 A3 EP0460857 A3 EP 0460857A3
Authority
EP
European Patent Office
Prior art keywords
semiconductor device
groove
hole
wiring structure
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19910304829
Other versions
EP0460857A2 (en
EP0460857B1 (en
Inventor
Fumio Canon Kabushiki Kaisha Murooka
Tetsuo Canon Kabushiki Kaisha Asaba
Shigeyuki Canon Kabushiki Kaisha Matsumoto
Osamu Canon Kabushiki Kaisha Ikeda
Toshihiko Canon Kabushiki Kaisha Ichise
Yukihiko Canon Kabushiki Kaisha Sakashita
Shunsuke Canon Kabushiki Kaisha Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of EP0460857A2 publication Critical patent/EP0460857A2/en
Publication of EP0460857A3 publication Critical patent/EP0460857A3/en
Application granted granted Critical
Publication of EP0460857B1 publication Critical patent/EP0460857B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67173—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers in-line arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67745—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/05—Etch and refill

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A semiconductor device with a high-density wiring structure, and a producing method for such device are provided. The semiconductor device has a substrate such as silicon, an insulation layer laminated on the substrate and having a groove or a hole, and a wiring of a conductive material formed in the groove or hole in the insulation layer. The wiring is formed by depositing a conductive material such as aluminum or an aluminum alloy in the groove or hole of the insulation layer by a CVD method utilizing alkylaluminum hydride gas and hydrogen. The groove or hole can be formed by an ordinary patterning method combined with etching. <IMAGE>
EP91304829A 1990-05-31 1991-05-29 Method for producing a semiconductor device with a high density wiring structure Expired - Lifetime EP0460857B1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP13962190 1990-05-31
JP13962090 1990-05-31
JP139616/90 1990-05-31
JP139620/90 1990-05-31
JP139621/90 1990-05-31
JP13961690 1990-05-31

Publications (3)

Publication Number Publication Date
EP0460857A2 EP0460857A2 (en) 1991-12-11
EP0460857A3 true EP0460857A3 (en) 1992-07-29
EP0460857B1 EP0460857B1 (en) 1997-03-19

Family

ID=27317903

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91304829A Expired - Lifetime EP0460857B1 (en) 1990-05-31 1991-05-29 Method for producing a semiconductor device with a high density wiring structure

Country Status (4)

Country Link
US (1) US5614439A (en)
EP (1) EP0460857B1 (en)
AT (1) ATE150585T1 (en)
DE (1) DE69125210T2 (en)

Families Citing this family (15)

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Publication number Priority date Publication date Assignee Title
JP2934353B2 (en) * 1992-06-24 1999-08-16 三菱電機株式会社 Semiconductor device and manufacturing method thereof
JPH07221174A (en) * 1993-12-10 1995-08-18 Canon Inc Semiconductor device and manufacturing method thereof
US5665644A (en) * 1995-11-03 1997-09-09 Micron Technology, Inc. Semiconductor processing method of forming electrically conductive interconnect lines and integrated circuitry
US6004839A (en) * 1996-01-17 1999-12-21 Nec Corporation Semiconductor device with conductive plugs
US6091150A (en) * 1996-09-03 2000-07-18 Micron Technology, Inc. Integrated circuitry comprising electrically insulative material over interconnect line tops, sidewalls and bottoms
JPH10125777A (en) * 1996-10-17 1998-05-15 Nec Corp Manufacture of semiconductor device
TW571373B (en) * 1996-12-04 2004-01-11 Seiko Epson Corp Semiconductor device, circuit substrate, and electronic machine
KR19980044215A (en) * 1996-12-06 1998-09-05 문정환 Wiring Structure of Semiconductor Device and Formation Method
US5920081A (en) * 1997-04-25 1999-07-06 Taiwan Semiconductor Manufacturing Co., Ltd. Structure of a bond pad to prevent testing probe pin contamination
US6332835B1 (en) 1997-11-20 2001-12-25 Canon Kabushiki Kaisha Polishing apparatus with transfer arm for moving polished object without drying it
US6388198B1 (en) * 1999-03-09 2002-05-14 International Business Machines Corporation Coaxial wiring within SOI semiconductor, PCB to system for high speed operation and signal quality
JP4752108B2 (en) * 2000-12-08 2011-08-17 ソニー株式会社 Semiconductor device and manufacturing method thereof
DE102005045056B4 (en) * 2005-09-21 2007-06-21 Infineon Technologies Ag Integrated circuit arrangement with multiple conductive structure layers and capacitor
DE102005045059B4 (en) * 2005-09-21 2011-05-19 Infineon Technologies Ag Integrated circuit arrangement with several Leitstrukturlagen and coil and method for manufacturing
DE102005045057A1 (en) * 2005-09-21 2007-03-22 Infineon Technologies Ag Integrated circuit especially for coaxial leads has three conductive traces spaced above substrate that are up to ten times longer than their width

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0333132A2 (en) * 1988-03-15 1989-09-20 Nec Corporation Semiconductor device having multilayered wiring structure with a small parasitic capacitance
EP0353426A2 (en) * 1988-06-10 1990-02-07 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device comprising conductive layers

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FR2461360A1 (en) * 1979-07-10 1981-01-30 Thomson Csf METHOD FOR MANUFACTURING A VERTICALLY OPERATING DMOS-TYPE FIELD EFFECT TRANSISTOR AND TRANSISTOR OBTAINED THEREBY
JPS59154040A (en) * 1983-02-22 1984-09-03 Toshiba Corp Manufacture of semiconductor device
IL86162A (en) * 1988-04-25 1991-11-21 Zvi Orbach Customizable semiconductor devices
US5084413A (en) * 1986-04-15 1992-01-28 Matsushita Electric Industrial Co., Ltd. Method for filling contact hole
JP2579937B2 (en) * 1987-04-15 1997-02-12 株式会社東芝 Electronic circuit device and method of manufacturing the same
US4776087A (en) * 1987-04-27 1988-10-11 International Business Machines Corporation VLSI coaxial wiring structure
JPH0611044B2 (en) * 1987-05-07 1994-02-09 日本電気株式会社 Method for manufacturing semiconductor device
JP2621287B2 (en) * 1988-01-29 1997-06-18 三菱電機株式会社 Method of forming multilayer wiring layer
US4977105A (en) * 1988-03-15 1990-12-11 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing interconnection structure in semiconductor device
JPH01248643A (en) * 1988-03-30 1989-10-04 Seiko Epson Corp Manufacture of semiconductor integrated circuit device
NL8900010A (en) * 1989-01-04 1990-08-01 Philips Nv SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE.
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EP0333132A2 (en) * 1988-03-15 1989-09-20 Nec Corporation Semiconductor device having multilayered wiring structure with a small parasitic capacitance
EP0353426A2 (en) * 1988-06-10 1990-02-07 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device comprising conductive layers

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Title
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Also Published As

Publication number Publication date
DE69125210T2 (en) 1997-08-07
US5614439A (en) 1997-03-25
EP0460857A2 (en) 1991-12-11
DE69125210D1 (en) 1997-04-24
ATE150585T1 (en) 1997-04-15
EP0460857B1 (en) 1997-03-19

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