Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N5/00—Details of television systems
  • H04N5/76—Television signal recording
  • H04N5/91—Television signal processing therefor
  • H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N5/00—Details of television systems
  • H04N5/76—Television signal recording
  • H04N5/91—Television signal processing therefor
  • H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
  • H04N5/926—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback by pulse code modulation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N5/00—Details of television systems
  • H04N5/76—Television signal recording
  • H04N5/91—Television signal processing therefor
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N9/00—Details of colour television systems
  • H04N9/79—Processing of colour television signals in connection with recording
  • H04N9/797—Processing of colour television signals in connection with recording for recording the signal in a plurality of channels, the bandwidth of each channel being less than the bandwidth of the signal
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N9/00—Details of colour television systems
  • H04N9/79—Processing of colour television signals in connection with recording
  • H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
  • H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
  • H04N9/8042—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components involving data reduction
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N5/00—Details of television systems
  • H04N5/76—Television signal recording
  • H04N5/765—Interface circuits between an apparatus for recording and another apparatus
  • H04N5/77—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N5/00—Details of television systems
  • H04N5/76—Television signal recording
  • H04N5/91—Television signal processing therefor
  • H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
  • H04N5/926—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback by pulse code modulation
  • H04N5/9261—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback by pulse code modulation involving data reduction

Definitions

• the invention relates to an image processing system for processing and reproducing video signals.
• the video signal from a camera ge supplies are that an image signal with 625 lines
• the second signal can be, for example, a standard video signal with 625 lines, a line jump and a 50 Hz image change frequency.
• a recording device for example according to CCIR standard 601
• CCIR standard 601 can only record image signals with interlaced lines and has a limited bandwidth
• a progressively scanned video signal must be reduced in its data rate and a conversion into an image with interlaced lines is required.
• a data reduction can be carried out, for example, by filtering.
• the ores - An interlaced image can be performed, for example, in connection with the aforementioned filtering by the so-called in-hoof method.
• Such a video image then represents a signal according to CCIR standard 601 and can therefore be labeled.
• post-processing can be carried out by means of inverse lineshuffling and inverse filtering.
• the originally progressive video image can then be mixed and recorded with a standard TV signal with line jump after the preprocessing.
• a thus generated signal is also fed to the postprocessing to improve the image reproduction.
• the pixels of the signal of the interlaced source are also post-processed, so that picture errors occur during playback in the case of mixed television signals.
• the object of the invention is to provide an image processing system which can mix, record and reproduce television signals of different standards, while avoiding the errors caused by post-processing.
• Fig. 1 arrangement of the samples after preprocessing a progressive input signal
• Fig. 2 is a progressive black and white signal
• Fig. 3 is an image signal with interlace without
• Image processing system a diagonal filter a line hoof circuit an inverse line hoof circuit Predistortion switch
• Fig. La shows an image signal without interlacing after a data reduction stage.
• the pixels of the lines n, n + 1, ... have a quincunx structure after diagonal filtering.
• Fig. Lb shows the arrangement of the pixels after a lineshuffling.
• the pixels of every 2n + lth line of the progressive input image are shifted to the second line.
• a video field is created with half the number of lines of the input image.
• 2a shows an input signal consisting of black-and-white transitions from line to line.
• the lineshuffling carried out according to FIG. 1 creates a horizontal black-white transition shown in FIG. 2b.
• Fig. 3 shows the effect of post-processing on a standard interlaced TV signal (Fig. 3a).
• the large black circles represent black pixels
• the large bright rectangles represent white pixels of the original image
• the small bright and black circles represent the pixels determined by the improvement.
• pixels of the original line are shifted in the vertical direction into the intermediate lines 2n + ' 1 by the inverse lineshuffling.
• Fig. 3c shows an Ergeb ⁇ nis a sawtooth in the rows n + 3, n + 8.
• a predistortion of the image signal is carried out according to FIG. 4 by interlacing before processing in the studio.
• FIG. 4a again shows pixels of a first field of a standard TV signal with black-white transitions.
• a half-line vertical shift of the picture elements related to the lines of the field, ie by interpolation of vertically superimposed picture elements in every second picture element column, z. B. in lines n + 2, n + 6 generates the interpolation values indicated as small bright circles that replace the original pixels.
• Fig. 4b 4c then shows the result of the processing stage after the inverse lineshuffling for this field. The same applies to the second field.
• the progressive image signal generated by a camera 1 with 625 lines and 50 Hz image change frequency is fed to a diagonal filter 2 and a circuit 3 for performing a line shuffling.
• the output signal is recorded on a standardized video recording device 4, which e.g. can also contain a mixer for various TV input signals.
• the image signal played back is fed to an inverse lineshuffling circuit 5 and a selective post-filtering 6, the output signal of which can be reproduced on a monitor 7.
• the image signal with line jump supplied by a standard camera 9 is pre-distorted by a predistortion circuit 8 and fed to the video recording device 4.
• the disadvantages described in FIG. 3 are largely avoided by the predistortion circuit 8.
• the signal of the standard camera 9 can alternatively be fed to a line transcoding 10.
• the line transcoding 10 converts the image signal from the standard camera 9 into a format such as is present with the progressive image signal before the filtering 2.
• the image signal generated in this way then runs in parallel through a circuit 3 for carrying out the lineshuffling and as a sum signal after recording the same processing stages as the progressive image signal.
• FIG. 6 shows the structure of a diagonal filter 2 as it can be used in the image processing system according to the invention.
• the input signal IN is fed to a chain of delay elements 11 to 14.
• the signal weighting circuits 20 to 24 are supplied, which weight the signal with filter coefficients a1, a2, ..., an-1, an.
• the output signals of the weighting circuits 20 to 24 are fed to a summation circuit 30, the output signal of which is fed to a second delay chain 15 to 18.
• the input signal of the delay circuit 15 and the output signals of the delay circuits 15 to 18 are also supplied to weighting circuits 25 to 29, which are provided with corresponding weighting factors al, a2, ..., an-1, -. to be weighted.
• the output signals of the weighting circuits 25 to 29 are fed to a summer 31, the output signal of the circuit 3 being carried out for carrying out a Linhuffling.
• FIG. 7 shows the circuit structure of a line hoof circuit 2.
• the output signal of the summer 31 is fed to a controllable switch 40.
• the switch 40 is switched at half the line frequency fl / 2.
• the data are stored in a line memory 41 or a Line memory 43 inscribed.
• the line memories 41, 43 are addressed by an address generator 42.
• the outputs of the line memories 41, 43 lead to a controllable changeover switch 44, which is also switched at half the line frequency fl / 2.
• the line hoof circuit 3 operates as follows.
• the input lines are written into a line memory in such a way that, in the case of even samples of the first line, these are written into the memory with an even address, and in the case of odd samples of the second line, they are written into the odd address area of the same memory become.
• FIG. 8 shows an inverse line hoof circuit 5. It operates in a complementary manner like the line hoof circuit according to FIG. 7.
• the input data are fed to a changeover switch 50 which is switched over at a frequency fv.
• One output each of the switch 50 leads to line memories 51, 53, the addresses of which are controlled by an address generator 52.
• the outputs of the line memories 51, 53 lead to inputs of a changeover switch 54, which is switched over with the inverse changeover frequency fv.
• the output of the changeover switch 54 leads to an input of a changeover switch 55.
• the second input of the changeover switch 55 is connected to reference potential.
• the inverse line hoof circuit works as follows.
• the input lines are sequentially stored in a memory 51; 53 read. During this time, the data of the lines written there are read from the other memory.
• the clock frequency of the output line is twice the clock frequency of the input line.
• the even samples during the duration of an output line, the odd samples during the duration read a second line.
• certain sample values are set to zero by a control line of the address generator 52.
• the sampled values of the first read-out line set to zero are the even sampled values and the odd sampled values in the second read-out line.
• Fig. 9 shows a predistortion circuit 8.
• This circuit is essentially an all-pass vertical digital filter with a delay of half a line.
• the input signal IN is fed to line memories 60, 61, 62, 63, the input or output of which are fed to data weighting circuits 64 to 68.
• the data are weighted al up to with weighting factors.
• the output signals of the weighting circuits 64 to 68 are fed to a summation circuit 69.
• the input signal IN is also fed to a line delay circuit 70.
• the output signal of the line delay circuit 70 is given to an input of a changeover switch 71.
• the changeover switch 71 is switched over with the clock frequency fck / 2 of half the pixel frequency.
• This filter constructed in this way has a delay of half a line.
• FIGS. 6 to 9 are exemplary embodiments for the schematic functional blocks shown in FIG. 5. Other configurations of the individual circuits are conceivable.

Landscapes

• Engineering & Computer Science (AREA)
• Multimedia (AREA)
• Signal Processing (AREA)
• Television Signal Processing For Recording (AREA)
• Television Systems (AREA)
• Closed-Circuit Television Systems (AREA)
• Image Processing (AREA)
• Apparatus For Radiation Diagnosis (AREA)
• Studio Circuits (AREA)
• Purification Treatments By Anaerobic Or Anaerobic And Aerobic Bacteria Or Animals (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=6367173

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Family Applications After (1)

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Family Cites Families (9)

• 1988
  • 1988-11-15 DE DE3838609A patent/DE3838609A1/de not_active Withdrawn
• 1989
  • 1989-11-07 EP EP89912969A patent/EP0444095A1/de active Pending
  • 1989-11-07 ES ES198989120541T patent/ES2034562T3/es not_active Expired - Lifetime
  • 1989-11-07 EP EP89120541A patent/EP0369285B1/de not_active Expired - Lifetime
  • 1989-11-07 US US07/688,485 patent/US5185663A/en not_active Expired - Fee Related
  • 1989-11-07 DE DE8989120541T patent/DE58902085D1/de not_active Expired - Fee Related
  • 1989-11-07 AT AT89120541T patent/ATE79711T1/de not_active IP Right Cessation
  • 1989-11-07 WO PCT/EP1989/001327 patent/WO1990006037A1/de not_active Application Discontinuation
  • 1989-11-07 AU AU46279/89A patent/AU4627989A/en not_active Abandoned
  • 1989-11-07 JP JP2500156A patent/JPH04501795A/ja active Pending
• 1990
  • 1990-07-13 KR KR1019900701501A patent/KR900702714A/ko not_active Ceased
• 1992
  • 1992-11-18 GR GR920402623T patent/GR3006265T3/el unknown

Non-Patent Citations (1)

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